IRF8010PBF

PD - 95505 IRF8010PbF SMPS MOSFET Applications l High frequency DC-DC converters l UPS and Motor Control l Lead-Free HEXFET® Power MOSFET VDSS RDS(on) max ID 15mΩ 80A† 100V Benefits Low Gate-to-Drain Charge to Reduce Switching Losses l Fully Characterized Capacitance Including Effective COSS to Simplify Design, (See App. Note AN1001) l Fully Characterized Avalanche Voltage and Current l Typical RDS(on) = 12mΩ l TO-220AB Absolute Maximum Ratings Parameter Max. Units h Continuous Drain Current, VGS @ 10V 80 ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 57 IDM Pulsed Drain Current 320 PD @TC = 25°C Power Dissipation 260 W VGS Linear Derating Factor Gate-to-Source Voltage 1.8 ± 20 W/°C V dv/dt TJ Peak Diode Recovery dv/dt Operating Junction and 16 -55 to + 175 V/ns TSTG Storage Temperature Range ID @ TC = 25°C c e Soldering Temperature, for 10 seconds A °C 300 (1.6mm from case ) 1.1(10) Mounting torque, 6-32 or M3 screw N•m (lbf•in) Thermal Resistance Typ. Max. RθJC Junction-to-Case Parameter ––– 0.57 RθCS Case-to-Sink, Flat, Greased Surface 0.50 ––– RθJA Junction-to-Ambient ––– 62 Notes  through † www.irf.com Units °C/W are on page 8 1 07/06/04 IRF8010PbF Static @ TJ = 25°C (unless otherwise specified) Parameter Min. Typ. Max. Units V(BR)DSS Drain-to-Source Breakdown Voltage ∆V(BR)DSS/∆TJ RDS(on) 100 ––– ––– Breakdown Voltage Temp. Coefficient ––– 0.11 ––– Static Drain-to-Source On-Resistance ––– 12 15 VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V IDSS Drain-to-Source Leakage Current µA IGSS ––– ––– 20 ––– ––– 250 Gate-to-Source Forward Leakage ––– ––– 200 Gate-to-Source Reverse Leakage ––– ––– -200 V Conditions VGS = 0V, ID = 250µA V/°C Reference to 25°C, ID = 1mA mΩ VGS = 10V, ID = 45A f VDS = VGS, ID = 250µA VDS = 100V, VGS = 0V VDS = 100V, VGS = 0V, TJ = 125°C nA VGS = 20V VGS = -20V Dynamic @ TJ = 25°C (unless otherwise specified) Parameter Min. Typ. Max. Units 82 ––– ––– Total Gate Charge ––– 81 120 Gate-to-Source Charge ––– 22 ––– V Conditions gfs Qg Forward Transconductance VDS = 25V, ID = 45A Qgs Qgd Gate-to-Drain ("Miller") Charge ––– 26 ––– VGS = 10V td(on) Turn-On Delay Time ––– 15 ––– VDD = 50V tr Rise Time ––– 130 ––– td(off) Turn-Off Delay Time ––– 61 ––– tf Fall Time ––– 120 ––– Ciss Input Capacitance ––– 3830 ––– VGS = 0V Coss Output Capacitance ––– 480 ––– VDS = 25V Crss Reverse Transfer Capacitance ––– 59 ––– Coss Output Capacitance ––– 3830 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz Coss Output Capacitance ––– 280 ––– VGS = 0V, VDS = 80V, ƒ = 1.0MHz Coss eff. Effective Output Capacitance ––– 530 ––– VGS = 0V, VDS = 0V to 80V ID = 80A nC VDS = 80V f ID = 80A ns RG = 39Ω VGS = 10V pF f ƒ = 1.0MHz e Avalanche Characteristics EAS Parameter Single Pulse Avalanche Energy IAR Avalanche Current EAR Repetitive Avalanche Energy c dh c Typ. Max. Units ––– 310 mJ ––– 45 A ––– 26 mJ Diode Characteristics Parameter Min. Typ. Max. Units Conditions IS Continuous Source Current ––– ––– 80 ISM (Body Diode) Pulsed Source Current ––– ––– 320 showing the integral reverse VSD (Body Diode) Diode Forward Voltage ––– ––– 1.3 V p-n junction diode. TJ = 25°C, IS = 80A, VGS = 0V trr Reverse Recovery Time ––– 99 150 ns Qrr Reverse RecoveryCharge ––– 460 700 nC ton Forward Turn-On Time 2 ch MOSFET symbol A D G S f TJ = 150°C, IF = 80A, VDD = 50V di/dt = 100A/µs f Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) www.irf.com IRF8010PbF 10000 1000 1000 100 BOTTOM TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP VGS 15V 12V 10V 6.0V 5.5V 5.0V 4.5V 4.0V 10 4.0V 1 10 4.0V 10 1 0.1 1 BOTTOM 20µs PULSE WIDTH Tj = 175°C 20µs PULSE WIDTH Tj = 25°C 0.1 100 0.1 100 1 Fig 1. Typical Output Characteristics 3.5 T J = 25°C VDS = 50V 20µs PULSE WIDTH 1 6.0 8.0 10.0 12.0 14.0 Fig 3. Typical Transfer Characteristics www.irf.com 16.0 2.5 (Normalized) 100 VGS , Gate-to-Source Voltage (V) I D = 80A 3.0 RDS(on) , Drain-to-Source On Resistance ID, Drain-to-Source Current (Α) T J = 175°C 4.0 100 Fig 2. Typical Output Characteristics 1000 2.0 10 VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) 10 VGS 15V 12V 10V 6.0V 5.5V 5.0V 4.5V 4.0V 2.0 1.5 1.0 0.5 V GS = 10V 0.0 -60 -40 -20 0 20 40 60 80 TJ , Junction Temperature 100 120 140 160 180 ( ° C) Fig 4. Normalized On-Resistance Vs. Temperature 3 IRF8010PbF 100000 VGS , Gate-to-Source Voltage (V) Coss = Cds + Cgd 10000 C, Capacitance(pF) 12 VGS = 0V, f = 1 MHZ Ciss = C gs + Cgd, C ds SHORTED Crss = Cgd Ciss 1000 Coss 100 Crss ID= 80A VDS= 80V VDS= 50V 10 VDS= 20V 8 6 4 2 0 10 1 10 0 100 60 80 100 Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 10000 ID, Drain-to-Source Current (A) 1000 OPERATION IN THIS AREA LIMITED BY R DS(on) 1000 100 I SD , Reverse Drain Current (A) 40 Q G Total Gate Charge (nC) VDS, Drain-to-Source Voltage (V) 100 TJ = 175 ° C 10 T J= 25 ° C 1 V GS = 0 V 0.0 0.5 1.0 1.5 V SD,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 100µsec 10 1msec 1 Tc = 25°C Tj = 175°C Single Pulse 10msec 0.1 0.1 4 20 2.0 1 10 100 1000 VDS, Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRF8010PbF 80 RD V DS LIMITED BY PACKAGE VGS ID , Drain Current (A) D.U.T. RG 60 + -VDD 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 40 Fig 10a. Switching Time Test Circuit 20 VDS 90% 0 25 50 75 100 125 150 175 TC , Case Temperature ( °C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 1 D = 0.50 P DM 0.20 0.1 t1 0.10 t2 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = 2. Peak T 0.01 0.00001 0.0001 0.001 0.01 t1/ t 2 J = P DM x Z thJC +T C 0.1 1 t 1, Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRF8010PbF 600 15V ID 18A 32A 45A TOP + V - DD IAS 20V tp BOTTOM A 0.01Ω Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp EAS , Single Pulse Avalanche Energy (mJ) D.U.T RG 500 DRIVER L VDS 400 300 200 100 0 25 50 75 100 125 Starting Tj, Junction Temperature 150 175 ( ° C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current I AS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. QG 10 V 50KΩ 12V .2µF .3µF QGS QGD D.U.T. VG + V - DS VGS 3mA Charge Fig 13a. Basic Gate Charge Waveform 6 IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit www.irf.com IRF8010PbF Peak Diode Recovery dv/dt Test Circuit Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + D.U.T ƒ + ‚ - - „ +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Driver Gate Drive P.W. Period D= + - VDD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET® Power MOSFETs www.irf.com 7 IRF8010PbF TO-220AB Package Outline Dimensions are shown in millimeters (inches) 2.87 (.113) 2.62 (.103) 10.54 (.415) 10.29 (.405) 3.78 (.149) 3.54 (.139) -A- -B4.69 (.185) 4.20 (.165) 1.32 (.052) 1.22 (.048) 6.47 (.255) 6.10 (.240) 4 15.24 (.600) 14.84 (.584) LEAD ASSIGNMENTS 1.15 (.045) MIN 1 2 3 4.06 (.160) 3.55 (.140) 3X 1.40 (.055) 1.15 (.045) IGBTs, CoPACK 2 - DRAIN 1- GATE 1- GATE 3 - SOURCE 2- COLLECTOR 2- DRAIN 3- SOURCE 4 - DRAIN 3- EMITTER 4- DRAIN 4- COLLECTOR 14.09 (.555) 13.47 (.530) 3X LEAD ASSIGNMENTS HEXFET 1 - GATE 0.93 (.037) 0.69 (.027) 0.36 (.014) 3X M B A M 2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH 0.55 (.022) 0.46 (.018) 2.92 (.115) 2.64 (.104) 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS. TO-220AB Part Marking Information EXAMPLE: T HIS IS AN IRF1010 LOT CODE 1789 AS S EMBLED ON WW 19, 1997 IN THE AS S EMBLY LINE "C" Note: "P" in assembly line position indicates "Lead-Free" INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER DAT E CODE YEAR 7 = 1997 WEEK 19 LINE C Notes:  Repetitive rating; pulse width limited by „ Pulse width ≤ 300µs; duty cycle ≤ 2%. max. junction temperature. … Coss eff. is a fixed capacitance that gives the same charging time ‚ Starting TJ = 25°C, L = 0.31mH, RG = 25Ω, as Coss while VDS is rising from 0 to 80% VDSS. IAS = 45A. † Calculated continuous current based on maximum allowable ƒ ISD ≤ 45A, di/dt ≤ 110A/µs, VDD ≤ V(BR)DSS, junction temperature. Package limitation current is 75A. TJ ≤ 175°C. TO-220 package is not recommended for Surface Mount Application. Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.07/04 8 www.irf.com Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/