IRFB3006GPBF

PD - 96238 IRFB3006GPbF HEXFET® Power MOSFET Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits G D Benefits l Improved Gate, Avalanche and Dynamic dV/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dV/dt and dI/dt Capability l Lead-Free l Halogen-Free S VDSS RDS(on) typ. max. ID (Silicon Limited) 60V 2.1m: 2.5m: 270A ID (Package Limited) 195A c D G D S TO-220AB G D S Gate Drain Source Absolute Maximum Ratings Symbol ID @ TC = 25°C ID @ TC = 100°C ID @ TC = 25°C IDM PD @TC = 25°C VGS Parameter Max. 270 190 195 1080 375 2.5 ± 20 10 -55 to + 175 d Pulsed Drain Current Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Mounting torque, 6-32 or M3 screw f dv/dt TJ TSTG Avalanche Characteristics EAS (Thermally limited) IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy d Thermal Resistance Symbol RθJC RθCS RθJA www.irf.com e g Parameter j Junction-to-Case Case-to-Sink, Flat Greased Surface Junction-to-Ambient Units c c Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Wire Bond Limited) A W W/°C V V/ns °C 300 x x 10lb in (1.1N m) 320 See Fig. 14, 15, 22a, 22b, mJ A mJ Typ. Max. Units ––– 0.50 ––– 0.4 ––– 62 °C/W 1 06/29/09 IRFB3006GPbF Static @ TJ = 25°C (unless otherwise specified) Symbol Parameter V(BR)DSS ∆V(BR)DSS/∆TJ RDS(on) VGS(th) IDSS Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Internal Gate Resistance RG Min. Typ. Max. Units 60 ––– ––– 2.0 ––– ––– ––– ––– ––– ––– 0.07 2.1 ––– ––– ––– ––– ––– 2.0 ––– ––– 2.5 4.0 20 250 100 -100 ––– Conditions V VGS = 0V, ID = 250µA V/°C Reference to 25°C, ID = 5mA mΩ VGS = 10V, ID = 170A V VDS = VGS, ID = 250µA µA VDS = 60V, VGS = 0V VDS = 60V, VGS = 0V, TJ = 125°C nA VGS = 20V VGS = -20V Ω d g Dynamic @ TJ = 25°C (unless otherwise specified) Symbol gfs Qg Qgs Qgd Qsync td(on) tr td(off) tf Ciss Coss Crss Coss eff. (ER) Coss eff. (TR) Parameter Min. Typ. Max. Units Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Total Gate Charge Sync. (Qg - Qgd) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance 280 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Effective Output Capacitance (Energy Related) ––– ––– Effective Output Capacitance (Time Related) h ––– 200 37 60 140 16 182 118 189 8970 1020 534 1480 1920 ––– 300 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– S nC Conditions VDS = 25V, ID = 170A ID = 170A VDS =30V VGS = 10V ID = 170A, VDS =0V, VGS = 10V VDD = 39V ID = 170A RG = 2.7Ω VGS = 10V VGS = 0V VDS = 50V ƒ = 1.0 MHz, See Fig. 5 VGS = 0V, VDS = 0V to 48V , See Fig. 11 VGS = 0V, VDS = 0V to 48V g ns pF g i h Diode Characteristics Symbol Parameter IS Continuous Source Current ISM (Body Diode) Pulsed Source Current VSD trr (Body Diode) Diode Forward Voltage Reverse Recovery Time Qrr Reverse Recovery Charge IRRM ton Reverse Recovery Current Forward Turn-On Time d Min. Typ. Max. Units ––– ––– ––– c 1080 Conditions A MOSFET symbol A showing the integral reverse D G p-n junction diode. TJ = 25°C, IS = 170A, VGS = 0V VR = 51V, TJ = 25°C IF = 170A TJ = 125°C di/dt = 100A/µs TJ = 25°C g S ––– ––– 1.3 V ––– 44 ––– ns ––– 48 ––– ––– 63 ––– nC TJ = 125°C ––– 77 ––– ––– 2.4 ––– A TJ = 25°C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes:  Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 195A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN-1140) ‚ Repetitive rating; pulse width limited by max. junction temperature. ƒ Limited by TJmax, starting TJ = 25°C, L = 0.022mH RG = 25Ω, IAS = 170A, VGS =10V. Part not recommended for use above this value . 2 ––– 270 g „ ISD ≤ 170A, di/dt ≤ 1360A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. … Pulse width ≤ 400µs; duty cycle ≤ 2%. † Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . ‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS. ˆ Rθ is measured at TJ approximately 90°C. www.irf.com IRFB3006GPbF 1000 1000 100 BOTTOM TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP VGS 15V 10V 8.0V 6.0V 5.0V 4.5V 4.0V 3.5V 10 3.5V BOTTOM 100 3.5V ≤ 60µs PULSE WIDTH Tj = 175°C ≤ 60µs PULSE WIDTH Tj = 25°C 10 1 0.1 1 10 0.1 100 Fig 1. Typical Output Characteristics 10 100 Fig 2. Typical Output Characteristics 2.5 RDS(on) , Drain-to-Source On Resistance (Normalized) 1000 ID, Drain-to-Source Current(Α) 1 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) TJ = 175°C 100 TJ = 25°C 10 VDS = 25V ≤ 60µs PULSE WIDTH 1 2.0 3.0 4.0 5.0 6.0 ID = 170A VGS = 10V 2.0 1.5 1.0 0.5 7.0 -60 -40 -20 VGS, Gate-to-Source Voltage (V) 16000 Ciss 8000 Coss Crss 10 100 VDS , Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage www.irf.com ID= 170A VDS= 48V VDS= 30V 12 8 4 0 0 1 Fig 4. Normalized On-Resistance vs. Temperature VGS, Gate-to-Source Voltage (V) Coss = Cds + Cgd 4000 20 40 60 80 100 120 140 160 180 16 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd 12000 0 TJ , Junction Temperature (°C) Fig 3. Typical Transfer Characteristics C, Capacitance (pF) VGS 15V 10V 8.0V 6.0V 5.0V 4.5V 4.0V 3.5V 0 40 80 120 160 200 240 280 QG Total Gate Charge (nC) Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 3 IRFB3006GPbF 10000 TJ = 175°C ID, Drain-to-Source Current (A) ISD , Reverse Drain Current (A) 1000 100 10 TJ = 25°C 1 OPERATION IN THIS AREA LIMITED BY R DS (on) 1000 100µsec 100 LIMITED BY PACKAGE 10 10msec 1 Tc = 25°C Tj = 175°C Single Pulse VGS = 0V 0.0 0.4 0.8 1.2 1.6 0.1 2.0 LIMITED BY PACKAGE ID , Drain Current (A) 250 200 150 100 50 0 75 100 125 150 175 V(BR)DSS , Drain-to-Source Breakdown Voltage 300 50 10 100 Fig 8. Maximum Safe Operating Area Fig 7. Typical Source-Drain Diode Forward Voltage 25 1 VDS, Drain-toSource Voltage (V) VSD, Source-to-Drain Voltage (V) 80 ID = 5mA 75 70 65 60 55 -60 -40 -20 0 TC , Case Temperature (°C) 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature (°C) Fig 9. Maximum Drain Current vs. Case Temperature Fig 10. Drain-to-Source Breakdown Voltage EAS, Single Pulse Avalanche Energy (mJ) 2.0 1.5 Energy (µJ) DC 0.1 0.1 1.0 0.5 0.0 1400 I D 20A 27A BOTTOM 170A 1200 TOP 1000 800 600 400 200 0 0 10 20 30 40 50 VDS, Drain-to-Source Voltage (V) Fig 11. Typical COSS Stored Energy 4 1msec 60 25 50 75 100 125 150 175 Starting TJ, Junction Temperature (°C) Fig 12. Maximum Avalanche Energy Vs. DrainCurrent www.irf.com IRFB3006GPbF Thermal Response ( ZthJC ) 1 D = 0.50 0.1 0.20 0.10 0.05 0.01 0.02 0.01 τJ R1 R1 τJ τ1 R2 R2 τC τ1 τ2 τ2 SINGLE PULSE ( THERMAL RESPONSE ) τι (sec) 0.175365 0.000343 0.22547 Ci= τi/Ri C 0.001 Ri (°C/W) 0.006073 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.0001 1E-006 1E-005 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case 1000 Avalanche Current (A) Duty Cycle = Single Pulse 100 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Tj = 150°C and Tstart =25°C (Single Pulse) 0.01 0.05 0.10 10 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Τ j = 25°C and Tstart = 150°C. 1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 14. Typical Avalanche Current vs.Pulsewidth EAR , Avalanche Energy (mJ) 400 Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) TOP Single Pulse BOTTOM 1% Duty Cycle ID = 170A 300 200 100 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature (°C) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav Fig 15. Maximum Avalanche Energy vs. Temperature www.irf.com 5 IRFB3006GPbF 20 ID = 1.0A ID = 1.0mA ID = 250µA 3.5 16 3.0 IRRM - (A) VGS(th) Gate threshold Voltage (V) 4.0 2.5 12 8 2.0 IF = 112A VR = 51V 4 1.5 TJ = 125°C TJ = 25°C 0 1.0 -75 -50 -25 0 25 50 75 100 100 125 150 175 200 300 400 500 600 700 800 dif / dt - (A / µs) TJ , Temperature ( °C ) Fig. 17 - Typical Recovery Current vs. dif/dt Fig 16. Threshold Voltage Vs. Temperature 20 700 600 16 12 QRR - (nC) IRRM - (A) 500 8 4 400 300 IF = 170A VR = 51V 200 IF = 112A VR = 51V TJ = 125°C 100 TJ = 125°C TJ = 25°C TJ = 25°C 0 0 100 200 300 400 500 600 700 800 100 dif / dt - (A / µs) 200 300 400 500 600 700 800 dif / dt - (A / µs) Fig. 19 - Typical Stored Charge vs. dif/dt Fig. 18 - Typical Recovery Current vs. dif/dt 700 600 QRR - (nC) 500 400 300 200 IF = 170A VR = 51V 100 TJ = 125°C TJ = 25°C 0 100 200 300 400 500 600 700 800 dif / dt - (A / µs) 6 Fig. 20 - Typical Stored Charge vs. dif/dt www.irf.com IRFB3006GPbF Driver Gate Drive D.U.T ƒ - ‚ - - „ * D.U.T. ISD Waveform Reverse Recovery Current +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test VDD P.W. Period VGS=10V Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + D= Period P.W. + + - Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Current Inductor Curent ISD Ripple ≤ 5% * VGS = 5V for Logic Level Devices Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V(BR)DSS 15V DRIVER L VDS tp D.U.T RG VGS 20V + V - DD IAS A 0.01Ω tp I AS Fig 22a. Unclamped Inductive Test Circuit RD VDS Fig 22b. Unclamped Inductive Waveforms VDS 90% VGS D.U.T. RG + - VDD V10V GS 10% VGS Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % td(on) Fig 23a. Switching Time Test Circuit tr t d(off) Fig 23b. Switching Time Waveforms Id Current Regulator Same Type as D.U.T. Vds Vgs 50KΩ 12V tf .2µF .3µF D.U.T. + V - DS Vgs(th) VGS 3mA IG ID Current Sampling Resistors Fig 24a. Gate Charge Test Circuit www.irf.com Qgs1 Qgs2 Qgd Qgodr Fig 24b. Gate Charge Waveform 7 IRFB3006GPbF TO-220AB Package Outline Dimensions are shown in millimeters (inches) TO-220AB Part Marking Information (;$03/( 7+,6,6$1,5)%*3%) 1RWH*VXIIL[LQSDUWQXPEHU LQGLFDWHV+DORJHQ)UHH 1RWH3LQDVVHPEO\OLQHSRVLWLRQ LQGLFDWHV/HDG)UHH ,17(51$7,21$/ 5(&7,),(5 /2*2 $66(0%/< /27&2'( 3$57180%(5 '$7(&2'( < /$67',*,72) &$/(1'$5