IRFB7534PBF

StrongIRFET™ IRFB7534PbF IRFS7534PbF IRFSL7534PbF HEXFET® Power MOSFET Application  Brushed Motor drive applications  BLDC Motor drive applications Battery powered circuits  Half-bridge and full-bridge topologies  Synchronous rectifier applications  Resonant mode power supplies  OR-ing and redundant power switches  DC/DC and AC/DC converters  DC/AC Inverters   VDSS 60V RDS(on) typ. max 2.0m 2.4m ID (Silicon Limited) 232A ID (Package Limited) 195A D G S D D Benefits Improved Gate, Avalanche and Dynamic dV/dt Ruggedness Fully Characterized Capacitance and Avalanche SOA Enhanced body diode dV/dt and dI/dt Capability Lead-Free, RoHS Compliant S D G     S G TO-220AB IRFB7534PbF D2Pak IRFS7534PbF G Gate Package Type IRFB7534PbF IRFSL7534PbF TO-220 TO-262 IRFS7534PbF D2-Pak 15 S Source Orderable Part Number IRFB7534PbF IRFSL7534PbF IRFS7534PbF IRFS7534TRLPbF 250 ID = 100A Limited by package 12 200 9 6 TJ = 125°C 3 150 100 50 TJ = 25°C 0 0 2 4 6 8 10 12 14 16 18 20 VGS, Gate -to -Source Voltage (V) Fig 1. Typical On-Resistance vs. Gate Voltage 1 S D TO-262 IRFSL7534PbF D Drain Standard Pack Form Quantity Tube 50 Tube 50 Tube 50 Tape and Reel Left 800 ID, Drain Current (A) RDS(on), Drain-to -Source On Resistance (m) Base part number G 25 50 75 100 125 150 175 TC , Case Temperature (°C) Fig 2. Maximum Drain Current vs. Case Temperature 2017-04-05 IRFB/S/SL7534PbF   Absolute Maximum Rating Symbol ID @ TC = 25°C ID @ TC = 100°C ID @ TC = 25°C IDM PD @TC = 25°C Parameter Max. Continuous Drain Current, VGS @ 10V (Silicon Limited) 232 Continuous Drain Current, VGS @ 10V (Silicon Limited) 164 Continuous Drain Current, VGS @ 10V (Wire Bond Limited) 195 Pulsed Drain Current  944* Maximum Power Dissipation 294 Linear Derating Factor 1.96 VGS Gate-to-Source Voltage ± 20 TJ Operating Junction and -55 to + 175   TSTG Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) 300 Mounting Torque, 6-32 or M3 Screw 10 lbf·in (1.1 N·m)   Avalanche Characteristics  373 EAS (Thermally limited) Single Pulse Avalanche Energy  775 EAS (Thermally limited) Single Pulse Avalanche Energy  IAR Avalanche Current  See Fig 15, 16, 23a, 23b Repetitive Avalanche Energy  EAR Thermal Resistance   Symbol Parameter Typ. Max. Junction-to-Case  RJC ––– 0.51 Case-to-Sink, Flat Greased Surface RCS 0.50 ––– Junction-to-Ambient (TO-220) RJA ––– 62 Junction-to-Ambient (PCB Mount) (D2-Pak) RJA ––– 40 Static @ TJ = 25°C (unless otherwise specified) Symbol Parameter V(BR)DSS Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage IDSS Drain-to-Source Leakage Current IGSS RG Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Gate Resistance Min. 60 ––– ––– ––– 2.1 ––– ––– ––– ––– ––– Units A W W/°C V °C   mJ A mJ Units °C/W   Typ. Max. Units Conditions ––– ––– V VGS = 0V, ID = 250µA 24 ––– mV/°C Reference to 25°C, ID = 1mA  2.0 2.4 VGS = 10V, ID = 100A  m 2.6 ––– VGS = 6.0V, ID = 50A  ––– 3.7 V VDS = VGS, ID = 250µA ––– 1.0 VDS = 60 V, VGS = 0V µA ––– 150 VDS = 60V,VGS = 0V,TJ =125°C ––– 100 VGS = 20V nA ––– -100 VGS = -20V 1.9 –––  Notes:  Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 195A by source bonding technology. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN-1140)  Repetitive rating; pulse width limited by max. junction temperature.  Limited by TJmax, starting TJ = 25°C, L = 75µH, RG = 50, IAS = 100A, VGS =10V.  ISD  100A, di/dt  1135A/µs, VDD  V(BR)DSS, TJ 175°C.  Pulse width  400µs; duty cycle  2%.  Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.  Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.  R is measured at TJ approximately 90°C. When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994: http://www.irf.com/technical-info/appnotes/an-994.pdf  Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 39A, VGS =10V. * Pulse drain current is limited at 780A by source bonding technology. 2 2017-04-05 IRFB/S/SL7534PbF   Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified) Symbol gfs Qg Qgs Qgd Qsync td(on) tr Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Total Gate Charge Sync. (Qg– Qgd) Turn-On Delay Time Rise Time Min. 498 ––– ––– ––– ––– ––– ––– Typ. ––– 186 43 56 130 20 134 td(off) tf Ciss Coss Crss Turn-Off Delay Time ––– 118 Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Effective Output Capacitance (Energy Related) Output Capacitance (Time Related) ––– ––– ––– ––– 93 10034 921 594 ––– 892 ––– VGS = 0V, VDS = 0V to 48V ––– 1145 ––– VGS = 0V, VDS = 0V to 48V Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Min. Typ. Max. Units ––– ––– 232 ––– ––– 944* Conditions MOSFET symbol showing the integral reverse p-n junction diode. VSD Diode Forward Voltage ––– ––– 1.2 dv/dt Peak Diode Recovery dv/dt trr Reverse Recovery Time Qrr Reverse Recovery Charge IRRM Reverse Recovery Current ––– ––– ––– ––– ––– ––– 9.2 46 49 71 83 2.6 ––– ––– ––– ––– ––– ––– Coss eff.(ER) Coss eff.(TR) Max. Units Conditions ––– S VDS = 10V, ID =100A 279 ID = 100A ––– VDS = 30V nC   ––– VGS = 10V ––– ––– VDD = 30V ––– ID = 100A ns ––– RG= 2.7 VGS = 10V ––– ––– ––– ––– pF   VGS = 0V VDS = 25V ƒ = 1.0MHz, See Fig.7 Diode Characteristics   Symbol IS ISM 3 A V D G S TJ = 25°C,IS = 100A,VGS = 0V  V/ns TJ = 175°C,IS =100A,VDS = 60V TJ = 25°C VDD = 51V ns TJ = 125°C IF = 100A, TJ = 25°C di/dt = 100A/µs  nC TJ = 125°C   A TJ = 25°C  2017-04-05 IRFB/S/SL7534PbF   1000 ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) 1000 100 4.5V TOP 10 60µs PULSE WIDTH Tj = 25°C BOTTOM VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V TOP 60µs PULSE WIDTH 1 0.1 1 10 4.5V 100 100 0.1 VDS, Drain-to-Source Voltage (V) 100 2.4 RDS(on) , Drain-to-Source On Resistance (Normalized) ID, Drain-to-Source Current(A) 10 Fig 4. Typical Output Characteristics 1000 100 TJ = 25°C TJ = 175°C 10 1 VDS = 25V 60µs PULSE WIDTH ID = 100A VGS = 10V 2.0 1.6 1.2 0.8 0.4 0.1 2 4 6 8 -60 VGS, Gate-to-Source Voltage (V) Coss = Cds + Cgd Ciss Coss Crss 1000 100 0.1 1 10 60 100 140 180 14.0 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd 10000 20 Fig 6. Normalized On-Resistance vs. Temperature Fig 5. Typical Transfer Characteristics 100000 -20 TJ , Junction Temperature (°C) VGS, Gate-to-Source Voltage (V) C, Capacitance (pF) 1 VDS, Drain-to-Source Voltage (V) Fig 3. Typical Output Characteristics 100 VDS , Drain-to-Source Voltage (V) Fig 7. Typical Capacitance vs. Drain-to-Source Voltage 4 BOTTOM Tj = 175°C 10 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V ID = 100A 12.0 VDS = 48V VDS = 30V 10.0 VDS= 12V 8.0 6.0 4.0 2.0 0.0 0 50 100 150 200 250 QG, Total Gate Charge (nC) Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage 2017-04-05 IRFB/S/SL7534PbF   1000 ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 1000 TJ = 175°C 100 TJ = 25°C 10 1 VGS = 0V 100µsec 100 Limitted by Package 1 10msec 0.1 DC Tc = 25°C Tj = 175°C Single Pulse 0.01 0.1 0.1 0.4 0.7 1.0 1.3 1.6 0.1 1.9 1 10 VDS , Drain-toSource Voltage (V) VSD , Source-to-Drain Voltage (V) Fig 10. Maximum Safe Operating Area Fig 9. Typical Source-Drain Diode Forward Voltage 1.6 77 Id = 1.0mA 1.4 1.2 74 Energy (µJ) V(BR)DSS, Drain-to-Source Breakdown Voltage (V) 1msec OPERATION IN THIS AREA LIMITED BY RDS(on) 10 71 1.0 0.8 0.6 0.4 68 0.2 0.0 65 -60 -20 20 60 100 140 0 180 TJ , Temperature ( °C ) 20 30 40 50 60 VDS, Drain-to-Source Voltage (V) Fig 11. Drain-to-Source Breakdown Voltage RDS (on), Drain-to -Source On Resistance (m) 10 Fig 12. Typical Coss Stored Energy 12 VGS = 5.5V VGS = 6.0V VGS = 7.0V VGS = 8.0V VGS = 10V 9 6 3 0 0 100 200 300 400 500 ID, Drain Current (A) Fig 13. Typical On-Resistance vs. Drain Current 5 2017-04-05 IRFB/S/SL7534PbF   1 Thermal Response ( Z thJC ) °C/W D = 0.50 0.1 0.20 0.10 0.05 0.02 0.01 0.01 SINGLE PULSE ( THERMAL RESPONSE ) 0.001 0.0001 1E-006 1E-005 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case 1000 Avalanche Current (A) Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 150°C and Tstart =25°C (Single Pulse) 100 10 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming  j = 25°C and Tstart = 150°C. 1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 15. Avalanche Current vs. Pulse Width 400 TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 100A EAR , Avalanche Energy (mJ) 350 300 250 200 150 100 50 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature (°C) Fig 16. Maximum Avalanche Energy vs. Temperature 6 Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1.Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 23a, 23b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 15, 16). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see Figures 14) PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC Iav = 2T/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav   2017-04-05 IRFB/S/SL7534PbF   15 4.0 IF = 60A VR = 51V 3.5 TJ = 25°C TJ = 125°C 10 IRRM (A) VGS(th), Gate threshold Voltage (V) 4.5 3.0 2.5 5 ID = 250µA ID = 1.0mA ID = 1.0A 2.0 1.5 1.0 0 -75 -50 -25 0 25 50 75 100 125 150 175 0 200 TJ , Temperature ( °C ) 400 600 800 1000 diF /dt (A/µs) Fig 18. Typical Recovery Current vs. dif/dt Fig 17. Threshold Voltage vs. Temperature 15 300 IF = 100A VR = 51V 250 TJ = 25°C TJ = 125°C IRRM (A) QRR (nC) 10 IF = 60A VR = 51V TJ = 25°C TJ = 125°C 200 150 5 100 0 50 0 200 400 600 800 1000 0 200 diF /dt (A/µs) 400 600 800 1000 diF /dt (A/µs) Fig 19. Typical Recovery Current vs. dif/dt Fig 20. Typical Stored Charge vs. dif/dt 300 IF = 100A VR = 51V QRR (nC) 250 TJ = 25°C TJ = 125°C 200 150 100 50 0 200 400 600 800 1000 diF /dt (A/µs) Fig 21. Typical Stored Charge vs. dif/dt 7 2017-04-05 IRFB/S/SL7534PbF   Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs Fig 23a. Unclamped Inductive Test Circuit Fig 23b. Unclamped Inductive Waveforms Fig 24a. Switching Time Test Circuit Fig 24b. Switching Time Waveforms Id Vds Vgs VDD  Vgs(th) Qgs1 Qgs2 Fig 25a. Gate Charge Test Circuit 8 Qgd Qgodr Fig 25b. Gate Charge Waveform 2017-04-05 IRFB/S/SL7534PbF   TO-220AB Package Outline (Dimensions are shown in millimeters (inches)) TO-220AB Part Marking Information EXAM PLE: T H IS IS A N IR F 1 0 1 0 LO T C O D E 1789 ASSEM BLED O N W W 19, 2000 IN T H E A S S E M B L Y L IN E "C " N o t e : "P " in a s s e m b ly lin e p o s it io n in d ic a t e s "L e a d - F r e e " IN T E R N A T IO N A L R E C T IF IE R LO G O ASSEM BLY LO T C O D E PART NUM BER D ATE C O D E YEA R 0 = 2000 W EEK 19 L IN E C TO-220AB packages are not recommended for Surface Mount Application. Note: For the most current drawing please refer to website at http://www.irf.com/package/ 9 2017-04-05 IRFB/S/SL7534PbF   TO-262 Package Outline (Dimensions are shown in millimeters (inches) TO-262 Part Marking Information EXAMPLE: THIS IS AN IRL3103L LOT CODE 1789 ASSEMBLED ON WW19, 1997 IN THE ASSEMBLYLINE "C" INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER DATE CODE YEAR 7 = 1997 WEEK 19 LINE C OR INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER DATE CODE P = DESIGNATES LEAD-FREE PRODUCT (OPTIONAL) YEAR 7 = 1997 WEEK 19 A = ASSEMBLYSITE CODE Note: For the most current drawing please refer to website at http://www.irf.com/package/ 10 2017-04-05 IRFB/S/SL7534PbF   D2Pak (TO-263AB) Package Outline (Dimensions are shown in millimeters (inches)) D2Pak (TO-263AB) Part Marking Information THIS IS AN IRF530S WITH LOT CODE 8024 ASSEMBLED ON WW 02, 2000 IN THE ASSEMBLY LINE "L" INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER F530S DATE CODE YEAR 0 = 2000 WEEK 02 LINE L OR INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER F530S DATE CODE P = DESIGNATES LEAD - FREE PRODUCT (OPTIONAL) YEAR 0 = 2000 WEEK 02 A = ASSEMBLY SITE CODE Note: For the most current drawing please refer to website at http://www.irf.com/package/ 11 2017-04-05 IRFB/S/SL7534PbF   D2Pak (TO-263AB) Tape & Reel Information (Dimensions are shown in millimeters (inches)) TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) FEED DIRECTION 1.85 (.073) 1.65 (.065) 1.60 (.063) 1.50 (.059) 11.60 (.457) 11.40 (.449) 0.368 (.0145) 0.342 (.0135) 24.30 (.957) 23.90 (.941) 15.42 (.609) 15.22 (.601) TRL 10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 4.72 (.136) 4.52 (.178) 16.10 (.634) 15.90 (.626) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 60.00 (2.362) MIN. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 Note: For the most current drawing please refer to website at http://www.irf.com/package/ 12 2017-04-05 IRFB/S/SL7534PbF   Qualification Information  Qualification Level   TO-220 D2Pak TO-262 Moisture Sensitivity Level RoHS Compliant † Industrial (per JEDEC JESD47F) † N/A MSL1 N/A Yes Applicable version of JEDEC standard at the time of product release. Revision History Date 11/5/2014 04/05/2017 Comments       Updated EAS (L =1mH) = 775mJ on page 2 Updated note 10 “Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 39A, VGS =10V”. on page 2 Updated package outline on page 9,10,11. Changed datasheet with Infineon logo - all pages. Added disclaimer on last page. Modify Fig 10 on page 5. Trademarks of Infineon Technologies AG µHVIC™, µIPM™, µPFC™, AU-ConvertIR™, AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, CoolDP™, CoolGaN™, COOLiR™, CoolMOS™, CoolSET™, CoolSiC™, DAVE™, DI-POL™, DirectFET™, DrBlade™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, GaNpowIR™, HEXFET™, HITFET™, HybridPACK™, iMOTION™, IRAM™, ISOFACE™, IsoPACK™, LEDrivIR™, LITIX™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OPTIGA™, OptiMOS™, ORIGA™, PowIRaudio™, PowIRStage™, PrimePACK™, PrimeSTACK™, PROFET™, PRO-SIL™, RASIC™, REAL3™, SmartLEWIS™, SOLID FLASH™, SPOC™, StrongIRFET™, SupIRBuck™, TEMPFET™, TRENCHSTOP™, TriCore™, UHVIC™, XHP™, XMC™ Trademarks updated November 2015 Other Trademarks All referenced product or service names and trademarks are the property of their respective owners. Edition 2016-04-19 Published by Infineon Technologies AG 81726 Munich, Germany © 2016 Infineon Technologies AG. All Rights Reserved. Do you have a question about this document? Email: erratum@infineon.com Document reference ifx1 IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”) . With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. 13 For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). Please note that this product is not qualified according to the AEC Q100 or AEC Q101 documents of the Automotive Electronics Council. WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 2017-04-05