IRFI1010NPBF

IRFI1010NPBF

  • 厂商:

    EUPEC(英飞凌)

  • 封装:

    SOT78

  • 描述:

    N沟道,55V,49A,12mΩ@10V

  • 数据手册
  • 价格&库存
IRFI1010NPBF 数据手册
PD - 95418 IRFI1010NPbF l l l l l l Advanced Process Technology Isolated Package High Voltage Isolation = 2.5KVRMS … Sink to Lead Creepage Dist. = 4.8mm Fully Avalanche Rated Lead-Free HEXFET® Power MOSFET D VDSS = 55V RDS(on) = 0.012Ω G ID = 49A S Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The TO-220 Fullpak eliminates the need for additional insulating hardware in commercial-industrial applications. The moulding compound used provides a high isolation capability and a low thermal resistance between the tab and external heatsink. This isolation is equivalent to using a 100 micron mica barrier with standard TO-220 product. The Fullpak is mounted to a heatsink using a single clip or by a single screw fixing. TO-220 FULLPAK Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current † Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy‚† Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt ƒ† Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 srew Max. Units 49 35 290 58 0.38 ± 20 360 43 5.8 5.0 -55 to + 175 A W W/°C V mJ A mJ V/ns 300 (1.6mm from case ) 10 lbf•in (1.1N•m) °C Thermal Resistance Parameter RθJC RθJA Junction-to-Case Junction-to-Ambient Typ. Max. Units ––– ––– 2.6 65 °C/W 06/16/04 IRFI1010NPbF Electrical Characteristics @ TJ = 25°C (unless otherwise specified) RDS(on) VGS(th) gfs Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Min. 55 ––– ––– 2.0 30 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– 0.06 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 11 66 40 46 IDSS Drain-to-Source Leakage Current LD Internal Drain Inductance ––– 4.5 LS Internal Source Inductance ––– 7.5 Ciss Coss Crss C Input Capacitance Output Capacitance Reverse Transfer Capacitance Drain to Sink Capacitance ––– ––– ––– ––– 2900 880 330 12 V(BR)DSS ∆V(BR)DSS/∆TJ IGSS Max. Units Conditions ––– V VGS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 1mA† 0.012 Ω VGS = 10V, ID = 26A „ 4.0 V VDS = VGS, ID = 250µA ––– S VDS = 25V, ID = 43A† 25 VDS = 55V, VGS = 0V µA 250 VDS = 44V, VGS = 0V, TJ = 150°C 100 VGS = 20V nA -100 VGS = -20V 130 ID = 43A 23 nC VDS = 44V 53 VGS = 10V, See Fig. 6 and 13 „† ––– VDD = 28V ––– ID = 43A ns ––– RG = 3.6Ω ––– RD = 0.62Ω, See Fig. 10 „† Between lead, ––– 6mm (0.25in.) nH G from package ––– and center of die contact ––– VGS = 0V ––– V DS = 25V pF ––– ƒ = 1.0MHz, See Fig. 5† ––– ƒ = 1.0MHz D S Source-Drain Ratings and Characteristics IS I SM VSD t rr Q rr Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) † Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Min. Typ. Max. Units ––– ––– 49 ––– ––– 290 ––– ––– ––– ––– 81 240 1.3 120 370 A V ns nC Conditions MOSFET symbol showing the G integral reverse p-n junction diode. TJ = 25°C, IS = 26A, VGS = 0V „ TJ = 25°C, IF = 43A di/dt = 100A/µs „† Notes:  Repetitive rating; pulse width limited by „ Pulse width ≤ 300µs; duty cycle ≤ 2%. ‚ VDD = 25V, starting TJ = 25°C, L = 390µH … t=60s, ƒ=60Hz ƒ ISD ≤ 43A, di/dt ≤ 260A/µs, VDD ≤ V(BR)DSS, † Uses IRF1010N data and test conditions max. junction temperature. ( See fig. 11 ) RG = 25Ω, IAS = 43A. (See Figure 12) T J ≤ 175°C D S IRFI1010NPbF 1000 1000 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 100 4.5V 10 0.1 20µs PULSE WIDTH TC = 25°C 1 10 A 100 4.5V R DS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) 3.0 TJ = 25°C TJ = 175°C 10 V DS = 25V 20µs PULSE WIDTH 5 6 7 8 9 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics 10 A 100 Fig 2. Typical Output Characteristics 1000 1 1 VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 100 20µs PULSE WIDTH TC = 175°C 10 0.1 100 VDS , Drain-to-Source Voltage (V) 4 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP I , Drain-to-Source Current (A) D I , Drain-to-Source Current (A) D TOP 10 A I D = 72A 2.5 2.0 1.5 1.0 0.5 VGS = 10V 0.0 -60 -40 -20 0 20 40 60 A 80 100 120 140 160 180 TJ , Junction Temperature (°C) Fig 4. Normalized On-Resistance Vs. Temperature IRFI1010NPbF 4000 V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd Ciss C oss = C ds + C gd 3000 Coss 20 V GS , Gate-to-Source Voltage (V) C, Capacitance (pF) 5000 I D = 43A V DS = 44V V DS = 28V 16 12 2000 Crss 1000 0 10 4 FOR TEST CIRCUIT SEE FIGURE 13 0 A 1 8 100 0 VDS , Drain-to-Source Voltage (V) 40 60 80 100 120 A 140 Q G , Total Gate Charge (nC) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 1000 1000 OPERATION IN THIS AREA LIMITED BY R DS(on) 100 I D , Drain Current (A) ISD , Reverse Drain Current (A) 20 TJ = 175°C TJ = 25°C 10µs 100 100µs 1ms 10 10ms VGS = 0V 10 0.4 0.8 1.2 1.6 2.0 2.4 VSD , Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage A 2.8 TC = 25°C TJ = 175°C Single Pulse 1 1 A 10 100 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area IRFI1010NPbF VGS RG 40 ID , Drain Current (A) RD V DS 50 D.U.T. + -VDD 10V 30 Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % Fig 10a. Switching Time Test Circuit 20 VDS 90% 10 0 25 50 75 100 125 150 175 10% VGS TC , Case Temperature ( °C) td(on) Fig 9. Maximum Drain Current Vs. Case Temperature tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 D = 0.50 1 0.20 0.10 0.05 0.1 0.01 0.00001 PDM t1 0.02 0.01 t2 SINGLE PULSE (THERMAL RESPONSE) 0.0001 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 10 15V L VDS DRIVER D.U.T RG + V - DD IAS 20V 0.01Ω tp Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp A EAS , Single Pulse Avalanche Energy (mJ) IRFI1010NPbF 1000 TOP BOTTOM 800 ID 18A 31A 43A 600 400 200 0 VDD = 25V 25 50 A 75 100 125 150 175 Starting TJ , Junction Temperature (°C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current I AS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V .2µF .3µF 10 V QGS D.U.T. QGD VGS VG 3mA IG Charge Fig 13a. Basic Gate Charge Waveform ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit + V - DS IRFI1010NPbF Peak Diode Recovery dv/dt Test Circuit Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + D.U.T ƒ + ‚ - - „ +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Driver Gate Drive P.W. Period D= + - VDD P.W. Period VGS=10V D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS ISD * IRFI1010NPbF TO-220 Full-Pak Package Outline Dimensions are shown in millimeters (inches) TO-220 Full-Pak Part Marking Information E XAMP L E : T H IS IS AN IR F I840G WIT H AS S E MB L Y L OT CODE 3432 AS S E MB L E D ON WW 24 1999 IN T H E AS S E MB L Y L IN E "K " P AR T N U MB E R IN T E R N AT IONAL R E CT IF IE R L OGO IR F I840G 924K 34 Note: "P" in assembly line position indicates "Lead-Free" AS S E MB L Y L OT COD E 32 DAT E COD E YE AR 9 = 1999 WE E K 24 L IN E K Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 06/04 Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/ IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”) . With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.
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