IRFI3306GPbF
HEXFET® Power MOSFET
Applications
High Efficiency Synchronous Rectification in SMPS
Uninterruptible Power Supply
High Speed Power Switching
Hard Switched and High Frequency Circuits
VDSS
RDS(on) typ.
Package Type
IRFI3306GPbF
TO-220 Full-Pak
max.
4.2m
71A
D
G
G
S
D
S
TO-220 Full-Pak
G
D
S
Gate
Drain
Source
Standard Pack
Form
Quantity
Tube
50
Absolute Maximum Ratings
Symbol
Parameter
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V
ID @ TC = 100°C
Continuous Drain Current, VGS @ 10V
IDM
Pulsed Drain Current
PD @TC = 25°C
Maximum Power Dissipation
Linear Derating Factor
VGS
Gate-to-Source Voltage
EAS
Single Pulse Avalanche Energy (Thermally Limited)
TJ
Operating Junction and
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Mounting torque, 6-32 or M3 screw
Thermal Resistance
Symbol
Parameter
Junction-to-Case
RJC
Junction-to-Ambient (PCB Mount)
RJA
1
3.3m
ID
Benefits
Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
Fully Characterized Capacitance and Avalanche
SOA
Enhanced body diode dV/dt and dI/dt Capability
Lead-Free
Halogen-Free
Base Part Number
60V
Orderable Part Number
IRFI3306GPbF
Max.
71
50
300
46
0.31
± 20
311
-55 to + 175
Units
A
W
W/°C
V
mJ
°C
300
10lbin (1.1Nm)
Typ.
–––
–––
Max.
3.23
65
Units
°C/W
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IRFI3306GPbF
Static Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max.
V(BR)DSS
Drain-to-Source Breakdown Voltage
60
–––
–––
––– 0.068 –––
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient
–––
3.3
4.2
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
2.0
–––
4.0
–––
–––
20
IDSS
Drain-to-Source Leakage Current
–––
–––
250
IGSS
Gate-to-Source Forward Leakage
–––
–––
100
Gate-to-Source Reverse Leakage
–––
––– -100
RG(int)
Internal Gate Resistance
––– 0.72 –––
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max.
gfs
Forward Transconductance
89
–––
–––
Qg
Total Gate Charge
–––
90
135
Qgs
Gate-to-Source Charge
–––
22
–––
Qgd
Gate-to-Drain ("Miller") Charge
–––
26
–––
Qsync
Total Gate Charge Sync. (Qg - Qgd)
–––
116
–––
td(on)
Turn-On Delay Time
–––
15
–––
tr
Rise Time
–––
30
–––
td(off)
Turn-Off Delay Time
–––
45
–––
Fall Time
–––
33
–––
tf
Ciss
Input Capacitance
––– 4685 –––
Coss
Output Capacitance
–––
506
–––
Crss
Reverse Transfer Capacitance
–––
310
–––
Coss eff. (ER) Effective Output Capacitance (Energy Related) –––
733
–––
Coss eff. (TR) Effective Output Capacitance (Time Related)
–––
822
–––
Diode Characteristics
Symbol
Parameter
Min. Typ. Max.
Continuous Source Current
–––
–––
71
IS
(Body Diode)
Pulsed Source Current
–––
–––
300
ISM
(Body Diode)
VSD
Diode Forward Voltage
–––
–––
1.3
dv/dt
Peak Diode Recovery
–––
2.3
–––
–––
43
–––
trr
Reverse Recovery Time
–––
47
–––
–––
63
–––
Qrr
Reverse Recovery Charge
–––
78
–––
IRRM
Reverse Recovery Current
–––
2.5
–––
Notes:
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.34mH
RG = 50, IAS = 43A, VGS =10V. Part not recommended for use
above this value.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
Rθ is measured at TJ approximately 90°C.
2
Units
V
V/°C
m
V
µA
nA
Conditions
VGS = 0V, ID = 250µA
Reference to 25°C, ID = 5.0mA
VGS = 10V, ID = 43A
VDS = VGS, ID = 150µA
VDS = 60V, VGS = 0V
VDS = 60V, VGS = 0V, TJ = 125°C
VGS = 20V
VGS = -20V
Units
Conditions
S VDS = 25V, ID = 43A
ID = 43A
nC VDS = 30V
VGS = 10V
ID = 43A, VDS =0V, VGS = 10V
VDD = 39V
ns ID = 43A
RG = 2.7
VGS = 10V
VGS = 0V
VDS = 50V
pF ƒ = 1.0 MHz
VGS = 0V, VDS = 0V to 48V
VGS = 0V, VDS = 0V to 48V
Units
Conditions
A MOSFET symbol
showing the
A integral reverse
p-n junction diode.
V TJ = 25°C, IS = 43A, VGS = 0V
V/ns
TJ = 25°C
VR = 51V
ns
TJ = 125°C
IF = 43A
TJ = 25°C
di/dt = 100A/µs
nC
TJ = 125°C
A TJ = 25°C
Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
2017-04-27
IRFI3306GPbF
1000
1000
BOTTOM
VGS
15V
12V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
12V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
BOTTOM
100
100
4.8V
4.8V
60µs PULSE WIDTH
60µs PULSE WIDTH
Tj = 175°C
Tj = 25°C
10
10
0.1
1
10
0.1
100
Fig. 1 Typical Output Characteristics
2.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
100
Fig. 2 Typical Output Characteristics
1000
100
T J = 175°C
T J = 25°C
10
VDS = 25V
60µs PULSE WIDTH
1.0
ID = 43A
VGS = 10V
2.0
1.5
1.0
0.5
2
3
4
5
6
7
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig. 4 Normalized On-Resistance vs. Temperature
Fig. 3 Typical Transfer Characteristics
100000
14.0
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
VGS, Gate-to-Source Voltage (V)
ID= 43A
C oss = C ds + C gd
C, Capacitance (pF)
10
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
10000
Ciss
Coss
Crss
1000
100
12.0
VDS= 48V
VDS= 30V
10.0
VDS= 12V
8.0
6.0
4.0
2.0
0.0
1
3
1
10
100
0
20
40
60
80
100
120
VDS, Drain-to-Source Voltage (V)
QG, Total Gate Charge (nC)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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IRFI3306GPbF
1000
100
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
T J = 175°C
T J = 25°C
10
OPERATION IN THIS AREA
LIMITED BY RDS(on)
1msec
100
10msec
10
1
DC
0.1
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
1.0
0.01
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0.1
VSD, Source-to-Drain Voltage (V)
ID, Drain Current (A)
60
40
20
0
50
75
100
125
100
150
175
80
Id = 5mA
75
70
65
60
55
-60 -40 -20 0 20 40 60 80 100120140160180
TC , Case Temperature (°C)
T J , Temperature ( °C )
Fig 9. Maximum Drain Current vs. Case Temperature
1.6
Fig 10. Drain-to-Source Breakdown Voltage
EAS , Single Pulse Avalanche Energy (mJ)
1400
1.4
ID
14A
23A
BOTTOM 43A
TOP
1200
1.2
Energy (µJ)
10
Fig 8. Maximum Safe Operating Area
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
80
25
1
VDS, Drain-to-Source Voltage (V)
Fig. 7 Typical Source-to-Drain Diode
Forward Voltage
1000
1.0
0.8
0.6
0.4
0.2
0.0
-10
0
10
20
30
40
50
60
VDS, Drain-to-Source Voltage (V)
Fig 11. Typical COSS Stored Energy
4
100µsec
70
800
600
400
200
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 12. Maximum Avalanche Energy vs. Drain Current
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IRFI3306GPbF
Thermal Response ( Z thJC ) °C/W
10
D = 0.50
1
0.20
0.10
0.05
0.1
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
0.01
0.1
1
10
t1 , Rectangular Pulse Duration (sec)
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
100
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
Avalanche Current (A)
Duty Cycle = Single Pulse
0.01
10
0.05
0.10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
Notes on Repetitive Avalanche Curves , Figures 13, 14:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
350
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 43A
EAR , Avalanche Energy (mJ)
300
250
200
150
100
50
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 15. Maximum Avalanche Energy vs. Temperature
5
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
2017-04-27
IRFI3306GPbF
20
IF = 28A
V R = 51V
3.5
TJ = 25°C
TJ = 125°C
15
3.0
2.5
ID
ID
ID
ID
2.0
IRRM (A)
VGS(th) , Gate threshold Voltage (V)
4.0
= 150µA
= 250µA
= 1.0mA
= 1.0A
10
5
1.5
1.0
0
-75 -50 -25
0
25 50 75 100 125 150 175
0
200
T J , Temperature ( °C )
600
800
1000
diF /dt (A/µs)
Fig 17. Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
20
400
IF = 43A
V R = 51V
IF = 28A
V R = 51V
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
300
QRR (nC)
15
IRRM (A)
400
10
5
200
100
0
0
0
200
400
600
800
1000
0
200
diF /dt (A/µs)
400
600
800
1000
diF /dt (A/µs)
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig. 19 - Typical Stored Charge vs. dif/dt
400
IF = 43A
V R = 51V
TJ = 25°C
TJ = 125°C
QRR (nC)
300
200
100
0
0
200
400
600
800
1000
diF /dt (A/µs)
Fig. 20 - Typical Stored Charge vs. dif/dt
6
2017-04-27
IRFI3306GPbF
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
Fig 22a. Unclamped Inductive Test Circuit
Fig 23a. Switching Time Test Circuit
Fig 22b. Unclamped Inductive Waveforms
Fig 23b. Switching Time Waveforms
VDD
Fig 24a. Gate Charge Test Circuit
7
Fig 24b. Gate Charge Waveform
2017-04-27
IRFI3306GPbF
TO-220 Full-Pak Package Outline (Dimensions are shown in millimeters (inches))
TO-220 Full-Pak Part Marking Information
TO-220AB Full-Pak packages are not recommended for Surface Mount Application.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
8
2017-04-27
IRFI3306GPbF
Qualification information
Industrial
Qualification level
(per JEDEC JESD47F †guidelines )
Moisture Sensitivity Level
N/A
TO-220 Full-Pak
(per JEDEC J-STD-020D† )
RoHS compliant
†
Yes
Applicable version of JEDEC standard at the time of product release.
Revision History
Date
Comments
10/07/2013
Removed the “Silicon Limited” from the ID rating, on page 1.
04/27/2017
Changed datasheet with Infineon logo - all pages.
Corrected Package Outline on page 8.
Added disclaimer on last page.
Trademarks of Infineon Technologies AG
µHVIC™, µIPM™, µPFC™, AU-ConvertIR™, AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, CoolDP™, CoolGaN™, COOLiR™, CoolMOS™, CoolSET™,
CoolSiC™, DAVE™, DI-POL™, DirectFET™, DrBlade™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™,
GaNpowIR™, HEXFET™, HITFET™, HybridPACK™, iMOTION™, IRAM™, ISOFACE™, IsoPACK™, LEDrivIR™, LITIX™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™,
OPTIGA™, OptiMOS™, ORIGA™, PowIRaudio™, PowIRStage™, PrimePACK™, PrimeSTACK™, PROFET™, PRO-SIL™, RASIC™, REAL3™, SmartLEWIS™, SOLID
FLASH™, SPOC™, StrongIRFET™, SupIRBuck™, TEMPFET™, TRENCHSTOP™, TriCore™, UHVIC™, XHP™, XMC™
Trademarks updated November 2015
Other Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
Edition 2016-04-19
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2016 Infineon Technologies AG.
All Rights Reserved.
Do you have a question about this
document?
Email: erratum@infineon.com
Document reference
ifx1
IMPORTANT NOTICE
The information given in this document shall in no
event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”) .
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon
Technologies hereby disclaims any and all
warranties and liabilities of any kind, including
without limitation warranties of non-infringement
of intellectual property rights of any third party.
In addition, any information given in this
document is subject to customer’s compliance
with its obligations stated in this document and
any applicable legal requirements, norms and
standards concerning customer’s products and
any use of the product of Infineon Technologies in
customer’s applications.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility
of
customer’s
technical
departments to evaluate the suitability of the
product for the intended application and the
completeness of the product information given in
this document with respect to such application.
9
For further information on the product, technology,
delivery terms and conditions and prices please
contact your nearest Infineon Technologies office
(www.infineon.com).
Please note that this product is not qualified
according to the AEC Q100 or AEC Q101 documents
of the Automotive Electronics Council.
WARNINGS
Due to technical requirements products may
contain dangerous substances. For information on
the types in question please contact your nearest
Infineon Technologies office.
Except as otherwise explicitly approved by Infineon
Technologies in a written document signed by
authorized
representatives
of
Infineon
Technologies, Infineon Technologies’ products
may not be used in any applications where a
failure of the product or any consequences of the
use thereof can reasonably be expected to result in
personal injury.
2017-04-27
