IRFI520N

PD - 9.1362A IRFI520N PRELIMINARY HEXFET® Power MOSFET l l l l l Advanced Process Technology Isolated Package High Voltage Isolation = 2.5KVRMS … Sink to Lead Creepage Dist. = 4.8mm Fully Avalanche Rated D VDSS = 100V RDS(on) = 0.20Ω G Description ID = 7.6A S Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. The TO-220 Fullpak eliminates the need for additional insulating hardware in commercial-industrial applications. The moulding compound used provides a high isolation capability and a low thermal resistance between the tab and external heatsink. This isolation is equivalent to using a 100 micron mica barrier with standard TO-220 product. The Fullpak is mounted to a heatsink using a single clip or by a single screw fixing. TO-220 FULLPAK Absolute Maximum Ratings ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG Parameter Max. Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current † Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy ‚† Avalanche Current† Repetitive Avalanche Current Peak Diode Recovery dv/dt ƒ† Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw. 7.6 5.3 38 30 0.20 ±20 91 5.7 3.0 5.0 -55 to + 175 Units A W W/°C V mJ A mJ V/ns °C 300 (1.6mm from case) 10 lbf•in (1.1N•m) Thermal Resistance Parameter RθJC RθJA Junction-to-Case Junction-to-Ambient Min. Typ. Max. –––– –––– –––– –––– 5.0 65 Units °C/W 3/16/98 IRFI520N Electrical Characteristics @ TJ = 25°C (unless otherwise specified) RDS(on) VGS(th) gfs Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Min. 100 ––– ––– 2.0 2.7 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– IDSS Drain-to-Source Leakage Current LD Internal Drain Inductance ––– LS Internal Source Inductance ––– ––– Ciss Coss Crss C Input Capacitance Output Capacitance Reverse Transfer Capacitance Drain to Sink Capacitance ––– ––– ––– ––– V(BR)DSS ∆V(BR)DSS/∆TJ IGSS Typ. ––– 0.11 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 4.5 23 32 23 Max. Units Conditions ––– V VGS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 1mA† 0.20 Ω VGS = 10V, ID = 4.3A „ 4.0 V VDS = VGS, ID = 250µA ––– S VDS = 25V, ID = 5.7A† 25 VDS = 100V, VGS = 0V µA 250 VDS = 80V, VGS = 0V, TJ = 150°C 100 VGS = 20V nA -100 VGS = -20V 25 ID = 5.7A 4.4 nC VDS = 80V 11 VGS = 10V, See Fig. 6 and 13 „† ––– VDD = 50V ––– ID = 5.7A ns ––– RG = 22Ω ––– RD = 8.6Ω, See Fig. 10 „† Between lead, 4.5 ––– 6mm (0.25in.) nH from package ––– 7.5 ––– and center of die contact 330 ––– VGS = 0V 92 ––– VDS = 25V pF 54 ––– ƒ = 1.0MHz, See Fig. 5† 12 ––– ƒ = 1.0MHz D G S Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) † Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Min. Typ. Max. Units ––– ––– 7.6 ––– ––– 38 ––– ––– ––– ––– 99 390 1.3 150 580 A V ns nC Conditions MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25°C, IS = 4.3A, VGS = 0V „ TJ = 25°C, IF = 5.7A di/dt = 100A/µs „† Notes:  Repetitive rating; pulse width limited by „ Pulse width ≤ 300µs; duty cycle ≤ 2%. max. junction temperature. ( See fig. 11 ) ‚ VDD = 25V, starting TJ = 25°C, L = 4.7mH … t=60s, ƒ=60Hz RG = 25Ω, IAS = 5.7A. (See Figure 12) ƒ ISD ≤ 5.7A, di/dt ≤ 240A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C † Uses IRF520N data and test conditions D G S IRFI520N 100 100 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 10 4.5V 20µ s P U LS E W ID TH TC = 25°C 1 0.1 1 10 A 10 4.5V 100 0.1 R D S (on ) , D rain-to-S ource O n R esistance (N orm alized) I D , D ra in -to-S o urc e C urren t (A ) 3.0 T J = 2 5 °C TJ = 1 7 5 °C V DS = 5 0V 2 0 µ s P U L S E W ID T H 5 6 7 8 9 10 A 100 Fig 2. Typical Output Characteristics 100 1 1 V D S , D rain-to-S ource V oltage (V ) Fig 1. Typical Output Characteristics 10 20µ s P U LS E W ID TH T C = 175°C 1 V D S , D rain-to-S ource V oltage (V ) 4 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP I , D rain-to-S ource C urrent (A ) D I , D rain-to-S ource C urrent (A ) D TOP 10 V G S , G a te -to -S o u rc e V o lta g e (V ) Fig 3. Typical Transfer Characteristics A I D = 9.5A 2.5 2.0 1.5 1.0 0.5 V G S = 10V 0.0 -60 -40 -20 0 20 40 60 80 A 100 120 140 160 180 T J , Junction T em perature (°C ) Fig 4. Normalized On-Resistance Vs. Temperature IRFI520N 20 V GS C is s C rs s C oss 500 C , C apacitanc e (pF ) C iss = = = = 0V , f = 1M H z C gs + C gd , Cds S H O R TE D C gd C ds + C gd V G S , G ate-to-S ource V oltage (V ) 600 400 C oss 300 200 C rs s 100 0 10 16 12 8 4 FO R TE S T C IR C U IT S E E FIG U R E 13 0 100 5 10 15 20 A 25 Q G , Total G ate C harge (nC ) V D S , D rain-to-S ource V oltage (V ) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 100 100 O P E R A TIO N IN TH IS A R E A LIM ITE D B Y R D S (on) 10µ s I D , D rain C urrent (A ) I S D , R everse D rain C urrent (A ) V D S = 80V V D S = 50V V D S = 20V 0 A 1 I D = 5.7A TJ = 175°C 10 TJ = 25°C V G S = 0V 1 0.4 0.6 0.8 1.0 1.2 V S D , S ource-to-D rain V oltage (V ) Fig 7. Typical Source-Drain Diode Forward Voltage A 1.4 10 100µ s 1m s 1 10m s T C = 25°C T J = 175°C S ingle P ulse 0.1 1 A 10 100 1000 V D S , D rain-to-S ource V oltage (V ) Fig 8. Maximum Safe Operating Area IRFI520N RD VDS 8.0 VGS D.U.T. + -VDD 6.0 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 4.0 Fig 10a. Switching Time Test Circuit 2.0 VDS 90% 0.0 25 50 75 100 125 150 175 TC , Case Temperature ( ° C) 10% VGS td(on) Fig 9. Maximum Drain Current Vs. Case Temperature tr t d(off) tf Fig 10b. Switching Time Waveforms 10 Thermal Response (Z thJC ) I D , Drain Current (A) RG D = 0.50 1 0.20 0.10 0.05 0.02 0.01 0.1 0.01 0.00001 P DM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 1 IRFI520N L D.U.T. RG + - VDD IAS 10 V tp 0.01Ω Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp VDD E A S , S ingle P ulse A valanc he E nergy (m J) 200 VDS TO P B O TTO M 160 ID 2.3A 4.0A 5.7A 120 80 40 0 V D D = 25V 25 50 A 75 100 125 150 175 S tarting T J , Junction T em perature (°C ) VDS Fig 12c. Maximum Avalanche Energy Vs. Drain Current IAS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V .2µF .3µF 10 V QGS D.U.T. QGD + V - DS VGS VG 3mA IG Charge Fig 13a. Basic Gate Charge Waveform ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit IRFI520N Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer ƒ + ‚ - - „ +  • • • • RG Driver Gate Drive P.W. + dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test D= Period - VDD P.W. Period VGS=10V D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS ISD * IRFI520N Package Outline TO-220 FullPak Outline Dimensions are shown in millimeters (inches) 10.60 (.417) 10.40 (.409) ø 3.40 (.133) 3.10 (.123) 4.80 (.189) 4.60 (.181) -A3.70 (.145) 3.20 (.126) 16.00 (.630) 15.80 (.622) 2.80 (.110) 2.60 (.102) LE A D A S S IG N ME N TS 1 - G A TE 2 - D R A IN 3 - SOURCE 7.10 (.280) 6.70 (.263) 1.15 (.045) M IN . NOTES: 1 D IME N S IO N IN G & TO LE R A N C IN G P E R A N S I Y 14.5M , 1982 1 2 3 2 C O N TR O LLIN G D IM E N S IO N : IN C H . 3.30 (.130) 3.10 (.122) -B- 13.70 (.540) 13.50 (.530) C A 1.40 (.055) 3X 1.05 (.042) 0.90 (.035) 3X 0.70 (.028) 0.25 (.010) 3X M A M B 2.54 (.100) 2X 0.48 (.019) 0.44 (.017) 2.85 (.112) 2.65 (.104) D B M IN IM U M C R E E P A G E D IS TA N C E B E TW E E N A -B -C -D = 4.80 (.189) Part Marking Information TO-220 FullPak E X A M P L E : T H IS IS A N IR F I8 4 0 G W ITH A S S E M B L Y LOT COD E E401 A IN T E R N A T IO N A L R E C T IF IE R LOGO PART NUMBER IR F I8 4 0 G E 40 1 92 45 ASSEMBLY LOT CODE D ATE CO DE (Y Y W W ) Y Y = YE A R W W = W EEK WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371 http://www.irf.com/ Data and specifications subject to change without notice. 3/98 Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/