IRFIZ24EPBF

PD - 95594 IRFIZ24EPbF Advanced Process Technology l Isolated Package l High Voltage Isolation = 2.5KVRMS … l Sink to Lead Creepage Dist. = 4.8mm l Fully Avalanche Rated l Lead-Free Description HEXFET® Power MOSFET l D VDSS = 60V RDS(on) = 0.071Ω G Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. ID = 14A S The TO-220 Fullpak eliminates the need for additional insulating hardware in commercial-industrial applications. The moulding compound used provides a high isolation capability and a low thermal resistance between the tab and external heatsink. This isolation is equivalent to using a 100 micron mica barrier with standard TO-220 product. The Fullpak is mounted to a heatsink using a single clip or by a single screw fixing. TO-220 FULLPAK Absolute Maximum Ratings ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C V GS EAS IAR EAR dv/dt TJ TSTG Parameter Max. Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current † Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy‚† Avalanche Current† Repetitive Avalanche Energy Peak Diode Recovery dv/dt ƒ† Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw 14 9.6 68 29 0.19 ± 20 71 10 2.9 5.0 -55 to + 175 Units A W W/°C V mJ A mJ V/ns 300 (1.6mm from case ) 10 lbf•in (1.1N•m) °C Thermal Resistance Parameter RθJC RθJA Junction-to-Case Junction-to-Ambient Typ. Max. Units ––– ––– 5.2 65 °C/W 07/23/04 IRFIZ24EPbF Electrical Characteristics @ TJ = 25°C (unless otherwise specified) RDS(on) VGS(th) gfs Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Min. 60 ––– ––– 2.0 4.5 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– 0.052 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 4.9 34 19 27 IDSS Drain-to-Source Leakage Current LD Internal Drain Inductance ––– 4.5 LS Internal Source Inductance ––– 7.5 Ciss Coss Crss C Input Capacitance Output Capacitance Reverse Transfer Capacitance Drain to Sink Capacitance ––– ––– ––– ––– 370 140 65 12 V(BR)DSS ∆V(BR)DSS/∆TJ IGSS Max. Units Conditions ––– V V GS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 1mA† 0.071 Ω V GS = 10V, ID = 7.8A „ 4.0 V V DS = V GS, ID = 250µA ––– S V DS = 25V, ID = 10A† 25 V DS = 60V, VGS = 0V µA 250 V DS = 48V, VGS = 0V, TJ = 150°C 100 V GS = 20V nA -100 V GS = -20V 20 I D = 10A 5.3 nC V DS = 44V 7.6 V GS = 10V, See Fig. 6 and 13 „† ––– V DD = 28V ––– I D = 10A ns ––– R G = 24Ω ––– R D = 2.6Ω, See Fig. 10 „† Between lead, ––– 6mm (0.25in.) nH G from package ––– and center of die contact ––– V GS = 0V ––– V DS = 25V pF ––– ƒ = 1.0MHz, See Fig. 5† ––– ƒ = 1.0MHz D S Source-Drain Ratings and Characteristics IS I SM VSD t rr Qrr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) † Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol 14 ––– ––– showing the A G integral reverse ––– ––– 68 p-n junction diode. S ––– ––– 1.3 V TJ = 25°C, IS = 7.8A, VGS = 0V „ ––– 56 83 ns TJ = 25°C, IF = 10A ––– 120 180 µC di/dt = 100A/µs „† Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes:  Repetitive rating; pulse width limited by „ Pulse width ≤ 300µs; duty cycle ≤ 2%. ‚ VDD = 25V, starting TJ = 25°C, L = 1.0mH … t=60s, ƒ=60Hz ƒ ISD ≤ 10A, di/dt ≤ 280A/µs, VDD ≤ V(BR)DSS, † Uses IRFZ24N data and test conditions max. junction temperature. ( See fig. 11 ) RG = 25Ω, IAS = 10A. (See Figure 12) T J ≤ 175°C IRFIZ24EPbF 100 100 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 10 4.5V 20µs PULSE WIDTH TC = 25°C 1 0.1 1 10 A 10 4.5V 3.0 R DS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) TJ = 25°C TJ = 175°C 10 V DS = 25V 20µs PULSE WIDTH 6 7 8 9 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics 10 A 100 Fig 2. Typical Output Characteristics 100 5 1 VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 1 20µs PULSE WIDTH TC = 175°C 1 0.1 100 VDS , Drain-to-Source Voltage (V) 4 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP I , Drain-to-Source Current (A) D I , Drain-to-Source Current (A) D TOP 10 A I D = 17A 2.5 2.0 1.5 1.0 0.5 VGS = 10V 0.0 -60 -40 -20 0 20 40 60 A 80 100 120 140 160 180 TJ , Junction Temperature (°C) Fig 4. Normalized On-Resistance Vs. Temperature IRFIZ24EPbF 700 500 Ciss 400 Coss V GS , Gate-to-Source Voltage (V) 600 C, Capacitance (pF) 20 V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd C oss = C ds + C gd V DS = 44V V DS = 28V 16 12 300 200 I D = 10A Crss 100 0 10 4 FOR TEST CIRCUIT SEE FIGURE 13 0 A 1 8 0 100 4 VDS , Drain-to-Source Voltage (V) 12 16 A 20 Q G , Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 100 1000 OPERATION IN THIS AREA LIMITED BY RDS(on) I D , Drain Current (A) ISD , Reverse Drain Current (A) 8 TJ = 175°C TJ = 25°C 10 VGS = 0V 1 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 VSD , Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage A 2.0 100 10us 100us 10 1ms TC = 25 ° C TJ = 175 ° C Single Pulse 1 1 10ms 10 100 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area 1000 IRFIZ24EPbF 15 RD V DS VGS 12 D.U.T. ID , Drain Current (A) RG 9 + -VDD 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 6 Fig 10a. Switching Time Test Circuit 3 VDS 90% 0 25 50 75 100 125 150 175 TC , Case Temperature ( °C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 D = 0.50 0.20 1 0.10 0.05 0.02 0.01 0.1 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 0.01 0.00001 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 1 L VDS D.U.T. RG + V - DD IAS 5.0 V tp 0.01Ω Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS E AS , Single Pulse Avalanche Energy (mJ) IRFIZ24EPbF 140 TOP 120 BOTTOM 100 80 60 40 20 VDD = 25V 0 25 tp 50 A 75 100 125 150 175 Starting TJ , Junction Temperature (°C) VDD Fig 12c. Maximum Avalanche Energy Vs. Drain Current VDS IAS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V .2µF .3µF 10 V QGS ID 4.2A 7.2A 10A D.U.T. QGD + V - DS VGS VG 3mA Charge Fig 13a. Basic Gate Charge Waveform IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit IRFIZ24EPbF Peak Diode Recovery dv/dt Test Circuit Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + D.U.T ƒ + ‚ - - „ +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Driver Gate Drive P.W. Period D= + - VDD P.W. Period VGS=10V D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS ISD * IRFIZ24EPbF TO-220 Full-Pak Package Outline Dimensions are shown in millimeters (inches) TO-220 Full-Pak Part Marking Information E XAMP L E : T H IS IS AN IR F I840G WIT H AS S E MB L Y L OT CODE 3432 AS S E MB L E D ON WW 24 1999 IN T H E AS S E MB L Y L IN E "K " P AR T N U MB E R IN T E R N AT IONAL R E CT IF IE R L OGO IR F I840G 924K 34 Note: "P" in assembly line position indicates "Lead-Free" AS S E MB L Y L OT CODE 32 D AT E COD E YE AR 9 = 1999 WE E K 24 L IN E K Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 07/04 Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/