PD - 9.1674A
IRFIZ34E
HEXFET® Power MOSFET
l
l
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Advanced Process Technology
Isolated Package
High Voltage Isolation = 2.5KVRMS
Sink to Lead Creepage Dist. = 4.8mm
Fully Avalanche Rated
D
VDSS = 60V
RDS(on) = 0.042Ω
G
ID = 21A
S
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial applications.
The moulding compound used provides a high isolation
capability and a low thermal resistance between the tab
and external heatsink. This isolation is equivalent to using
a 100 micron mica barrier with standard TO-220 product.
The Fullpak is mounted to a heatsink using a single clip or
by a single screw fixing.
TO-220 FULLPAK
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw
Max.
Units
21
15
100
37
0.24
± 20
110
16
3.7
5.0
-55 to + 175
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθJA
Junction-to-Case
Junction-to-Ambient
Typ.
Max.
Units
–––
–––
4.1
65
°C/W
9/22/97
IRFIZ34E
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Qg
Q gs
Q gd
t d(on)
tr
t d(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
60
–––
–––
2.0
6.5
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.052
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
7.0
49
31
40
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
4.5
LS
Internal Source Inductance
–––
7.5
Ciss
Coss
Crss
C
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Drain to Sink Capacitance
–––
–––
–––
–––
700
240
100
12
V(BR)DSS
∆V(BR)DSS/∆TJ
I GSS
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, I D = 1mA
0.042
Ω
VGS = 10V, I D = 11A
4.0
V
VDS = VGS, I D = 250µA
–––
S
VDS = 25V, ID = 16A
25
VDS = 60V, VGS = 0V
µA
250
VDS = 48V, VGS = 0V, TJ = 150°C
100
V GS = 20V
nA
-100
VGS = -20V
34
ID = 16A
6.8
nC VDS = 44V
14
VGS = 10V, See Fig. 6 and 13
–––
VDD = 28V
–––
I D = 16A
ns
–––
RG = 18Ω
–––
RD = 1.8Ω, See Fig. 10
Between lead,
–––
6mm (0.25in.)
nH
G
from package
–––
and center of die contact
–––
VGS = 0V
–––
V
DS = 25V
pF
–––
ƒ = 1.0MHz, See Fig. 5
–––
ƒ = 1.0MHz
D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD
t rr
Q rr
t on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
21
––– –––
showing the
A
G
integral reverse
––– ––– 100
p-n junction diode.
S
––– ––– 1.6
V
TJ = 25°C, IS = 11A, VGS = 0V
––– 57
86
ns
TJ = 25°C, IF = 16A
––– 130 200
µC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. ( See fig. 11 )
VDD = 25V, starting TJ = 25°C, L = 610µH
t=60s, ƒ=60Hz
RG = 25Ω, IAS = 16A. (See Figure 12)
ISD ≤ 16A, di/dt ≤ 420A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Uses IRFZ34N data and test conditions
IRFIZ34E
1000
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTT OM 4.5V
I , D ra in -to -S o u rce C u rre n t (A )
D
I , D ra in -to -S o u rce C u rre n t (A )
D
100
10
4 .5V
2 0µ s PU LSE W ID TH
TC = 2 5°C
1
0.1
1
10
100
10
4 .5V
20 µs PU L SE W ID TH
T C = 175 °C
1
A
0.1
100
Fig 1. Typical Output Characteristics
R D S (o n) , D ra in -to -S o u rc e O n R e s ista n ce
(N o rm a lize d )
I D , D r ain- to-S ourc e C u rre nt (A )
2.4
TJ = 2 5 °C
TJ = 1 7 5 °C
10
VD S = 2 5 V
2 0 µ s PU L SE W ID TH
5
6
7
8
9
V G S , Ga te-to-S o urce V oltage (V )
Fig 3. Typical Transfer Characteristics
10
A
100
Fig 2. Typical Output Characteristics
100
1
1
V D S , Drain-to-Source V oltage (V)
V D S , D rain-to-S ource V oltage (V )
4
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTT OM 4.5V
TOP
TOP
10
A
I D = 26 A
2.0
1.6
1.2
0.8
0.4
VG S = 1 0V
0.0
-60 -40 -20
0
20
40
60
80
A
100 120 140 160 180
T J , Junction T emperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
IRFIZ34E
V GS
C iss
C rss
C is s C oss
C , C a p a c ita n c e (p F )
1000
=
=
=
=
20
0V,
f = 1 MH z
C gs + C gd , C ds SH O R TED
C gd
C ds + C gd
V G S , G a te -to -S o u rc e V o lta g e (V )
1200
I D = 1 6A
V DS = 4 4V
V DS = 2 8V
16
800
C o ss
12
600
400
C rs s
200
0
10
4
FO R TES T C IR CU IT
SEE FIG U R E 13
0
A
1
8
100
0
10
V D S , Drain-to-Source V oltage (V)
30
A
40
Q G , Total Gate Charge (nC )
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
I D , Drain Current (A)
IS D , R e ve rs e D ra in C u rre n t (A )
20
100
100
TJ = 175 °C
TJ = 25 °C
10
10us
100us
10
1ms
VG S = 0 V
1
0.4
0.8
1.2
1.6
V S D , S ource-to-Drain Voltage (V )
Fig 7. Typical Source-Drain Diode
Forward Voltage
A
2.0
TC = 25 ° C
TJ = 175 ° C
Single Pulse
1
1
10ms
10
100
1000
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
IRFIZ34E
RD
VDS
24
VGS
20
ID , Drain Current (A)
D.U.T.
RG
+
-VDD
10V
16
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
12
Fig 10a. Switching Time Test Circuit
8
VDS
90%
4
0
25
50
75
100
125
TC , Case Temperature
150
175
( ° C)
10%
VGS
td(on)
Fig 9. Maximum Drain Current Vs.
Case Temperature
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
D = 0.50
1
0.20
0.10
0.05
0.1
0.02
0.01
PDM
SINGLE PULSE
(THERMAL RESPONSE)
t1
t2
Notes:
1. Duty factor D = t1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.01
0.00001
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1
IRFIZ34E
D.U.T.
RG
+
V
- DD
IAS
tp
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
E A S , S in g le P u ls e A va la n c h e E n e rg y (m J)
250
L
VDS
TOP
BO TTOM
200
150
100
50
0
V D D = 2 5V
25
VDD
VDS
ID
6 .5A
11A
16 A
50
A
75
100
125
150
175
Starting TJ , Junction T emperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
QG
.3µF
10 V
QGS
D.U.T.
QGD
VGS
VG
3mA
IG
Charge
Fig 13a. Basic Gate Charge Waveform
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
+
V
- DS
IRFIZ34E
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
•
•
•
•
RG
Driver Gate Drive
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Period
D=
-
VDD
P.W.
Period
VGS=10V
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
ISD
*
IRFIZ34E
Package Outline
TO-220 Fullpak Outline
Dimensions are shown in millimeters (inches)
10.60 (.41 7)
10.40 (.40 9)
ø
3.40 (.133 )
3.10 (.123 )
4.8 0 (.189)
4.6 0 (.181)
-A 3.70 (.145)
3.20 (.126)
16 .0 0 (.630)
15 .8 0 (.622)
2 .80 (.110)
2 .60 (.102)
LE AD A S SIGN M E N T S
1 - GA TE
2 - D R AIN
3 - SO U R C E
7 .10 (.280)
6 .70 (.263)
1.15 (.04 5)
M IN .
N O T ES :
1 D IM EN SION IN G & T O LER A N C IN G
PE R AN S I Y14.5 M , 1982
1
2
3
2 C O N TR OLLIN G D IM EN S ION : IN C H .
3.30 (.130 )
3.10 (.122 )
-B-
13 .7 0 (.540)
13 .5 0 (.530)
C
A
1.40 (.05 5)
3X
1.05 (.04 2)
0.9 0 (.035)
3X 0.7 0 (.028)
0.25 (.010 )
3X
M
A M
0.48 (.019)
0.44 (.017)
2.85 (.112 )
2.65 (.104 )
B
2 .54 (.100)
2X
D
B
M IN IM U M C R E EP AG E
D IST A NC E B ET W E EN
A-B -C -D = 4.80 (.189 )
Part Marking Information
TO-220 Fullpak
E XAM P LE : TH IS IS A N IR FI8 4 0 G
W ITH ASS EM B LY
L O T C O D E E4 0 1
A
IN TE R N AT IO N AL
R E C TIFIER
L O GO
P AR T N U M BE R
IR FI8 4 0G
E 40 1 92 4 5
AS SE MB L Y
LOT CO DE
D AT E C O D E
(YYW W )
YY = YE AR
W W = W E EK
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
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http://www.irf.com/
Data and specifications subject to change without notice.
9/97
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
