IRFIZ48VPBF

PD-94834 IRFIZ48VPbF l l l l l l l l Advanced Process Technology Ultra Low On-Resistance Isolated Package High Voltage Isolation = 2.5KVRMS ˆ Fast Switching Fully Avalanche Rated Optimized for SMPS Applications Lead-Free HEXFET® Power MOSFET D VDSS = 60V RDS(on) = 12mΩ G ID = 39A S Description Advanced HEXFET® Power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The TO-220 Fullpak eliminates the need for additional insulating hardware in commercial-industrial applications. The moulding compound used provides a high isolation capability and a low thermal resistance between the tab and external heatsink. This isolation is equivalent to using a 100 micron mica barrier with standard TO-220 product. The Fullpak is mounted to a heatsink using a single clip or by a single screw fixing. TO-220 FULLPAK Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current ‡ Power Dissipation Linear Derating Factor Gate-to-Source Voltage Avalanche Current‡ Repetitive Avalanche Energy‡ Peak Diode Recovery dv/dt ƒ‡ Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 srew Max. Units 39 27 290 43 0.29 ± 20 72 15 5.3 -55 to + 175 A W W/°C V A mJ V/ns °C 300 (1.6mm from case ) 10 lbf•in (1.1N•m) Thermal Resistance Parameter RθJC RθJA www.irf.com Junction-to-Case Junction-to-Ambient Typ. Max. Units ––– ––– 3.5 65 °C/W 1 11/13/03 IRFIZ48VPbF Electrical Characteristics @ TJ = 25°C (unless otherwise specified) RDS(on) VGS(th) gfs Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Min. 60 ––– ––– 2.0 35 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– 0.064 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 7.6 200 157 166 IDSS Drain-to-Source Leakage Current LD Internal Drain Inductance ––– 4.5 LS Internal Source Inductance ––– 7.5 Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance ––– ––– ––– 1985 496 91 Eas Single Pulse Avalanche Energy ‚‡ ––– 780… 170† V(BR)DSS ∆V(BR)DSS/∆TJ IGSS Max. Units Conditions ––– V VGS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 1mA ‡ 12.0 mΩ VGS = 10V, ID = 43A „ 4.0 V VDS = VGS, ID = 250µA ––– S VDS = 25V, ID = 43A„‡ 25 VDS = 60V, VGS = 0V µA 250 VDS = 48V, VGS = 0V, TJ = 150°C 100 VGS = 20V nA -100 VGS = -20V 110 ID = 72A 29 nC VDS = 48V 36 VGS = 10V, See Fig. 6 and 13 „‡ ––– VDD = 30V ––– ID = 72A ns ––– RG = 9.1Ω ––– RD = 0.34Ω, See Fig. 10 „‡ D Between lead, ––– 6mm (0.25in.) nH G from package ––– and center of die contact S ––– VGS = 0V ––– VDS = 25V ––– pF ƒ = 1.0MHz, See Fig. 5 ‡ mJ IAS = 72A, L = 64mH Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)‡ Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol 39 ––– ––– showing the A G integral reverse ––– ––– 290 S p-n junction diode. ––– ––– 2.0 V TJ = 25°C, IS = 72A, VGS = 0V „‡ ––– 70 100 ns TJ = 25°C, IF = 72A ––– 155 233 nC di/dt = 100A/µs „‡ Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes:  Repetitive rating; pulse width limited by … This is a typical value at device destruction and represents ‚ Starting TJ = 25°C, L = 64µH † This is a calculated value limited to TJ = 175°C . ‡ Uses IRFZ48V data and test conditions. ˆ t = 60s, f = 60Hz max. junction temperature. ( See fig. 11 ) RG = 25Ω, IAS = 72A. (See Figure 12) ƒ ISD ≤ 72A, di/dt ≤ 151A/µs, VDD ≤ V(BR)DSS, operation outside rated limits. TJ ≤ 175°C „ Pulse width ≤ 300µs; duty cycle ≤ 2%. 2 www.irf.com IRFIZ48VPbF 1000 1000 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) 100 100 10 4.5V 20µs PULSE WIDTH TJ = 25 °C 1 0.1 1 10 4.5V 10 RDS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) TJ = 25 ° C TJ = 175° C 10 V DS= 25V 20µs PULSE WIDTH 6 8 10 12 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com 10 100 Fig 2. Typical Output Characteristics 1000 4 1 VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 100 20µs PULSE WIDTH TJ = 175 °C 1 0.1 100 VDS , Drain-to-Source Voltage (V) 1 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP TOP 14 3.0 ID = 72A 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 0 VGS = 10V 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature ( ° C) Fig 4. Normalized On-Resistance Vs. Temperature 3 IRFIZ48VPbF 20 VGS = 0V, f = 1 MHZ Cis = Cgs + Cgd, Cds SHORTED VGS , Gate-to-Source Voltage (V) C, Capacitance(pF) 4000 Crss = Cgd Coss = Cds + Cgd 3000 Ciss 2000 1000 Coss ID = 72A V DS= 48V V DS= 30V V DS= 12V 15 10 5 Crss 0 1 10 0 100 0 Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 60 80 100 120 Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000 1000 OPERATION IN THIS AREA LIMITED BY RDS(on) 100 TJ = 175 ° C ID , Drain Current (A) ISD , Reverse Drain Current (A) 40 QG , Total Gate Charge (nC) VDS, Drain-to-Source Voltage (V) 10us 100 TJ = 25 ° C 10 100us 1ms 10 1 0.1 0.2 10ms V GS = 0 V 0.6 1.0 1.4 VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 20 1.8 1 TC = 25 °C TJ = 175 °C Single Pulse 1 10 100 1000 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRFIZ48VPbF V DS 40 VGS RD D.U.T. RG + V DD - I D , Drain Current (A) 30 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 20 Fig 10a. Switching Time Test Circuit VDS 10 90% 0 25 50 75 100 125 150 TC , Case Temperature ( °C) 175 10% VGS td(on) Fig 9. Maximum Drain Current Vs. Case Temperature tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 D = 0.50 1 0.20 0.10 0.05 PDM 0.1 0.02 t1 0.01 0.01 0.00001 t2 SINGLE PULSE (THERMAL RESPONSE) 0.0001 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.001 0.01 0.1 1 10 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 15V L VDS DRIVER D.U.T RG + - VDD IAS 20V 0.01Ω tp Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp A EAS , Single Pulse Avalanche Energy (mJ) IRFIZ48VPbF 400 ID 29A 51A BOTTOM 72A TOP 300 200 100 0 25 50 75 100 125 150 175 Starting T J, Junction Temperature ( ° C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current I AS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V .2µF .3µF 10 V QGS D.U.T. QGD + V - DS VGS VG 3mA Charge Fig 13a. Basic Gate Charge Waveform 6 IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit www.irf.com IRFIZ48VPbF Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer ƒ + ‚ - - „ +  RG • • • • Driver Gate Drive P.W. + dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Period D= - VDD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS® Power MOSFETS www.irf.com 7 IRFIZ48VPbF TO-220 Full-Pak Package Outline TO-220 Full-Pak Part Marking Information E XAMP L E : T H IS IS AN IR F I840G WIT H AS S E MB L Y L OT CODE 343 2 AS S E MB L E D ON WW 24 1999 IN T H E AS S E MB L Y L IN E "K " Note: "P" in assembly line position indicates "Lead-Free" IN T E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE P AR T NU MB E R IR F I8 40 G 92 4K 34 32 DAT E CODE YE AR 9 = 1999 WE E K 24 L INE K Data and specifications subject to change without notice. This product has been designed and qualified for the industrial market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.11/03 8 www.irf.com Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/