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IRFR18N15DTRL

IRFR18N15DTRL

  • 厂商:

    EUPEC(英飞凌)

  • 封装:

    SOT428

  • 描述:

    MOSFET N-CH 150V 18A DPAK

  • 数据手册
  • 价格&库存
IRFR18N15DTRL 数据手册
PD- 93815A IRFR18N15D IRFU18N15D SMPS MOSFET HEXFET® Power MOSFET Applications l High frequency DC-DC converters Benefits Low Gate to Drain Charge to Reduce Switching Losses l Fully Characterized Capacitance Including Effective COSS to Simplify Design, (See App. Note AN1001) l Fully Characterized Avalanche Voltage and Current VDSS 150V RDS(on) max ID 0.125Ω 18A l D-Pak IRFR18N15D I-Pak IRFU18N15D Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current  Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt ƒ Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Max. 18 13 72 110 0.71 ± 30 3.3 -55 to + 175 Units A W W/°C V V/ns °C 300 (1.6mm from case ) Typical SMPS Topologies l Telecom 48V input DC-DC Active Clamp Reset Forward Converter Notes  through † are on page 10 www.irf.com 1 2/23/00 IRFR18N15D/IRFU18N15D Static @ TJ = 25°C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage ∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage V(BR)DSS IDSS Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. 150 ––– ––– 3.0 ––– ––– ––– ––– Typ. ––– 0.17 ––– ––– ––– ––– ––– ––– Max. Units Conditions ––– V VGS = 0V, I D = 250µA ––– V/°C Reference to 25°C, ID = 1mA † 0.125 Ω VGS = 10V, ID = 11A „ 5.5 V VDS = VGS, ID = 250µA 25 VDS = 150V, VGS = 0V µA 250 VDS = 120V, VGS = 0V, TJ = 150°C 100 VGS = 30V nA -100 VGS = -30V Dynamic @ TJ = 25°C (unless otherwise specified) gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 4.2 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– 28 7.6 14 8.8 25 15 9.8 900 190 49 1160 88 95 Max. Units Conditions ––– S VDS = 50V, ID = 11A 43 ID = 11A 11 nC VDS = 120V 21 VGS = 10V, „ ––– VDD = 75V ––– ID = 11A ns ––– RG = 6.8Ω ––– VGS = 10V „ ––– VGS = 0V ––– VDS = 25V ––– pF ƒ = 1.0MHz ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 120V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 0V to 120V … Avalanche Characteristics Parameter EAS IAR EAR Single Pulse Avalanche Energy‚ Avalanche Current Repetitive Avalanche Energy Typ. Max. Units ––– ––– ––– 200 11 11 mJ A mJ Typ. Max. Units ––– ––– ––– 1.4 50 110 °C/W Thermal Resistance Parameter RθJC RθJA RθJA Junction-to-Case Junction-to-Ambient (PCB mount)* Junction-to-Ambient Diode Characteristics IS ISM VSD trr Qrr ton 2 Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)  Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol 18 ––– ––– showing the A G integral reverse ––– ––– 72 S p-n junction diode. ––– ––– 1.3 V TJ = 25°C, IS = 11A, VGS = 0V „ ––– 130 190 ns TJ = 25°C, IF = 11A ––– 660 980 nC di/dt = 100A/µs „ Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) www.irf.com IRFR18N15D/IRFU18N15D 100 100 VGS 15V 10V 9.0V 8.0V 7.5V 7.0V 6.5V BOTTOM 6.0V VGS 15V 10V 9.0V 8.0V 7.5V 7.0V 6.5V BOTTOM 6.0V TOP I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) TOP 10 1 6.0V 20µs PULSE WIDTH TJ = 25 °C 0.1 0.1 1 10 10 6.0V 100 Fig 1. Typical Output Characteristics RDS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) 3.0 TJ = 175 ° C 10 TJ = 25 ° C V DS = 50V 20µs PULSE WIDTH 7 8 9 10 11 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com 10 100 Fig 2. Typical Output Characteristics 100 6 1 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) 1 20µs PULSE WIDTH TJ = 175 °C 1 0.1 12 ID = 18A 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature ( °C) Fig 4. Normalized On-Resistance Vs. Temperature 3 IRFR18N15D/IRFU18N15D VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd C, Capacitance(pF) Coss = Cds + Cgd 1000 Ciss Coss 100 Crss VGS , Gate-to-Source Voltage (V) 20 10000 ID = 11A VDS = 120V VDS = 75V VDS = 30V 16 12 8 4 FOR TEST CIRCUIT SEE FIGURE 13 10 1 10 100 1000 0 0 VDS , Drain-to-Source Voltage (V) 10 20 30 40 Q G , Total Gate Charge (nC) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 1000 100 I D , Drain Current (A) ISD , Reverse Drain Current (A) OPERATION IN THIS AREA LIMITED BY RDS(on) 100 10 TJ = 175 ° C TJ = 25 ° C 1 0.1 0.2 V GS = 0 V 0.5 0.8 1.1 VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 1.4 10us 100us 10 1ms TC = 25 ° C TJ = 175 ° C Single Pulse 1 1 10ms 10 100 1000 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRFR18N15D/IRFU18N15D 20 VDS VGS I D , Drain Current (A) 16 RD D.U.T. RG + -VDD 12 VGS Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 8 Fig 10a. Switching Time Test Circuit 4 VDS 90% 0 25 50 75 100 125 TC , Case Temperature 150 175 ( °C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 1 D = 0.50 0.20 0.10 0.1 P DM 0.05 0.02 0.01 t1 SINGLE PULSE (THERMAL RESPONSE) t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.01 0.00001 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRFR18N15D/IRFU18N15D 500 D R IV E R L VDS D .U .T RG + V - DD IA S 20V 0 .0 1 Ω tp Fig 12a. Unclamped Inductive Test Circuit V (B R )D SS tp A EAS , Single Pulse Avalanche Energy (mJ) 1 5V TOP 400 BOTTOM ID 4.4A 9.0A 11A 300 200 100 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature ( °C) IAS Fig 12b. Unclamped Inductive Waveforms Fig 12c. Maximum Avalanche Energy Vs. Drain Current QG QGS QGD VG Charge Fig 13a. Basic Gate Charge Waveform Current Regulator Same Type as D.U.T. 50KΩ 12V .2µF .3µF D.U.T. + V - DS VGS 3mA IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit 6 www.irf.com IRFR18N15D/IRFU18N15D Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer ƒ + ‚ - - „ +  • • • • RG dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Driver Gate Drive P.W. D= Period + - VDD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET® Power MOSFETs www.irf.com 7 IRFR18N15D/IRFU18N15D D-Pak (TO-252AA) Package Outline Dimensions are shown in millimeters (inches) 2 .3 8 (.0 9 4 ) 2 .1 9 (.0 8 6 ) 6 .7 3 (.2 6 5 ) 6 .3 5 (.2 5 0 ) -A 1 .2 7 (.0 5 0 ) 0 .8 8 (.0 3 5 ) 5 .4 6 (.2 1 5 ) 5 .2 1 (.2 0 5 ) 1 .1 4 (.0 4 5 ) 0 .8 9 (.0 3 5 ) 0 .5 8 (.0 2 3 ) 0 .4 6 (.0 1 8 ) 4 6 .4 5 (.2 4 5 ) 5 .6 8 (.2 2 4 ) 6 .2 2 (.2 4 5 ) 5 .9 7 (.2 3 5 ) 1.0 2 (.0 4 0 ) 1.6 4 (.0 2 5 ) 1 0 .4 2 (.4 1 0 ) 9 .4 0 (.3 7 0 ) 1 2 1 - GATE 0 .5 1 (.0 2 0 ) M IN . -B 1 .5 2 (.0 6 0 ) 1 .1 5 (.0 4 5 ) 3X 2X 1 .1 4 (.0 4 5 ) 0 .7 6 (.0 3 0 ) L E A D A S S IG N M E N T S 3 0 .8 9 (.0 3 5 ) 0 .6 4 (.0 2 5 ) 0 .2 5 ( .0 1 0 ) 2 - D R A IN 3 - S OU R CE 4 - D R A IN 0 .5 8 (.0 2 3 ) 0 .4 6 (.0 1 8 ) M A M B N O TE S : 2 .2 8 ( .0 9 0 ) 1 D IM E N S IO N IN G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 . 4 .5 7 ( .1 8 0 ) 2 C O N T R O L L IN G D IM E N S IO N : IN C H . 3 C O N F O R M S T O J E D E C O U T L IN E T O -2 5 2 A A . 4 D IM E N S IO N S S H O W N A R E B E F O R E S O L D E R D IP , S O L D E R D IP M A X. + 0 .1 6 (.0 0 6 ) . D-Pak (TO-252AA) Part Marking Information 8 www.irf.com IRFR18N15D/IRFU18N15D I-Pak (TO-251AA) Package Outline Dimensions are shown in millimeters (inches) 6 .7 3 (.26 5 ) 6 .3 5 (.25 0 ) 2 .3 8 (.0 9 4 ) 2 .1 9 (.0 8 6 ) -A 1 .2 7 ( .0 5 0 ) 0 .8 8 ( .0 3 5 ) 5 .4 6 (.2 1 5 ) 5 .2 1 (.2 0 5 ) 0 .5 8 (.0 2 3 ) 0 .4 6 (.0 1 8 ) 4 6 .4 5 (.2 4 5 ) 5 .6 8 (.2 2 4 ) 6 .2 2 ( .2 4 5 ) 5 .9 7 ( .2 3 5 ) 1 .5 2 (.0 6 0 ) 1 .1 5 (.0 4 5 ) 1 2 L E A D A S S IG N M E N T S 1 - GATE 2 - D R A IN 3 - SOURCE 4 - D R A IN 3 -B - N O TE S : 1 D IM E N S IO N IN G & TO L E R A N C IN G P E R A N S I Y 1 4 .5M , 19 8 2 . 2.2 8 (.0 9 0) 1.9 1 (.0 7 5) 2 C O N T R O L L IN G D IM E N S IO N : IN C H . 3 C O N F O R MS TO J E D E C O U T L IN E TO -2 5 2 A A . 9 .6 5 ( .3 8 0 ) 8 .8 9 ( .3 5 0 ) 4 D IM E N S IO N S S H O W N A R E B E F O R E S O L D E R D IP , S O L D E R D IP M A X. + 0.1 6 (.0 0 6 ). 3X 1 .1 4 (.0 45 ) 0 .7 6 (.0 30 ) 2 .28 (.0 9 0 ) 2X 3X 1 .1 4 ( .0 4 5 ) 0 .8 9 ( .0 3 5 ) 0 .8 9 (.0 35 ) 0 .6 4 (.0 25 ) 0 .2 5 (.0 1 0 ) M A M B 0 .5 8 (.0 2 3 ) 0 .4 6 (.0 1 8 ) I-Pak (TO-251AA) Part Marking Information www.irf.com 9 IRFR18N15D/IRFU18N15D D-Pak (TO-252AA) Tape & Reel Information Dimensions are shown in millimeters (inches) TR TRR 16.3 ( .641 ) 15.7 ( .619 ) 12.1 ( .47 6 ) 11.9 ( .46 9 ) F E E D D IR E C T IO N TRL 16 .3 ( .641 ) 15 .7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) FE E D D IR E C T IO N N O T ES : 1 . C O N T R O LLIN G D IME N S IO N : M ILL IM ET E R . 2 . A LL D IM EN S IO N S A R E SH O W N IN M ILLIM ET E R S ( IN C H E S ). 3 . O U TL IN E C O N FO R MS T O E IA -481 & E IA -54 1. 1 3 IN C H 16 m m N O TE S : 1. O U TL IN E C O N F O R M S T O E IA -481 . Notes:  Repetitive rating; pulse width limited by max. junction temperature. ‚ Starting TJ = 25°C, L = 3.3mH RG = 25Ω, IAS = 11A. „ Pulse width ≤ 300µs; duty cycle ≤ 2%. … Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS ƒ ISD ≤ 11A, di/dt ≤ 170A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C * When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994. WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 252-7105 IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR JAPAN: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 838 4630 IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673, Taiwan Tel: 886-2-2377-9936 Data and specifications subject to change without notice. 2/00 10 www.irf.com Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/
IRFR18N15DTRL 价格&库存

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