StrongIRFET™
IRFR7740PbF
IRFU7740PbF
HEXFET® Power MOSFET
Application
Brushed motor drive applications
BLDC motor drive applications
Battery powered circuits
Half-bridge and full-bridge topologies
Synchronous rectifier applications
Resonant mode power supplies
OR-ing and redundant power switches
DC/DC and AC/DC converters
DC/AC inverters
D
VDSS
75V
RDS(on) typ.
6.0m
max
7.2m
G
ID
S
87A
D
Benefits
Improved gate, avalanche and dynamic dV/dt ruggedness
Fully characterized capacitance and avalanche SOA
Enhanced body diode dV/dt and dI/dt capability
Lead-free, RoHS compliant
S
G
IRFR7740PbF
D-Pak
IRFU7740PbF
I-Pak
20
S
Source
Orderable Part Number
IRFR7740PbF
IRFR7740TRPbF
IRFU7740PbF
100
ID = 52A
80
15
10
T J = 125°C
5
60
40
20
T J = 25°C
0
0
0
5
10
15
20
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
1
D
Drain
Standard Pack
Form
Quantity
Tube
75
Tape and Reel
2000
Tube
75
ID, Drain Current (A)
RDS(on), Drain-to -Source On Resistance (m )
Package Type
S
D
I-Pak
IRFU7740PbF
D-Pak
IRFR7740PbF
G
Gate
Base part number
G
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© 2014 International Rectifier
25
50
75
100
125
150
175
T C , Case Temperature (°C)
Fig 2. Maximum Drain Current vs. Case Temperature
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IRFR/U7740PbF
Absolute Maximum Rating
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
Parameter
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
VGS
Gate-to-Source Voltage
TJ
Operating Junction and
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Avalanche Characteristics
Symbol
Parameter
EAS (Thermally limited)
Single Pulse Avalanche Energy
EAS (Thermally limited)
Single Pulse Avalanche Energy
IAR
Avalanche Current
Repetitive Avalanche Energy
EAR
Thermal Resistance
Symbol
Parameter
Junction-to-Case
RJC
Junction-to-Ambient (PCB Mount)
RJA
Junction-to-Ambient
RJA
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
V(BR)DSS
Drain-to-Source Breakdown Voltage
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
IDSS
Drain-to-Source Leakage Current
IGSS
RG
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Resistance
Min.
75
–––
–––
–––
2.1
–––
–––
–––
–––
–––
Max.
87
62
330
140
0.95
± 20
Units
A
W
W/°C
V
-55 to + 175
°C
300
Max.
160
242
Units
mJ
A
mJ
See Fig 15, 16, 23a, 23b
Typ.
–––
–––
–––
Max.
1.05
50
110
Units
°C/W
Typ. Max. Units
Conditions
––– –––
V VGS = 0V, ID = 250µA
51
––– mV/°C Reference to 25°C, ID = 1mA
6.0
7.2
m VGS = 10V, ID = 52A
7.0 –––
VGS = 6.0V, ID = 26A
––– 3.7
V VDS = VGS, ID = 100µA
––– 1.0
VDS =75 V, VGS = 0V
µA
––– 150
VDS =75V,VGS = 0V,TJ =125°C
––– 100
VGS = 20V
nA
––– -100
VGS = -20V
2.2 –––
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25°C, L = 120µH, RG = 50, IAS = 52A, VGS =10V.
ISD 52A, di/dt 570A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 400µs; duty cycle 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
R is measured at TJ approximately 90°C.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to
application note #AN-994: http://www.irf.com/technical-info/appnotes/an-994.pdf
Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 22A, VGS =10V
2
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IRFR/U7740PbF
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
Qsync
td(on)
tr
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Total Gate Charge Sync. (Qg – Qgd)
Turn-On Delay Time
Rise Time
Min.
110
–––
–––
–––
–––
–––
–––
Typ.
–––
84
20
26
58
10
36
td(off)
Turn-Off Delay Time
–––
55
tf
Ciss
Coss
Crss
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance
(Energy Related)
Output Capacitance (Time Related)
–––
–––
–––
–––
30
4430
370
230
–––
340
–––
VGS = 0V, VDS = 0V to 60V
–––
440
–––
VGS = 0V, VDS = 0V to 60V
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Min.
Typ.
Max. Units
–––
–––
87
–––
–––
330
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
VSD
Diode Forward Voltage
–––
–––
1.2
dv/dt
Peak Diode Recovery dv/dt
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
–––
–––
–––
–––
–––
–––
12
35
40
45
61
2.3
–––
–––
–––
–––
–––
–––
Coss eff.(ER)
Coss eff.(TR)
Max. Units
Conditions
–––
S VDS = 25V, ID = 52A
126
ID = 52A
–––
VDS = 38V
nC
–––
VGS = 10V
–––
–––
VDD = 38V
–––
ID = 52A
ns
–––
RG= 2.7
VGS = 10V
–––
–––
–––
–––
pF
VGS = 0V
VDS = 25V
ƒ = 1.0MHz, See Fig.7
Diode Characteristics
Symbol
IS
ISM
3
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A
V
D
G
S
TJ = 25°C,IS = 52A,VGS = 0V
V/ns TJ = 175°C,IS = 52A,VDS = 75V
TJ = 25°C
VDD = 64V
ns
TJ = 125°C
IF = 52A,
TJ = 25°C di/dt = 100A/µs
nC
TJ = 125°C
A TJ = 25°C
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IRFR/U7740PbF
1000
1000
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
100
4.5V
10
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
4.5V
10
60µs PULSE WIDTH
60µs PULSE WIDTH
Tj = 175°C
Tj = 25°C
1
1
0.1
1
10
0.1
100
1
3.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
1000
100
T J = 175°C
10
T J = 25°C
1
VDS = 25V
60µs PULSE WIDTH
2.0
3.0
4.0
5.0
ID = 52A
V GS = 10V
2.5
2.0
1.5
1.0
0.5
0.0
0.1
-60 -40 -20 0 20 40 60 80 100120140160180
6.0
TJ , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 6. Normalized On-Resistance vs. Temperature
Fig 5. Typical Transfer Characteristics
100000
14.0
VGS = 0V,
f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = C gd
VGS, Gate-to-Source Voltage (V)
ID= 52A
Coss = Cds + Cgd
C, Capacitance (pF)
100
Fig 4. Typical Output Characteristics
Fig 3. Typical Output Characteristics
10000
Ciss
Coss
1000
Crss
100
12.0
10.0
VDS= 60V
8.0
VDS= 15V
VDS= 38V
6.0
4.0
2.0
0.0
1
10
100
V DS, Drain-to-Source Voltage (V)
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
4
10
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
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0
20
40
60
80
100
120
QG, Total Gate Charge (nC)
Fig 8. Typical Gate Charge vs.
Gate-to-Source Voltage
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IRFR/U7740PbF
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
100
TJ = 175°C
10
TJ = 25°C
1
10
OPERATION
IN THIS
AREA
LIMITED BY
R DS(on)
1
10msec
0.1
DC
Tc = 25°C
Tj = 175°C
Single Pulse
V GS = 0V
0.01
0.1
0.2
0.4
0.6
0.8
1.0
1.2
0.1
1.4
1
10
VDS, Drain-toSource Voltage (V)
V SD, Source-to-Drain Voltage (V)
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode Forward Voltage
0.9
95
Id = 1.0mA
0.8
0.7
90
0.6
Energy (µJ)
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
100µsec
1msec
100
85
0.5
0.4
0.3
80
0.2
0.1
0.0
75
-10
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Temperature ( °C )
0
10
20
30
40
50
60
70
80
VDS, Drain-to-Source Voltage (V)
Fig 11. Drain-to-Source Breakdown Voltage
Fig 12. Typical Coss Stored Energy
RDS(on), Drain-to -Source On Resistance ( m)
11.0
VGS = 5.5V
VGS = 6.0V
10.0
VGS = 7.0V
VGS = 8.0V
VGS =10V
9.0
8.0
7.0
6.0
0
50
100
150
200
ID, Drain Current (A)
Fig 13. Typical On-Resistance vs. Drain Current
5
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IRFR/U7740PbF
Thermal Response ( Z thJC ) °C/W
10
1
D = 0.50
0.20
0.10
0.1
0.05
0.02
0.01
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
100
Avalanche Current (A)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart = 25°C (Single Pulse)
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
1
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Avalanche Current vs. Pulse Width
200
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 52A
EAR , Avalanche Energy (mJ)
160
120
80
40
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy vs. Temperature
6
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Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1.Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
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IRFR/U7740PbF
16
IF = 35A
V R = 64V
TJ = 25°C
3.5
12
TJ = 125°C
3.0
2.5
IRRM (A)
V GS(th) , Gate threshold Voltage (V)
4.0
ID = 100µA
ID = 250µA
2.0
ID = 1.0mA
ID = 1.0A
1.5
4
1.0
-75 -50 -25
8
0
0
25 50 75 100 125 150 175
0
200
TJ , Temperature ( °C )
600
800
1000
diF /dt (A/µs)
Fig 18. Typical Recovery Current vs. dif/dt
Fig 17. Threshold Voltage vs. Temperature
20
300
16
IF = 52A
V R = 64V
250
TJ = 25°C
TJ = 125°C
IF = 35A
V R = 64V
TJ = 25°C
200
TJ = 125°C
12
QRR (nC)
IRRM (A)
400
8
150
100
4
50
0
0
0
200
400
600
800
1000
0
200
diF /dt (A/µs)
400
600
800
1000
diF /dt (A/µs)
Fig 19. Typical Recovery Current vs. dif/dt
Fig 20. Typical Stored Charge vs. dif/dt
QRR (nC)
300
250
IF = 52A
V R = 64V
TJ = 25°C
200
TJ = 125°C
150
100
50
0
0
200
400
600
800
1000
diF /dt (A/µs)
Fig 21. Typical Stored Charge vs. dif/dt
7
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IRFR/U7740PbF
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V(BR)DSS
tp
15V
DRIVER
L
VDS
D.U.T
RG
IAS
20V
tp
+
V
- DD
A
I AS
0.01
Fig 23a. Unclamped Inductive Test Circuit
Fig 24a. Switching Time Test Circuit
Fig 23b. Unclamped Inductive Waveforms
Fig 24b. Switching Time Waveforms
Id
Vds
Vgs
VDD
Vgs(th)
Qgs1 Qgs2
Fig 25a. Gate Charge Test Circuit
8
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Qgd
Qgodr
Fig 25b. Gate Charge Waveform
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IRFR/U7740PbF
D-Pak (TO-252AA) Package Outline (Dimensions are shown in millimeters (inches))
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: THIS IS AN IRFR120
WITH ASSEMBLY
LOT CODE 1234
ASSEMBLED ON WW 16, 2001
IN THE ASSEMBLY LINE "A"
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
Note: "P" in assembly line position
indicates "Lead-Free"
IRFR120
12
116A
34
ASSEMBLY
LOT CODE
DATE CODE
YEAR 1 = 2001
WEEK 16
LINE A
"P" in assembly line position indicates
"Lead-Free" qualification to the consumer-level
OR
INTERNATIONAL
RECTIFIER
LOGO
PART NUMBER
IRFR120
12
ASSEMBLY
LOT CODE
34
DATE CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
P = DESIGNATES LEAD-FREE
PRODUCT QUALIFIED TO THE
CONSUMER LEVEL (OPTIONAL)
YEAR 1 = 2001
WEEK 16
A = ASSEMBLY SITE CODE
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
9
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IRFR/U7740PbF
I-Pak (TO-251AA) Package Outline (Dimensions are shown in millimeters (inches))
I-Pak (TO-251AA) Part Marking Information
EXAMPLE: THIS IS AN IRFU120
WITH ASSEMBLY
LOT CODE 5678
ASSEMBLED ON WW 19, 2001
IN THE ASSEMBLY LINE "A"
INTERNATIONAL
RECTIFIER
LOGO
PART NUMBER
IRFU120
119A
56
78
ASSEMBLY
LOT CODE
Note: "P" in assembly line position
indicates Lead-Free"
DATE CODE
YEAR 1 = 2001
WEEK 19
LINE A
OR
INTERNATIONAL
RECTIFIER
LOGO
PART NUMBER
IRFU120
56
ASSEMBLY
LOT CODE
78
DATE CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 1 = 2001
WEEK 19
A = ASSEMBLY SITE CODE
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
10
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IRFR/U7740PbF
D-Pak (TO-252AA) Tape & Reel Information (Dimensions are shown in millimeters (inches))
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
11
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IRFR/U7740PbF
Qualification Information†
Industrial
(per JEDEC JESD47F) ††
Qualification Level
Moisture Sensitivity Level
D-Pak
MSL1
I-Pak
Yes
RoHS Compliant
†
Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/
††
Applicable version of JEDEC standard at the time of product release.
Revision History
Date
11/5/2014
Comment
Updated EAS (L =1mH) = 242mJ on page 2
Updated note 9 “Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 22A, VGS =10V” on page 2
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
12
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IMPORTANT NOTICE
The information given in this document shall in no
event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”) .
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon
Technologies hereby disclaims any and all
warranties and liabilities of any kind, including
without limitation warranties of non-infringement
of intellectual property rights of any third party.
In addition, any information given in this document
is subject to customer’s compliance with its
obligations stated in this document and any
applicable legal requirements, norms and
standards concerning customer’s products and any
use of the product of Infineon Technologies in
customer’s applications.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer’s technical departments
to evaluate the suitability of the product for the
intended application and the completeness of the
product information given in this document with
respect to such application.
For further information on the product, technology,
delivery terms and conditions and prices please
contact your nearest Infineon Technologies office
(www.infineon.com).
WARNINGS
Due to technical requirements products may
contain dangerous substances. For information on
the types in question please contact your nearest
Infineon Technologies office.
Except as otherwise explicitly approved by Infineon
Technologies in a written document signed by
authorized
representatives
of
Infineon
Technologies, Infineon Technologies’ products may
not be used in any applications where a failure of
the product or any consequences of the use thereof
can reasonably be expected to result in personal
injury.
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