StrongIRFET
IRFS7437-7PPbF
Applications
l Brushed Motor drive applications
l BLDC Motor drive applications
l PWM Inverterized topologies
l Battery powered circuits
l Half-bridge and full-bridge topologies
l Electronic ballast applications
l Synchronous rectifier applications
l Resonant mode power supplies
l OR-ing and redundant power switches
l DC/DC and AC/DC converters
HEXFET® Power MOSFET
D
G
S
IRFS7437-7PPbF
D2Pak-7PIN
195A
S
G
c
S
S
S
D2Pak 7 Pin
G
D
S
Gate
Drain
Source
Standard Pack
Orderable Part Number
Form
Quantity
Tube
50
IRFS7437-7PPbF
Tape and Reel Left
800
IRFS7437TRL7PP
4.0
300
ID = 100A
Limited By Package
250
3.0
TJ = 125°C
2.0
200
150
100
50
T J = 25°C
1.0
0
4
6
8
10
12
14
16
18
20
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
1
ID (Package Limited)
S
ID, Drain Current (A)
RDS(on), Drain-to -Source On Resistance (m Ω)
Package Type
40V
1.1mΩ
1.4mΩ
295A
D
Benefits
l Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
l Fully Characterized Capacitance and Avalanche
SOA
l Enhanced body diode dV/dt and dI/dt Capability
l Lead-Free
l Halogen Free
Base Part Number
VDSS
RDS(on) typ.
max.
ID (Silicon Limited)
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25
50
75
100
125
150
175
T C , Case Temperature (°C)
Fig 2. Maximum Drain Current vs. Case Temperature
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IRFS7437-7PPbF
Absolute Maximum Ratings
Symbol
ID @ TC = 25°C
Parameter
Units
Max.
295
c
208c
Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC = 100°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
195
IDM
Pulsed Drain Current
1040
PD @TC = 25°C
Maximum Power Dissipation
231
W
Linear Derating Factor
1.5
W/°C
Gate-to-Source Voltage
± 20
V
3.5
V/ns
VGS
d
f
dv/dt
Peak Diode Recovery
TJ
Operating Junction and
TSTG
Storage Temperature Range
A
-55 to + 175
°C
300
Soldering Temperature, for 10 seconds (1.6mm from case)
Avalanche Characteristics
Single Pulse Avalanche Energy
EAS (Thermally limited)
EAS (Thermally limited)
Single Pulse Avalanche Energy
IAR
Avalanche Current
EAR
Repetitive Avalanche Energy
d
e
l
344
mJ
796
A
See Fig. 14, 15, 22a, 22b
d
mJ
Thermal Resistance
Symbol
k
Parameter
RθJC
Junction-to-Case
RθJA
Junction-to-Ambient (PCB Mount)
Typ.
j
–––
Max.
0.65
–––
40
Units
°C/W
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min.
Typ.
Max.
Units
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
40
–––
–––
V
ΔV(BR)DSS/ΔTJ
Breakdown Voltage Temp. Coefficient
–––
0.035
–––
V/°C
RDS(on)
Static Drain-to-Source On-Resistance
–––
1.1
1.4
mΩ
VGS = 10V, ID = 100A
1.7
–––
mΩ
VGS = 6.0V, ID = 50A
2.2
–––
3.9
V
–––
–––
1.0
μA
–––
–––
150
VGS(th)
Gate Threshold Voltage
IDSS
Drain-to-Source Leakage Current
IGSS
RG
Gate-to-Source Forward Leakage
–––
–––
100
Gate-to-Source Reverse Leakage
–––
–––
-100
Internal Gate Resistance
–––
2.2
–––
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 195A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.069mH
RG = 50Ω, IAS = 100A, VGS =10V.
ISD ≤ 100A, di/dt ≤ 1288A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
2
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VGS = 0V, ID = 250μA
Reference to 25°C, ID = 1.0mA
g
g
d
VDS = VGS, ID = 150μA
VDS = 40V, VGS = 0V
VDS = 40V, VGS = 0V, TJ = 125°C
nA
VGS = 20V
VGS = -20V
Ω
Pulse width ≤ 400μs; duty cycle ≤ 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS .
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
Rθ is measured at TJ approximately 90°C.
Limited by TJmax, starting TJ = 25°C, L = 0.069mH,RG = 50Ω,
IAS = 40A, VGS =10V.
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IRFS7437-7PPbF
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min.
Typ.
Max.
Units
Conditions
gfs
Forward Transconductance
122
–––
–––
S
VDS = 10V, ID = 100A
Qg
Total Gate Charge
–––
150
225
nC
ID = 100A
Qgs
Gate-to-Source Charge
–––
41
–––
VDS = 20V
Qgd
Gate-to-Drain ("Miller") Charge
–––
51
–––
VGS = 10V
Qsync
Total Gate Charge Sync. (Qg - Qgd)
–––
99
–––
td(on)
Turn-On Delay Time
–––
18
–––
tr
Rise Time
–––
62
–––
ID = 30A
td(off)
Turn-Off Delay Time
–––
78
–––
RG = 2.7Ω
tf
Fall Time
–––
51
–––
Ciss
Input Capacitance
–––
7437
–––
Coss
Output Capacitance
–––
1097
–––
VDS = 25V
Crss
Reverse Transfer Capacitance
–––
748
–––
ƒ = 1.0 MHz
Coss eff. (ER)
Effective Output Capacitance (Energy Related)
–––
1314
–––
VGS = 0V, VDS = 0V to 32V
Coss eff. (TR)
Effective Output Capacitance (Time Related)
–––
1735
–––
VGS = 0V, VDS
Min.
Typ.
–––
Max.
285
Units
–––
–––
–––
1040
A
h
i
g
ID = 100A, VDS = 20V, VGS = 10V
ns
VDD = 20V
VGS = 10V
pF
g
VGS = 0V
i
= 0V to 32V h
Diode Characteristics
Symbol
IS
Parameter
Continuous Source Current
c
A
Pulsed Source Current
(Body Diode)
D
showing the
(Body Diode)
ISM
Conditions
MOSFET symbol
d
G
integral reverse
S
p-n junction diode.
VSD
Diode Forward Voltage
–––
1.0
1.3
V
TJ = 25°C, IS = 100A, VGS = 0V
trr
Reverse Recovery Time
–––
37
–––
ns
TJ = 25°C
VR = 34V,
–––
38
–––
TJ = 125°C
IF = 100A
Qrr
Reverse Recovery Charge
–––
34
–––
nC
TJ = 25°C
di/dt = 100A/μs
–––
36
–––
IRRM
Reverse Recovery Current
–––
1.8
–––
A
TJ = 25°C
ton
Forward Turn-On Time
3
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g
g
TJ = 125°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRFS7437-7PPbF
10000
10000
VGS
15V
10V
8.0V
7.0V
6.5V
6.0V
5.5V
5.0V
1000
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
1000
100
5.0V
10
≤60μs PULSE WIDTH
BOTTOM
100
5.0V
≤60μs PULSE WIDTH
Tj = 25°C
Tj = 175°C
1
10
0.1
1
10
100
0.1
V DS, Drain-to-Source Voltage (V)
100
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
10
Fig 4. Typical Output Characteristics
10000
1000
100
TJ = 175°C
T J = 25°C
10
VDS = 10V
≤60μs PULSE WIDTH
1.0
ID = 100A
VGS = 10V
1.8
1.6
1.4
1.2
1.0
0.8
0.6
2
3
4
5
6
7
8
9
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 6. Normalized On-Resistance vs. Temperature
Fig 5. Typical Transfer Characteristics
100000
14.0
VGS, Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
C, Capacitance (pF)
1
V DS, Drain-to-Source Voltage (V)
Fig 3. Typical Output Characteristics
Ciss
10000
Coss
Crss
1000
100
ID= 100A
12.0
VDS= 32V
VDS= 20V
10.0
8.0
6.0
4.0
2.0
0.0
1
10
100
0
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
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20 40 60 80 100 120 140 160 180 200
QG, Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
4
VGS
15V
10V
8.0V
7.0V
6.5V
6.0V
5.5V
5.0V
Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage
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IRFS7437-7PPbF
10000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
10000
1000
T J = 175°C
100
T J = 25°C
10
OPERATION IN THIS AREA
LIMITED BY RDS(on)
1000
1msec
100
10msec
Limited by
package
10
DC
1
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
1.0
0.1
0.1
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
1
100
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode
Forward Voltage
1.0
49
Id = 1.0mA
0.9
0.8
47
0.7
46
0.6
Energy (μJ)
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
10
V DS, Drain-toSource Voltage (V)
VSD, Source-to-Drain Voltage (V)
48
100μsec
45
44
0.5
0.4
0.3
43
0.2
42
0.1
41
0.0
-0.1
40
-5
-60 -40 -20 0 20 40 60 80 100120140160180
0
T J , Temperature ( °C )
10
15
20
25
30
35
40
VDS, Drain-to-Source Voltage (V)
Fig 11. Drain-to-Source Breakdown Voltage
RDS(on), Drain-to -Source On Resistance ( mΩ)
5
Fig 12. Typical COSS Stored Energy
10.0
VGS = 6.0V
VGS = 7.0V
8.0
VGS = 8.0V
VGS =10V
6.0
4.0
2.0
0.0
0
200
400
600
800
1000
1200
ID, Drain Current (A)
Fig 13. Typical On-Resistance vs. Drain Current
5
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IRFS7437-7PPbF
Thermal Response ( Z thJC ) °C/W
1
D = 0.50
0.20
0.1
0.10
0.05
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
0.0001
1E-006
1E-005
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Avalanche Current (A)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 150°C and
Tstart =25°C (Single Pulse)
100
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
350
300
EAR , Avalanche Energy (mJ)
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 100A
250
200
150
100
50
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Fig 16. Maximum Avalanche Energy vs. Temperature
6
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IRFS7437-7PPbF
12
10
IF = 60A
V R = 34V
8
TJ = 25°C
TJ = 125°C
4.0
IRRM (A)
VGS(th) , Gate threshold Voltage (V)
5.0
3.0
ID = 150μA
ID = 1.0mA
2.0
6
4
ID = 1.0A
2
1.0
0
-75 -50 -25
0
25 50 75 100 125 150 175
0
200
T J , Temperature ( °C )
600
800
1000
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig 17. Threshold Voltage vs. Temperature
12
300
10
IF = 100A
V R = 34V
8
TJ = 25°C
TJ = 125°C
QRR (nC)
IRRM (A)
400
diF /dt (A/μs)
6
250
IF = 60A
V R = 34V
200
TJ = 25°C
TJ = 125°C
150
4
100
2
50
0
0
0
200
400
600
800
1000
0
200
diF /dt (A/μs)
400
600
800
1000
diF /dt (A/μs)
Fig. 20 - Typical Stored Charge vs. dif/dt
Fig. 19 - Typical Recovery Current vs. dif/dt
QRR (nC)
300
250
IF = 100A
V R = 34V
200
TJ = 25°C
TJ = 125°C
150
100
50
0
0
200
400
600
800
1000
diF /dt (A/μs)
7
Fig. 21 - Typical Stored Charge vs. dif/dt
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IRFS7437-7PPbF
Driver Gate Drive
D.U.T
-
-
-
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
V DD
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D=
Period
P.W.
+
+
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
ISD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
RG
20V
VGS
+
V
- DD
IAS
A
0.01Ω
tp
I AS
Fig 22a. Unclamped Inductive Test Circuit
RD
VDS
Fig 22b. Unclamped Inductive Waveforms
VDS
90%
VGS
D.U.T.
RG
+
- VDD
V10V
GS
10%
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
td(on)
Fig 23a. Switching Time Test Circuit
tr
t d(off)
Fig 23b. Switching Time Waveforms
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50KΩ
12V
tf
.2μF
.3μF
D.U.T.
+
V
- DS
Vgs(th)
VGS
3mA
IG
ID
Current Sampling Resistors
Fig 24a. Gate Charge Test Circuit
8
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Qgs1 Qgs2
Qgd
Qgodr
Fig 24b. Gate Charge Waveform
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IRFS7437-7PPbF
D2Pak - 7 Pin Package Outline
Dimensions are shown in millimeters (inches)
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
9
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IRFS7437-7PPbF
D2Pak - 7 Pin Part Marking Information
INTERNATIONAL
RECTIFIER LOGO
ASSEMBLY
LOT CODE
PART NUMBER
IRFS7437-7P
YWWP
LC
LC
DATE CODE
Y = LAST DIGIT OF YEAR
WW = WORK WEEK
P = LEAD-FREE
D2Pak - 7 Pin Tape and Reel
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
10
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IRFS7437-7PPbF
Qualification information†
Qualification level
Moisture Sensitivity Level
RoHS compliant
Industrial††
(per JEDEC JESD47F††† guidelines)
MS L1
D2Pak-7PIN
(per JE DE C J-S TD-020D†††)
Yes
Qualification standards can be found at International Rectifiers web site: http://www.irf.com/product-info/reliability/
Higher qualification ratings may be available should the user have such requirements. Please contact your
International Rectifier sales representative for further information: http:www.irf.com/whoto-call/salesrep/
Applicable version of JEDEC standard at the time of product release.
Revision History
Date
Comment
4/30/2014
2/19/2015
• Updated data sheet based on corporate template.
• Updated package outline and part marking on page 9 & 10.
• Updated EAS (L =1mH) = 796mJ on page 2
• Updated note 10 “Limited by TJmax , starting TJ = 25°C, L = 1mH, RG = 50Ω, IAS = 40A, VGS =10V”. on page 2
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
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IMPORTANT NOTICE
The information given in this document shall in no
event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”) .
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon
Technologies hereby disclaims any and all
warranties and liabilities of any kind, including
without limitation warranties of non-infringement
of intellectual property rights of any third party.
In addition, any information given in this document
is subject to customer’s compliance with its
obligations stated in this document and any
applicable legal requirements, norms and
standards concerning customer’s products and any
use of the product of Infineon Technologies in
customer’s applications.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer’s technical departments
to evaluate the suitability of the product for the
intended application and the completeness of the
product information given in this document with
respect to such application.
For further information on the product, technology,
delivery terms and conditions and prices please
contact your nearest Infineon Technologies office
(www.infineon.com).
WARNINGS
Due to technical requirements products may
contain dangerous substances. For information on
the types in question please contact your nearest
Infineon Technologies office.
Except as otherwise explicitly approved by Infineon
Technologies in a written document signed by
authorized
representatives
of
Infineon
Technologies, Infineon Technologies’ products may
not be used in any applications where a failure of
the product or any consequences of the use thereof
can reasonably be expected to result in personal
injury.
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