PD - 94753A
IRFR3504Z
IRFU3504Z
AUTOMOTIVE MOSFET
HEXFET® Power MOSFET
Features
l
l
l
l
l
Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
D
VDSS = 40V
RDS(on) = 9.0mΩ
G
ID = 42A
S
Description
Specifically designed for Automotive applications, this HEXFET®
Power MOSFET utilizes the latest processing techniques to
achieve extremely low on-resistance per silicon area. Additional
features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche
rating . These features combine to make this design an extremely
efficient and reliable device for use in Automotive applications and
a wide variety of other applications.
D-Pak
IRFR3504Z
I-Pak
IRFU3504Z
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V
77
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Package Limited)
Pulsed Drain Current
IDM
42
310
PD @TC = 25°C Power Dissipation
90
W
0.60
± 20
W/°C
V
77
mJ
c
Linear Derating Factor
VGS
Gate-to-Source Voltage
EAS (Thermally limited) Single Pulse Avalanche Energy
Single Pulse Avalanche Energy Tested Value
EAS (Tested )
d
c
IAR
Avalanche Current
EAR
Repetitive Avalanche Energy
TJ
Operating Junction and
TSTG
Storage Temperature Range
h
110
See Fig.12a, 12b, 15, 16
g
-55 to + 175
°C
Mounting Torque, 6-32 or M3 screw
300 (1.6mm from case )
y
Parameter
RθJA
RθJA
Junction-to-Ambient
i
y
10 lbf in (1.1N m)
Thermal Resistance
Junction-to-Case
Junction-to-Ambient (PCB mount)
A
mJ
Soldering Temperature, for 10 seconds
RθJC
A
54
Typ.
Max.
–––
1.66
–––
40
–––
110
Units
°C/W
HEXFET® is a registered trademark of International Rectifier.
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1
06/05/04
IRFR/U3504Z
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
V(BR)DSS
Drain-to-Source Breakdown Voltage
40
–––
–––
∆V(BR)DSS/∆TJ
Breakdown Voltage Temp. Coefficient
–––
0.032
–––
RDS(on)
9.0
V
Conditions
VGS = 0V, ID = 250µA
V/°C Reference to 25°C, ID = 1mA
mΩ VGS = 10V, ID = 42A
e
Static Drain-to-Source On-Resistance
–––
7.3
VGS(th)
Gate Threshold Voltage
2.0
–––
4.0
V
VDS = VGS, ID = 50µA
gfs
IDSS
Forward Transconductance
32
–––
–––
S
VDS = 10V, ID = 42A
–––
–––
20
µA
–––
–––
250
Gate-to-Source Forward Leakage
–––
–––
200
Gate-to-Source Reverse Leakage
–––
–––
-200
Qg
Total Gate Charge
–––
30
45
Qgs
Gate-to-Source Charge
–––
9.6
–––
Qgd
Gate-to-Drain ("Miller") Charge
–––
12
–––
VGS = 10V
td(on)
Turn-On Delay Time
–––
15
–––
VDD = 20V
tr
Rise Time
–––
74
–––
td(off)
Turn-Off Delay Time
–––
30
–––
tf
Fall Time
–––
38
–––
VGS = 10V
LD
Internal Drain Inductance
–––
4.5
–––
Between lead,
IGSS
Drain-to-Source Leakage Current
VDS = 40V, VGS = 0V
VDS = 40V, VGS = 0V, TJ = 125°C
nA
VGS = 20V
VGS = -20V
ID = 42A
nC
VDS = 32V
e
ID = 42A
ns
nH
RG = 15 Ω
e
D
LS
Internal Source Inductance
–––
7.5
–––
6mm (0.25in.)
from package
Ciss
Input Capacitance
–––
1510
–––
and center of die contact
VGS = 0V
Coss
Output Capacitance
–––
340
–––
Crss
Reverse Transfer Capacitance
–––
190
–––
Coss
Output Capacitance
–––
1100
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss
Output Capacitance
–––
340
–––
VGS = 0V, VDS = 32V, ƒ = 1.0MHz
Coss eff.
Effective Output Capacitance
–––
460
–––
VGS = 0V, VDS = 0V to 32V
G
S
VDS = 25V
pF
ƒ = 1.0MHz
f
Source-Drain Ratings and Characteristics
Parameter
Min. Typ. Max. Units
IS
Continuous Source Current
–––
–––
42
ISM
(Body Diode)
Pulsed Source Current
–––
–––
310
VSD
(Body Diode)
Diode Forward Voltage
–––
–––
1.3
V
trr
Reverse Recovery Time
–––
18
27
ns
Qrr
Reverse Recovery Charge
–––
9.2
14
nC
ton
Forward Turn-On Time
2
c
Conditions
MOSFET symbol
A
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 42A, VGS = 0V
e
TJ = 25°C, IF = 42A, VDD = 20V
di/dt = 100A/µs
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRFR/U3504Z
1000
1000
100
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
10
1
4.5V
30µs PULSE WIDTH
Tj = 25°C
100
BOTTOM
10
4.5V
30µs PULSE WIDTH
Tj = 175°C
0.1
1
0.1
1
10
100
0.1
VDS, Drain-to-Source Voltage (V)
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
60
100.0
T J = 175°C
10.0
T J = 25°C
1.0
VDS = 20V
30µs PULSE WIDTH
Gfs, Forward Transconductance (S)
1000.0
ID, Drain-to-Source Current (Α)
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
T J = 175°C
50
40
T J = 25°C
30
20
10
VDS = 10V
380µs PULSE WIDTH
0.1
4.0
5.0
6.0
7.0
8.0
9.0
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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10.0
0
0
10
20
30
40
50
ID, Drain-to-Source Current (A)
Fig 4. Typical Forward Transconductance
Vs. Drain Current
3
IRFR/U3504Z
2500
VGS, Gate-to-Source Voltage (V)
C rss = C gd
2000
C, Capacitance (pF)
20
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C oss = C ds + C gd
Ciss
1500
1000
Coss
500
ID= 42A
VDS= 32V
VDS= 20V
VDS= 8.0V
16
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
Crss
0
0
1
10
0
100
30
40
50
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000.0
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
20
QG Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
100.0
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
T J = 175°C
10.0
T J = 25°C
1.0
100µsec
10
1msec
1
VGS = 0V
0.1
0.1
0.2
0.6
1.0
1.4
1.8
VSD, Source-toDrain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
10
2.2
10msec
Tc = 25°C
Tj = 175°C
Single Pulse
0
1
10
100
1000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFR/U3504Z
80
RDS(on) , Drain-to-Source On Resistance
(Normalized)
2.0
ID , Drain Current (A)
LIMITED BY PACKAGE
60
40
20
0
25
50
75
100
125
150
175
ID = 42A
VGS = 10V
1.5
1.0
0.5
-60 -40 -20
T C , Case Temperature (°C)
0
20 40 60 80 100 120 140 160 180
T J , Junction Temperature (°C)
Fig 10. Normalized On-Resistance
Vs. Temperature
Fig 9. Maximum Drain Current Vs.
Case Temperature
Thermal Response ( Z thJC )
10
1
D = 0.50
0.20
0.10
0.1
0.05
τJ
0.02
0.01
0.01
R1
R1
τJ
τ1
R2
R2
τC
τ2
τ1
τ2
Ci= τi/Ri
Ci= i/Ri
SINGLE PULSE
( THERMAL RESPONSE )
τ
Ri (°C/W) τi (sec)
1.117
0.000536
0.5422
0.004428
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFR/U3504Z
DRIVER
L
VDS
D.U.T
RG
+
V
- DD
IAS
20V
VGS
tp
A
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
EAS, Single Pulse Avalanche Energy (mJ)
320
15V
ID
5.0A
6.4A
BOTTOM 42A
280
TOP
240
200
160
120
80
40
0
25
50
75
100
125
150
175
Starting T J, Junction Temperature (°C)
I AS
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
10 V
QGD
4.5
VG
Charge
Fig 13a. Basic Gate Charge Waveform
L
VCC
VGS(th) Gate threshold Voltage (V)
QGS
4.0
3.5
ID = 250µA
3.0
2.5
DUT
0
2.0
1K
-75 -50 -25
0
25
50
75
100 125 150 175
T J , Temperature ( °C )
Fig 13b. Gate Charge Test Circuit
6
Fig 14. Threshold Voltage Vs. Temperature
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IRFR/U3504Z
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
100
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆ Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.01
10
0.05
0.10
1
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
EAR , Avalanche Energy (mJ)
80
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 42A
60
40
20
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
Vs. Temperature
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Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T jmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. I av = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
175
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav ) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
7
IRFR/U3504Z
D.U.T
Driver Gate Drive
+
-
•
•
•
•
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
P.W.
Period
*
RG
D=
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
Period
P.W.
+
VDD
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
-
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V DS
VGS
RG
RD
D.U.T.
+
-VDD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
VDS
90%
10%
VGS
td(on)
tr
t d(off)
tf
Fig 18b. Switching Time Waveforms
8
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IRFR/U3504Z
D-Pak (TO-252AA) Package Outline
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: THIS IS AN IRFR120
WITH AS SEMBLY
LOT CODE 1234
AS SEMBLED ON WW 16, 1999
IN T HE ASS EMBLY LINE "A"
PART NUMBER
INTE RNATIONAL
RECT IFIER
LOGO
Note: "P" in assembly line position
indicates "Lead-Free"
IRFU120
12
916A
34
ASSEMBLY
LOT CODE
DATE CODE
YEAR 9 = 1999
WEEK 16
LINE A
OR
PART NUMBER
INT ERNATIONAL
RECTIFIER
LOGO
IRFU120
12
ASSEMBLY
LOT CODE
www.irf.com
34
DATE CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 9 = 1999
WEEK 16
A = ASSEMBLY SITE CODE
9
IRFR/U3504Z
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
E XAMPLE: T HIS IS AN IRFU120
WIT H AS SEMBLY
LOT CODE 5678
ASS EMBLE D ON WW 19, 1999
IN T HE AS SE MBLY LINE "A"
INT ERNAT IONAL
RE CT IFIER
LOGO
PART NUMBE R
IRF U120
919A
56
78
ASSE MBLY
LOT CODE
Note: "P" in as s embly line
pos ition indicates "Lead-Free"
DAT E CODE
YEAR 9 = 1999
WEEK 19
LINE A
OR
INT ERNAT IONAL
RECT IFIER
LOGO
PART NUMB ER
IRF U120
56
AS SEMBLY
LOT CODE
10
78
DAT E CODE
P = DES IGNAT ES LEAD-FREE
PRODUCT (OPT IONAL)
YEAR 9 = 1999
WEEK 19
A = AS SEMBLY SIT E CODE
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IRFR/U3504Z
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Notes:
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
max. junction temperature. (See fig. 11).
Limited by TJmax, starting TJ = 25°C, L = 0.09mH
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
RG = 25Ω, IAS = 42A, VGS =10V. Part not
avalanche performance.
recommended for use above this value.
This value determined from sample failure population. 100%
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
tested to this value in production.
When mounted on 1" square PCB (FR-4 or G-10 Material) .
For recommended footprint and soldering techniques refer to
application note #AN-994
Repetitive rating; pulse width limited by
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.04/05
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11
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/