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IRFZ48ZPBF

IRFZ48ZPBF

  • 厂商:

    EUPEC(英飞凌)

  • 封装:

    SOT78

  • 描述:

    MOSFET N-CH 55V 61A TO-220AB

  • 数据手册
  • 价格&库存
IRFZ48ZPBF 数据手册
PD - 95574A IRFZ48ZPbF IRFZ48ZSPbF IRFZ48ZLPbF Features l l l l l l l HEXFET® Power MOSFET Advanced Process Technology Ultra Low On-Resistance Dynamic dv/dt Rating 175°C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free D VDSS = 55V RDS(on) = 11mΩ G ID = 61A S Description This HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These features combine to make this design an extremely efficient and reliable device for use in a wide variety of applications. TO-220AB IRFZ48ZPbF D2Pak IRFZ48ZSPbF TO-262 IRFZ48ZLPbF Absolute Maximum Ratings Parameter ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) Max. Units 61 A ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (See Fig. 9) 43 IDM Pulsed Drain Current 240 PD @TC = 25°C Maximum Power Dissipation VGS Gate-to-Source Voltage c Linear Derating Factor EAS Single Pulse Avalanche Energy (Thermally Limited) EAS (tested) Single Pulse Avalanche Energy Tested Value IAR Avalanche Current EAR Repetitive Avalanche Energy TJ Operating Junction and TSTG Storage Temperature Range c i d 91 W 0.61 ± 20 W/°C V 73 mJ 120 See Fig.12a,12b,15,16 h A mJ -55 to + 175 Soldering Temperature, for 10 seconds °C 300 (1.6mm from case ) Mounting torque, 6-32 or M3 screw 10 lbf•in (1.1N•m) Thermal Resistance Typ. Max. Units RθJC Junction-to-Case Parameter ––– 1.64 °C/W RθCS Case-to-Sink, Flat, Greased Surface 0.50 ––– RθJA Junction-to-Ambient RθJA j Junction-to-Ambient (PCB Mount, steady state) ––– 62 ––– 40 HEXFET® is a registered trademark of International Rectifier. www.irf.com 1 09/27/10 IRFZ48Z/S/LPbF Static @ TJ = 25°C (unless otherwise specified) Parameter V(BR)DSS ∆ΒVDSS/∆TJ RDS(on) VGS(th) Min. Typ. Max. Units Qg Qgs Qgd td(on) tr td(off) tf LD Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance 55 ––– ––– 2.0 24 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– LS Internal Source Inductance ––– 7.5 ––– Ciss Coss Crss Coss Coss Coss eff. Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance ––– ––– ––– ––– ––– ––– 1720 300 160 1020 230 380 ––– ––– ––– ––– ––– ––– gfs IDSS IGSS Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current ––– ––– 0.054 ––– 8.6 11 ––– 4.0 ––– ––– ––– 20 ––– 250 ––– 200 ––– -200 43 64 11 16 16 24 15 ––– 69 ––– 35 ––– 39 ––– 4.5 ––– V V/°C mΩ V S µA nA nC ns nH Conditions VGS = 0V, ID = 250µA Reference to 25°C, ID = 1mA VGS = 10V, ID = 37A VDS = VGS, ID = 250µA VDS = 25V, ID = 37A VDS = 55V, VGS = 0V VDS = 55V, VGS = 0V, TJ = 125°C VGS = 20V VGS = -20V ID = 37A VDS = 44V VGS = 10V VDD = 28V ID = 37A RG = 12Ω VGS = 10V Between lead, D f f f 6mm (0.25in.) from package pF G S and center of die contact VGS = 0V VDS = 25V ƒ = 1.0MHz, See Fig. 5 VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz VGS = 0V, VDS = 44V, ƒ = 1.0MHz VGS = 0V, VDS = 0V to 44V Diode Characteristics Parameter Min. Typ. Max. Units Conditions IS Continuous Source Current ––– ––– 61 ISM (Body Diode) Pulsed Source Current ––– ––– 240 showing the integral reverse VSD trr Qrr ton (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time 1.3 31 20 p-n junction diode. TJ = 25°C, IS = 37A, VGS = 0V TJ = 25°C, IF = 37A, VDD = 30V di/dt = 100A/µs c Notes:  Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11). ‚ Limited by TJmax, starting TJ = 25°C, L =0.11mH, RG = 25Ω, IAS = 37A, VGS =10V. Part not recommended for use above this value. ƒ ISD ≤ 37A, di/dt ≤ 920A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. „ Pulse width ≤ 1.0ms; duty cycle ≤ 2%. 2 MOSFET symbol A ––– ––– ––– ––– 20 13 V ns nC D G S f f Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) … Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . † Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. ‡ This value determined from sample failure population. 100% tested to this value in production. ˆ This is applied to D2Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. www.irf.com IRFZ48Z/S/LPbF 1000 1000 100 BOTTOM TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V 100 10 4.5V 30µs PULSE WIDTH Tj = 25°C 1 0.1 1 10 100 BOTTOM 4.5V 10 30µs PULSE WIDTH Tj = 175°C 1 0.1 1000 1 10 100 1000 V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000 60 Gfs, Forward Transconductance (S) ID, Drain-to-Source Current (Α) VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V T J = 175°C 100 T J = 25°C 10 VDS = 25V 30µs PULSE WIDTH 1.0 4 5 6 7 8 9 VGS, Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com T J = 25°C 50 40 30 T J = 175°C 20 10 V DS = 10V 0 10 0 10 20 30 40 ID,Drain-to-Source Current (A) Fig 4. Typical Forward Transconductance vs. Drain Current 3 IRFZ48Z/S/LPbF 10000 12.0 VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd VGS, Gate-to-Source Voltage (V) ID= 37A C, Capacitance(pF) C oss = C ds + C gd Ciss 1000 Coss Crss VDS= 44V VDS= 28V 10.0 VDS= 11V 8.0 6.0 4.0 2.0 0.0 100 1 10 0 100 20 30 40 50 Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage Fig 5. Typical Capacitance vs. Drain-to-Source Voltage 1000 10 QG Total Gate Charge (nC) VDS, Drain-to-Source Voltage (V) 1000 ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) OPERATION IN THIS AREA LIMITED BY R DS(on) 100 100 T J = 175°C 10 1 TJ = 25°C VGS = 0V 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 VSD, Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 100µsec 1msec 10 Tc = 25°C Tj = 175°C Single Pulse 10msec 1 1 10 100 VDS, Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRFZ48Z/S/LPbF 70 2.5 ID = 37A VGS = 10V RDS(on) , Drain-to-Source On Resistance (Normalized) ID, Drain Current (A) 60 50 40 30 20 10 2.0 1.5 1.0 0 0.5 25 50 75 100 125 150 175 -60 -40 -20 0 T C , Case Temperature (°C) 20 40 60 80 100 120 140 160 180 T J , Junction Temperature (°C) Fig 10. Normalized On-Resistance vs. Temperature Fig 9. Maximum Drain Current vs. Case Temperature Thermal Response ( Z thJC ) 10 1 D = 0.50 0.20 0.10 0.1 0.05 τJ 0.02 0.01 0.01 R1 R1 τJ τ1 R2 R2 τC τ2 τ1 τ2 τ Ri (°C/W) τi (sec) 0.9848 0.000451 0.6546 0.002487 Ci= τi/Ri Ci i/Ri SINGLE PULSE ( THERMAL RESPONSE ) Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.001 1E-006 1E-005 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRFZ48Z/S/LPbF DRIVER L VDS D.U.T RG 20V VGS + V - DD IAS tp A 0.01Ω Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp EAS , Single Pulse Avalanche Energy (mJ) 300 15V ID 3.5A 4.9A BOTTOM 37A TOP 250 200 150 100 50 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) I AS Fig 12c. Maximum Avalanche Energy vs. Drain Current Fig 12b. Unclamped Inductive Waveforms QG QGS QGD 4.0 VG Charge Fig 13a. Basic Gate Charge Waveform L DUT 0 VCC 1K VGS(th) Gate threshold Voltage (V) 10 V 3.5 3.0 2.5 ID = 250µA 2.0 1.5 1.0 -75 -50 -25 0 25 50 75 100 125 150 175 200 T J , Temperature ( °C ) Fig 13b. Gate Charge Test Circuit 6 Fig 14. Threshold Voltage vs. Temperature www.irf.com IRFZ48Z/S/LPbF 1000 Avalanche Current (A) Duty Cycle = Single Pulse 100 Allowed avalanche Current vs avalanche pulsewidth, tav assuming ∆ Tj = 25°C due to avalanche losses 0.01 10 0.05 0.10 1 0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 15. Typical Avalanche Current vs.Pulsewidth EAR , Avalanche Energy (mJ) 80 TOP Single Pulse BOTTOM 1% Duty Cycle ID = 37A 60 40 20 0 25 50 75 100 125 150 Starting T J , Junction Temperature (°C) Fig 16. Maximum Avalanche Energy vs. Temperature www.irf.com 175 Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 15, 16). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav ) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav 7 IRFZ48Z/S/LPbF D.U.T Driver Gate Drive ƒ + ‚ „ • • • • D.U.T. ISD Waveform Reverse Recovery Current + dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test P.W. Period *  RG D= VGS=10V Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer - - Period P.W. + VDD + Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage - Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V DS VGS RG RD D.U.T. + -VDD 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % Fig 18a. Switching Time Test Circuit VDS 90% 10% VGS td(on) tr t d(off) tf Fig 18b. Switching Time Waveforms 8 www.irf.com IRFZ48Z/S/LPbF TO-220AB Package Outline Dimensions are shown in millimeters (inches) TO-220AB Part Marking Information EXAMPLE: T HIS IS AN IRF1010 LOT CODE 1789 AS S EMBLED ON WW 19, 2000 IN THE AS S EMBLY LINE "C" Note: "P" in as sembly line position indicates "Lead - Free" INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER DAT E CODE YEAR 0 = 2000 WEEK 19 LINE C Notes: 1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/ 2. For the most current drawing please refer to IR website at http://www.irf.com/package/ www.irf.com 9 IRFZ48Z/S/LPbF D2Pak (TO-263AB) Package Outline Dimensions are shown in millimeters (inches) D2Pak (TO-263AB) Part Marking Information T HIS IS AN IRF530S WITH LOT CODE 8024 AS SEMBLED ON WW 02, 2000 IN T HE ASS EMBLY LINE "L" INT ERNAT IONAL RECT IFIER LOGO AS SEMBLY LOT CODE PART NUMBER F530S DATE CODE YEAR 0 = 2000 WEEK 02 LINE L OR INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER F530S DAT E CODE P = DES IGNAT ES LEAD - FREE PRODUCT (OPTIONAL) YEAR 0 = 2000 WEEK 02 A = ASS EMBLY SIT E CODE Notes: 1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/ 2. For the most current drawing please refer to IR website at http://www.irf.com/package/ 10 www.irf.com IRFZ48Z/S/LPbF TO-262 Package Outline Dimensions are shown in millimeters (inches) TO-262 Part Marking Information EXAMPLE: THIS IS AN IRL3103L LOT CODE 1789 AS SEMBLED ON WW 19, 1997 IN T HE AS SEMBLY LINE "C" INT ERNAT IONAL RECT IFIER LOGO ASS EMBLY LOT CODE PART NUMBER DAT E CODE YEAR 7 = 1997 WEEK 19 LINE C OR INT ERNAT IONAL RECT IFIER LOGO ASSEMBLY LOT CODE PART NUMB ER DAT E CODE P = DESIGNAT ES LEAD-FREE PRODUCT (OPT IONAL) YEAR 7 = 1997 WEEK 19 A = AS SEMBLY S ITE CODE Notes: 1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/ 2. For the most current drawing please refer to IR website at http://www.irf.com/package/ www.irf.com 11 IRFZ48Z/S/LPbF D2Pak Tape & Reel Information Dimensions are shown in millimeters (inches) TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) FEED DIRECTION 1.85 (.073) 1.60 (.063) 1.50 (.059) 11.60 (.457) 11.40 (.449) 1.65 (.065) 0.368 (.0145) 0.342 (.0135) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) TRL 10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 4.72 (.136) 4.52 (.178) 16.10 (.634) 15.90 (.626) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) MIN. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 TO-220AB package is not recommended for Surface Mount Application. Data and specifications subject to change without notice. This product has been designed and qualified for th Industrial market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 09/2010 12 www.irf.com
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