IRGC100B120UB

IRGC100B120UB Die in Wafer Form Features           GEN5 Non Punch Through (NPT) Technology Low VCE(on 10µs Short Circuit Capability Square RBSOA Positive VCE(on) Temperature Coefficient Benchmark Efficiency above 20KHz Optimized for Welding, UPS, and Induction Heating Rugged with Ultra Fast Performance Excellent Current Sharing in Parallel Operation Parameter VCE(ON) V(BR)CES VGE(th) ICES IGES C G Benefits           E n-channel VCES = 1200V IC(Noml) = 100A VCE(on) typ = 3.2V @ IC(nom) @ 25°C Ultra Fast IGBT Short Circuit Rated 150mm Wafer Electrical Characteristics (Wafer Form) Description Min. Typ. Max. Units Test Conditions Collector-to-Emitter Saturation Voltage ––– 3.2 3.5   VGE = 15V, IC = 100A, TJ = 25°C Collector-to-Emitter Breakdown Voltage 1200 ––– ––– V VGE = 0V, ICES = 1mA , TJ = 25°C Gate-Emitter Threshold Voltage 4.5 ––– 6.0   VGE = VCE, IC = 1mA, TJ = 25°C Zero Gate Voltage Collector Current ––– ––– 40 µA VCE = 1200V, VGE = 0V, TJ = 25°C Gate Emitter Leakage Current ––– ––– ± 400 nA VCE = 0V, VGE = ±20V, TJ = 25°C Mechanical Parameter   Nominal Backside Metal Composition, (Thickness) AI - Ti - Ni/V - Ag (1kA -1kA - 4kA - 6kA) Nominal Front Metal Composition, (Thickness) 99% Al 1% Si (4µm) Dimensions 0.488” x 0.488” Wafer Diameter 150mm, with std. < 100> flat Wafer Thickness, Tolerance 185µm, +/-15µm Relevant Die Mechanical Dwg. Number 01-5318 Minimum Street Width 100µm Reject Ink Dot Size 0.25 mm diameter minimum Ink Dot Location Consistent throughout same wafer lot Recommended Storage Environment Store in original container, in desiccate nitrogen, with no contamination Recommended Die Attach Conditions For optimum electrical results, die attach temperature should not exceed 300ºC. Note:  This IR product is100% tested at wafer level and is manufactured using established, mature and well characterized processes. Due to restrictions in die level processing, die may not be equivalent to standard package products and are therefore offered with a conditional performance guarantee. The above data sheet is based on IR sample testing under certain predetermined and assumed conditions, and are provided for illustration purposes only. Customers are encouraged to perform testing in actual proposed packaged and use conditions. IR die products are tested using IR-based quality assurance procedures and are manufactured using IR’s established processes. Programs for customer-specified testing are available upon request. IR has experienced assembly yields of generally 95% or greater for individual die; however, customer’s results will vary. Estimates such as those described and set forth in this data sheet for semiconductor die will vary depending on a number of packaging, handling, use and other factors. Sold die may not perform on an equivalent basis to standard package products and are therefore offered with a limited warranty as described in IR’s applicable standard terms and conditions of sale. All IR die sales are subject to IR’s applicable standard terms and conditions of sale, which are available upon request. For customers requiring a particular parameter to be guaranteed, special testing can be carried out or product can be purchased as known good die.  Part number shown is for die in wafer. Contact factory for these other options. 1 www.irf.com © 2015 International Rectifier Submit Datasheet Feedback July 6, 2015 IRGC100B120UB   Die Outline 2 www.irf.com © 2015 International Rectifier Submit Datasheet Feedback July 6, 2015 IRGC100B120UB   Additional Testing and Screening For Customers requiring product supplied as Known Good Die (KGD) or requiring specific die level testing, please contact your local IR Sales Shipping Sawn Wafer on Film. Please contact your local IR sales office for non-standard shipping options Handling  Product must be handled only at ESD safe workstations. Standard ESD precautions and safe work environments are as defined in MIL-HDBK-263.  Product must be handled only in a class 10,000 or better-designated clean room environment.  Singulated die are not to be handled with tweezers. A vacuum wand with a non-metallic ESD protected tip should be used. Wafer/Die Storage  Proper storage conditions are necessary to prevent product contamination and/or degradation after shipment.  Note: To reduce the risk of contamination or degradation, it is recommended that product not being used in the assembly process be returned to their original containers and resealed with a vacuum seal process.  Sawn wafers on a film frame are intended for immediate use and have a limited shelf life. Further Information For further information please contact your local IR Sales office. Revision History Date 07/06/2015 Comments      Updated IFX logo on all pages Removed Vceon @ IC =10A, VGE = 15V on page1. Added Vceon @ IC =100A, VGE = 15V on page1. Corrected Vgeth min from 4.4V to 4.5V on page1. Corrected Iges from +/-3uA to +/-400nA on page1. IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA To contact International Rectifier, please visit http://www.irf.com/whoto-call/ 3 www.irf.com © 2015 International Rectifier Submit Datasheet Feedback July 6, 2015