IRL1104L

PD -91840 IRL1104S/L PRELIMINARY l l l l l l l Logic-Level Gate Drive Advanced Process Technology Surface Mount (IRL1104S) Low-profile through-hole (IRL1104L) 175°C Operating Temperature Fast Switching Fully Avalanche Rated HEXFET® Power MOSFET D VDSS = 40V RDS(on) = 0.008Ω G ID = 104A† S Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRL1104L) is available for lowprofile applications. D 2 P ak T O -26 2 Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TA = 25°C PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V… Continuous Drain Current, VGS @ 10V… Pulsed Drain Current … Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy‚… Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt ƒ… Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Max. 104† 74† Units A 416 2.4 167 1.1 ±16 340 62 17 5.0 -55 to + 175 W W W/°C V mJ A mJ V/ns °C 300 (1.6mm from case ) Thermal Resistance Parameter RθJC RθJA www.irf.com Junction-to-Case Junction-to-Ambient(PCB Mounted,steady-state)** Typ. Max. Units ––– ––– 0.9 62 °C/W 1 10/28/98 IRL1104S/L Electrical Characteristics @ TJ = 25°C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage ∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Min. 40 ––– ––– ––– 1.0 53 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– LS Internal Source Inductance ––– Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance ––– ––– ––– V(BR)DSS RDS(on) Static Drain-to-Source On-Resistance VGS(th) gfs Gate Threshold Voltage Forward Transconductance IDSS Drain-to-Source Leakage Current IGSS Typ. ––– 0.04 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 18 257 32 64 Max. Units Conditions ––– V VGS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID =1mA… 0.008 VGS = 10V, ID = 62A „ W 0.012 VGS = 4.5V, ID = 52A „ V VDS = VGS, ID = 250µA ––– S VDS = 25V, ID = 62A… 25 VDS =40V, VGS = 0V µA 250 VDS = 32V, VGS = 0V, TJ = 150°C 100 VGS = 16V nA -100 VGS = -16V 68 ID =62A 24 nC VDS = 32V 34 VGS = 4.5V, See Fig. 6 and 13 „… ––– VDD = 20V ––– ID =54A ––– RG = 3.6Ω , VGS = 4.5V ––– RD = 0.4Ω, See Fig. 10 „… Between lead, 7.5 nH ––– and center of die contact 3445 ––– VGS = 0V 1065 ––– pF VDS = 25V 270 ––– ƒ = 1.0MHz, See Fig. 5… Source-Drain Ratings and Characteristics IS I SM VSD trr Q rr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)  Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol ––– ––– 104† showing the A G integral reverse ––– ––– 416 p-n junction diode. S ––– ––– 1.3 V TJ = 25°C, IS =62A, VGS = 0V „ ––– 84 126 ns TJ = 25°C, IF =62A ––– 223 335 nC di/dt = 100A/µs „… Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes:  Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) ‚ VDD = 15V, starting TJ = 25°C, L = 0.18mH RG = 25Ω, IAS = 62A. (See Figure 12) „ Pulse width ≤ 300µs; duty cycle ≤ 2%. … Uses IRL1104 data and test conditions. † Calculated continuous current based on maximum allowable ƒ ISD ≤ 62A, di/dt ≤ 217A/µs, VDD ≤ V(BR)DSS, junction temperature;for recommended current-handling of the package refer to Design Tip # 93-4 TJ ≤ 175°C ** When mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. 2 www.irf.com IRL1104S/L 1000 1000 VGS 15V 10V 7.0V 5.5V 4.5V 4.0V 3.5V BOTTOM 2.7V 100 100 10 2.7V 20µs PULSE WIDTH TJ = 25 °C 1 0.1 1 10 100 R DS(on) , Drain-to-Source On Resistance (Normalized) TJ = 25 ° C TJ = 175 ° C 100 10 V DS = 25 50V 20µs PULSE WIDTH 8.0 10.0 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com 10 100 Fig 2. Typical Output Characteristics 2.5 6.0 1 VDS , Drain-to-Source Voltage (V) 1000 4.0 20µs PULSE WIDTH TJ = 175 °C 1 0.1 Fig 1. Typical Output Characteristics 1 2.0 2.7V 10 VDS , Drain-to-Source Voltage (V) I D , Drain-to-Source Current (A) VGS 15V 10V 7.0V 5.5V 4.5V 4.0V 3.5V BOTTOM 2.7V TOP I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) TOP ID = 104A 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature ( °C) Fig 4. Normalized On-Resistance Vs. Temperature 3 IRL1104S/L VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd C, Capacitance (pF) 5000 4000 Ciss 3000 2000 Coss 1000 10 VGS, Gate-to-Source Voltage (V) 6000 ID = 62 A VDS = 32V VDS = 20V 8 6 4 2 Crss 0 1 10 100 0 VDS , Drain-to-Source Voltage (V) 20 40 60 80 QG , Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000 10000 OPERATION IN THIS AREA LIMITED BY RDS(on) 100 TJ = 175 ° C 1000 I D , Drain Current (A) ISD , Reverse Drain Current (A) FOR TEST CIRCUIT SEE FIGURE 13 0 10 TJ = 25 ° C 1 0.1 0.2 100 100us 1ms 10 10ms TC = 25 °C TJ = 175 °C Single Pulse V GS = 0 V 0.8 1.4 2.0 VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 10us 2.6 1 1 10 100 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRL1104S/L 120 100 I D , Drain Current (A) RD V DS LIMITED BY PACKAGE VGS D.U.T. RG + V - DD 80 4.5V 60 Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 40 Fig 10a. Switching Time Test Circuit 20 VDS 90% 0 25 50 75 100 125 150 175 TC , Case Temperature ( ° C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 1 D = 0.50 0.20 0.1 0.10 0.05 P DM 0.02 0.01 t1 SINGLE PULSE (THERMAL RESPONSE) t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.01 0.00001 0.0001 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRL1104S/L 1 5V L VD S D .U .T RG IA S 150 V D R IV E R + - VD D A 0.0 1 Ω tp Fig 12a. Unclamped Inductive Test Circuit V (B R )D SS EAS , Single Pulse Avalanche Energy (mJ) 800 TOP BOTTOM ID 25A 44A 62A 600 400 200 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature ( °C) tp Fig 12c. Maximum Avalanche Energy Vs. Drain Current IAS Current Regulator Same Type as D.U.T. Fig 12b. Unclamped Inductive Waveforms 50KΩ QG 12V .2µF .3µF 4.5 V QGS QGD D.U.T. + V - DS VGS VG 3mA Charge Fig 13a. Basic Gate Charge Waveform 6 IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit www.irf.com IRL1104S/L Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer ƒ + ‚ - - „ +  • • • • RG dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Driver Gate Drive P.W. D= Period + - V DD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS www.irf.com 7 IRL1104S/L D2Pak Package Details 1 0.54 (.4 15) 1 0.29 (.4 05) 1.4 0 (.055 ) M AX. -A- 1.3 2 (.05 2) 1.2 2 (.04 8) 2 1.7 8 (.07 0) 1.2 7 (.05 0) 1 1 0.16 (.4 00 ) RE F. -B - 4.69 (.1 85) 4.20 (.1 65) 6.47 (.2 55 ) 6.18 (.2 43 ) 3 15 .4 9 (.6 10) 14 .7 3 (.5 80) 2.7 9 (.110 ) 2.2 9 (.090 ) 2.61 (.1 03 ) 2.32 (.0 91 ) 5 .28 (.20 8) 4 .78 (.18 8) 3X 1.40 (.0 55) 1.14 (.0 45) 5 .08 (.20 0) 0.5 5 (.022 ) 0.4 6 (.018 ) 0 .93 (.03 7 ) 3X 0 .69 (.02 7 ) 0 .25 (.01 0 ) M 8.8 9 (.3 50 ) R E F. 1.3 9 (.0 5 5) 1.1 4 (.0 4 5) B A M M IN IM U M R E CO M M E ND E D F O O TP R IN T 1 1.43 (.4 50 ) NO TE S: 1 D IM EN S IO N S A FTER SO L D ER D IP. 2 D IM EN S IO N IN G & TO LE RA N C IN G PE R A N S I Y1 4.5M , 198 2. 3 C O N TRO L LIN G D IM EN SIO N : IN C H . 4 H E ATSINK & L EA D D IM EN S IO N S D O N O T IN C LU D E B UR R S. LE A D A SS IG N M E N TS 1 - G A TE 2 - D R AIN 3 - S O U RC E 8.89 (.3 50 ) 17 .78 (.70 0) 3 .8 1 (.15 0) 2 .08 (.08 2) 2X 2.5 4 (.100 ) 2X Part Marking IN TE R N A TIO N A L R E C T IF IE R LO G O A S S E M B LY LO T C O D E 8 A PART NUM BER F530S 9 24 6 9B 1M DATE CODE (Y YW W ) YY = Y E A R W W = W EEK www.irf.com IRL1104S/L TO-262 Package Details Part Marking www.irf.com 9 IRL1104S/L D2Pak Tape and Reel TR R 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 4 .1 0 (.1 6 1 ) 3 .9 0 (.1 5 3 ) F E E D D IRE CTIO N 1 .8 5 (.0 7 3 ) 1 .6 5 (.0 6 5 ) 1 .60 (.06 3) 1 .50 (.05 9) 1 1 .6 0 (.4 5 7 ) 1 1 .4 0 (.4 4 9 ) 0 .3 68 (.0 1 4 5 ) 0 .3 42 (.0 1 3 5 ) 1 5 .4 2 (.6 0 9 ) 1 5 .2 2 (.6 0 1 ) 2 4 .3 0 (.9 5 7 ) 2 3 .9 0 (.9 4 1 ) TR L 10 .9 0 (.42 9) 10 .7 0 (.42 1) 1 .75 (.06 9 ) 1 .25 (.04 9 ) 4 .7 2 (.1 3 6) 4 .5 2 (.1 7 8) 16 .10 (.63 4 ) 15 .90 (.62 6 ) F E E D D IRE C TIO N 13.50 (.532 ) 12.80 (.504 ) 2 7.4 0 (1.079) 2 3.9 0 (.9 41) 4 33 0.00 (1 4.1 73) MA X. NO TES : 1. C O M F O R M S TO E IA -4 18. 2. C O N TR O LLIN G D IM E N S IO N : M ILL IM ET ER . 3. D IM E N S IO N ME A S U R E D @ H U B . 4. IN C LU D E S F LA N G E D IS TO R T IO N @ O U T E R E D G E . 60.00 (2.3 62) MIN . 26 .40 (1.03 9) 24 .40 (.961 ) 3 3 0.40 (1.1 97) MAX. 4 WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 838 4630 IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673, Taiwan Tel: 886-2-2377-9936 http://www.irf.com/ Data and specifications subject to change without notice. 10/98 10 www.irf.com Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/