PD -95576
Logic-Level Gate Drive
l Advanced Process Technology
l Surface Mount (IRL1104S)
l Low-profile through-hole (IRL1104L)
l 175°C Operating Temperature
l Fast Switching
l Fully Avalanche Rated
l Lead-Free
Description
IRL1104SPbF
IRL1104LPbF
l
HEXFET® Power MOSFET
D
VDSS = 40V
RDS(on) = 0.008Ω
G
Fifth Generation HEXFETs from International Rectifier utilize
advanced processing techniques to achieve extremely low
on-resistance per silicon area. This benefit, combined with
the fast switching speed and ruggedized device design that
HEXFET Power MOSFETs are well known for, provides the
designer with an extremely efficient and reliable device for
use in a wide variety of applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-resistance
in any existing surface mount package. The D2Pak is
suitable for high current applications because of its low
internal connection resistance and can dissipate up to 2.0W
in a typical surface mount application.
The through-hole version (IRL1104L) is available for lowprofile applications.
ID = 104A
S
D 2 Pak
TO-262
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TA = 25°C
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
104
74
Units
A
416
2.4
167
1.1
±16
340
62
17
5.0
-55 to + 175
W
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
Thermal Resistance
Parameter
RθJC
RθJA
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Junction-to-Case
Junction-to-Ambient(PCB Mounted,steady-state)**
Typ.
Max.
Units
–––
–––
0.9
40
°C/W
1
07/19/04
IRL1104S/LPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
40
–––
–––
–––
1.0
53
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
LS
Internal Source Inductance
–––
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
V(BR)DSS
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
IGSS
Typ.
–––
0.04
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
18
257
32
64
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID =1mA
0.008
VGS = 10V, ID = 62A
W
0.012
VGS = 4.5V, ID = 52A
V
VDS = VGS, ID = 250µA
–––
S
VDS = 25V, ID = 62A
25
VDS =40V, VGS = 0V
µA
250
VDS = 32V, VGS = 0V, TJ = 150°C
100
VGS = 16V
nA
-100
VGS = -16V
68
ID =62A
24
nC VDS = 32V
34
VGS = 4.5V, See Fig. 6 and 13
–––
VDD = 20V
–––
ID =54A
–––
RG = 3.6Ω , V GS = 4.5V
–––
RD = 0.4Ω, See Fig. 10
Between lead,
7.5
nH
–––
and center of die contact
3445 –––
VGS = 0V
1065 –––
pF
VDS = 25V
270 –––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
I SM
VSD
trr
Q rr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 104
showing the
A
G
integral reverse
––– ––– 416
p-n junction diode.
S
––– ––– 1.3
V
TJ = 25°C, IS =62A, VGS = 0V
––– 84 126
ns
TJ = 25°C, IF =62A
––– 223 335
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
VDD = 15V, starting TJ = 25°C, L = 0.18mH
RG = 25Ω, IAS = 62A. (See Figure 12)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Uses IRL1104 data and test conditions.
Calculated continuous current based on maximum allowable
ISD ≤ 62A, di/dt ≤ 217A/µs, VDD ≤ V(BR)DSS,
junction temperature;for recommended current-handling of the
package refer to Design Tip # 93-4
TJ ≤ 175°C
** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
2
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IRL1104S/LPbF
1000
1000
VGS
15V
10V
7.0V
5.5V
4.5V
4.0V
3.5V
BOTTOM 2.7V
100
10
2.7V
20µs PULSE WIDTH
TJ = 25 °C
1
0.1
1
10
100
100
RDS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
TJ = 25 ° C
TJ = 175 ° C
100
10
V DS = 25
50V
20µs PULSE WIDTH
10.0
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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10
100
Fig 2. Typical Output Characteristics
2.5
8.0
1
VDS , Drain-to-Source Voltage (V)
1000
6.0
20µs PULSE WIDTH
TJ = 175 °C
1
0.1
Fig 1. Typical Output Characteristics
4.0
2.7V
10
VDS , Drain-to-Source Voltage (V)
1
2.0
VGS
15V
10V
7.0V
5.5V
4.5V
4.0V
3.5V
BOTTOM 2.7V
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
ID = 104A
2.0
1.5
1.0
0.5
0.0
-60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRL1104S/LPbF
VGS = 0V,
f = 1MHz
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
C, Capacitance (pF)
5000
4000
Ciss
3000
2000
Coss
1000
10
VGS , Gate-to-Source Voltage (V)
6000
ID = 62 A
VDS = 32V
VDS = 20V
8
6
4
2
Crss
0
1
10
0
100
VDS , Drain-to-Source Voltage (V)
0
20
40
60
80
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
10000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
100
TJ = 175 ° C
1000
ID , Drain Current (A)
ISD , Reverse Drain Current (A)
FOR TEST CIRCUIT
SEE FIGURE 13
10
TJ = 25 ° C
1
0.1
0.2
100
100us
1ms
10
10ms
TC = 25 °C
TJ = 175 °C
Single Pulse
VGS = 0 V
0.8
1.4
2.0
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
10us
2.6
1
1
10
100
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRL1104S/LPbF
120
100
ID , Drain Current (A)
RD
V DS
LIMITED BY PACKAGE
V GS
D.U.T.
RG
+
V
- DD
80
4.5V
60
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
40
Fig 10a. Switching Time Test Circuit
20
VDS
90%
0
25
50
75
100
125
150
175
TC , Case Temperature ( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
1
D = 0.50
0.20
0.1
0.10
0.05
PDM
0.02
0.01
t1
SINGLE PULSE
(THERMAL RESPONSE)
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
15V
L
VDS
D.U.T
RG
IAS
5
10V
DRIVER
+
V
- DD
A
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
EAS , Single Pulse Avalanche Energy (mJ)
IRL1104S/LPbF
800
TOP
BOTTOM
ID
25A
44A
62A
600
400
200
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature ( °C)
tp
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I AS
Current Regulator
Same Type as D.U.T.
Fig 12b. Unclamped Inductive Waveforms
50KΩ
QG
12V
.2µF
.3µF
4.5 V
QGS
QGD
D.U.T.
+
V
- DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRL1104S/LPbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
P.W.
Period
D=
+
-
V DD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
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7
IRL1104S/LPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
T H IS IS AN IR F 530S WIT H
L OT CODE 8024
AS S E MB L E D ON WW 02, 2000
IN T H E AS S E MB L Y L INE "L"
INT E R NAT IONAL
R E CT IF IE R
LOGO
Note: "P " in as s embly line
pos ition indicates "Lead-F ree"
P AR T NU MB E R
F 530S
AS S E MB L Y
L OT CODE
OR
INT E R NAT IONAL
R E CT IF IE R
L OGO
AS S E MB L Y
LOT CODE
8
DAT E CODE
YE AR 0 = 2000
WE E K 02
L INE L
PAR T NU MB E R
F 530S
DAT E CODE
P = DE S IGNAT E S L E AD-F R E E
PRODU CT (OPT IONAL)
YE AR 0 = 2000
WE E K 02
A = AS S E MB LY S IT E CODE
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IRL1104S/LPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
E XAMPL E : T H IS IS AN IRL 3103L
L OT CODE 1789
AS S E MB L E D ON WW 19, 1997
IN T H E AS S E MB L Y LINE "C"
Note: "P" in as s embly line
pos ition indicates "L ead-F ree"
INT E RNAT IONAL
RE CT IF IE R
L OGO
AS S E MB L Y
L OT CODE
PART NUMB ER
DAT E CODE
YE AR 7 = 1997
WE E K 19
L INE C
OR
INT E RNAT IONAL
RE CT IF IE R
L OGO
AS S E MB L Y
L OT CODE
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PART NUMB E R
DAT E CODE
P = DE S IGNAT E S L EAD-F REE
PRODUCT (OPT IONAL )
YE AR 7 = 1997
WE E K 19
A = AS S E MB L Y S IT E CODE
9
IRL1104S/LPbF
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
1.65 (.065)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
30.40 (1.197)
MAX.
26.40 (1.039)
24.40 (.961)
3
4
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 07/04
10
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
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