IRL3303S

PD - 9.1323B IRL3303S/L l l l l l l l Logic-Level Gate Drive Advanced Process Technology Surface Mount (IRL3303S) Low-profile through-hole (IRL3303L) 175°C Operating Temperature Fast Switching Fully Avalanche Rated HEXFET® Power MOSFET D VDSS = 30V RDS(on) = 0.026Ω G ID = 38A S Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible onresistance in any existing surface mount package. The D2 Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRL3303L) is available for lowprofile applications. D 2 Pak T O -2 6 2 Absolute Maximum Ratings ID @ TC = 25°C ID @ TC = 100°C IDM PD @TA = 25°C PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG Parameter Max. Continuous Drain Current, VGS @ 10V… Continuous Drain Current, VGS @ 10V… Pulsed Drain Current … Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy‚… Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt ƒ… Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds 38 27 140 3.8 68 0.45 ±16 130 20 6.8 5.0 -55 to + 175 Units A W W W/°C V mJ A mJ V/ns °C 300 (1.6mm from case ) Thermal Resistance Parameter RθJC RθJA Junction-to-Case Junction-to-Ambient ( PCB Mounted,steady-state)** Typ. Max. Units ––– ––– 2.2 40 °C/W 8/25/97 IRL3303S/L Electrical Characteristics @ TJ = 25°C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage ∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Min. 30 ––– ––– ––– 1.0 12 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– LS Internal Source Inductance ––– Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance ––– ––– ––– V(BR)DSS RDS(on) Static Drain-to-Source On-Resistance VGS(th) gfs Gate Threshold Voltage Forward Transconductance IDSS Drain-to-Source Leakage Current IGSS Typ. ––– 0.035 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 7.4 200 14 36 Max. Units Conditions ––– V VGS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 1mA… 0.026 VGS = 10V, ID = 20A „ Ω 0.040 VGS = 4.5V, ID = 17A „ TJ = 150°C V VDS = VGS , ID = 250µA ––– S VDS = 25V, ID = 20A… 25 VDS = 30V, VGS = 0V µA 250 VDS = 24V, VGS = 0V, T J = 150°C 100 VGS = 16V nA -100 VGS = -16V 26 ID = 20A 8.8 nC VDS = 24V 15 VGS = 4.5V, See Fig. 6 and 13 „… ––– VDD = 15V ––– ID = 20A ––– RG = 6.5Ω ––– RD = 0.7Ω, See Fig. 10 „… Between lead, 7.5 ––– nH and center of die contact 870 ––– VGS = 0V 340 ––– pF VDS = 25V 170 ––– ƒ = 1.0MHz, See Fig. 5… Source-Drain Ratings and Characteristics IS ISM VSD t rr Qrr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)  Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol ––– ––– 38 showing the A G integral reverse ––– ––– 140 p-n junction diode. S ––– ––– 1.3 V TJ = 25°C, IS = 20A, V GS = 0V „ ––– 72 110 ns TJ = 25°C, IF = 20A ––– 180 280 µC di/dt = 100A/µs „… Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes:  Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) ‚ VDD = 15V, starting TJ = 25°C, L = 470µH RG = 25Ω, IAS = 20A. (See Figure 12) ƒ ISD ≤ 20A, di/dt ≤ 140A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C „ Pulse width ≤ 300µs; duty cycle ≤ 2%. … Uses IRL3303 data and test conditions. ** When mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. IRL3303S/L 1000 1000 VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOT TOM 2.5V ID , D ra in -to -S o u rc e C u rre n t (A ) ID , D ra in -to -S o u rc e C u rre n t (A ) 100 VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTT OM 2.5V TOP TOP 10 1 2 .5V 2 0µ s PU LSE W ID TH T J = 25 °C 0.1 0.1 1 10 100 10 2.5V 1 0.1 0.1 A 100 Fig 1. Typical Output Characteristics R D S (o n ) , D ra in -to -S o u rc e O n R e si sta n ce (N o rm a li ze d ) I D , D r ain- to-S ourc e C urre nt (A ) 2.0 100 T J = 2 5 °C TJ = 1 75 °C 10 1 V DS = 1 5 V 2 0µ s PU L SE W ID TH 3 4 5 6 7 8 9 V G S , G ate-to -S ource V olta ge (V ) Fig 3. Typical Transfer Characteristics 10 A 100 Fig 2. Typical Output Characteristics 1000 2 1 V D S , Drain-to-Source V oltage (V ) V D S , Drain-to-S ource V oltage (V) 0.1 20 µ s PU LSE W ID TH T J = 1 75°C 10 A I D = 3 4A 1.5 1.0 0.5 V G S = 10 V 0.0 -60 -40 -20 0 20 40 60 80 A 100 120 140 160 180 T J , Junction T em perature (°C ) Fig 4. Normalized On-Resistance Vs. Temperature IRL3303S/L V GS C is s C rss C is s C oss C , C a p a c ita n c e (p F ) 1400 15 = 0 V, f = 1M H z = C gs + C gd , Cds SH OR TE D = C gd = C d s + C gd V G S , G a te -to -S o u rce V o lta g e (V ) 1600 1200 1000 C os s 800 600 C rss 400 200 0 1 10 100 A I D = 2 0A V D S = 24 V V D S = 15 V 12 9 6 3 FOR TE ST C IR CU IT SE E FIG U RE 13 0 0 V D S , D rain-to-S ource Voltage (V ) 20 30 A 40 Q G , Total Gate Charge (nC) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 1000 1000 OPE R ATIO N IN TH IS A RE A LIMITE D BY R D S(o n) I D , D ra in C u rre n t (A ) I S D , R e v e rse D ra in C u rre n t (A ) 10 100 TJ = 1 75 °C T J = 25 °C 10 VG S = 0 V 1 0.0 0.5 1.0 1.5 2.0 V S D , S ource-to-Drain Voltage (V ) Fig 7. Typical Source-Drain Diode Forward Voltage A 2.5 10µ s 100 100 µs 10 1m s 10m s T C = 25 °C T J = 17 5°C S ing le Pulse 1 1 A 10 V D S , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area 100 IRL3303S/L VDS 40 VGS D.U.T. RG + -V DD I D , Drain Current (A) 30 4.5V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 20 Fig 10a. Switching Time Test Circuit 10 VDS 90% 0 25 50 75 100 125 TC , Case Temperature 150 175 ( ° C) 10% VGS td(on) Fig 9. Maximum Drain Current Vs. Case Temperature tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC) 10 1 D = 0.50 0.20 0.10 0.05 0.1 0.02 0.01 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 0.01 0.00001 Notes: 1. Duty factor D = t1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 0.1 IRL3303S/L VDS D.U.T. RG + V - DD IAS 10 V tp 0.01Ω Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp VDD E A S , S in g le P u ls e A va la n c h e E n e rg y (m J) 300 L ID 8.3A 14A 20 A TO P 250 B OT TO M 200 150 100 50 0 VD D = 1 5V 25 50 A 75 100 125 150 175 Starting T J , Junction Temperature (°C) VDS Fig 12c. Maximum Avalanche Energy Vs. Drain Current IAS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V .2µF .3µF 10 V QGS QGD D.U.T. + V - DS VGS VG 3mA Charge Fig 13a. Basic Gate Charge Waveform IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit IRL3303S/L Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer ƒ + ‚ - - „ +  • • • • RG Driver Gate Drive P.W. + dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Period D= - V DD P.W. Period VGS=10V D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% * VGS = 5V for Logic Level Devices Fig 14.For N-Channel HEXFETS ISD * IRL3303S/L D2Pak Package Outline 10.54 ( .415) 10.29 ( .405) 1.40 (.055) MAX. -A- 1.32 (.052) 1.22 (.048) 2 1.78 (.070) 1.27 (.050) 1 10.16 (.400) RE F . -B - 4.69 (.185) 4.20 (.165) 6.47 (.255) 6.18 (.243) 3 15.49 (.610) 14.73 (.580) 2.79 (.110) 2.29 (.090) 2.61 (.103) 2.32 (.091) 5.28 (.208) 4.78 (.188) 3X 1.40 (.055) 1.14 (.045) 5.08 ( .200) 0.55 (.022) 0.46 (.018) 0.93 (.037) 3X 0.69 (.027) 0.25 (.010) M 8.89 (.350) RE F. 1.39 (.055) 1.14 (.045) B A M MINIMUM RECO MM ENDED F OO TP RINT 11.43 (.450) NO TE S: 1 DIM ENS IO NS AF T ER S OLDE R DIP . 2 DIM ENS IO NING & TO LERA NCING PE R ANS I Y 14.5M, 1982. 3 CO NT RO LLING DIME NSIO N : INCH. 4 HE AT SINK & LEAD DIMEN SION S DO NO T INCLUDE BURRS. LE AD ASS IG NM ENT S 1 - G AT E 2 - DRA IN 3 - S OU RC E 8.89 (.350) 17.78 (.700) 3.81 (.150) 2.08 (.082) 2X Part Marking Information D2Pak IN TER NATION AL REC TIFIER L OGO AS SEMBLY LOT CODE A PART NU MBER F53 0S 9246 9B 1M DATE CODE (YYW W ) YY = YEAR W W = W EE K 2.54 (.100) 2X IRL3303S/L Package Outline TO-262 Outline Part Marking Information TO-262 IRL3303S/L Tape & Reel Information D2Pak TR R 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 4 .1 0 (.1 6 1) 3 .9 0 (.1 5 3) F E E D D IR E C TIO N 1 .8 5 (.0 7 3 ) 1 .6 5 (.0 6 5 ) 1 .6 0 (.0 6 3) 1 .5 0 (.0 5 9) 11 .6 0 (. 45 7 ) 11 .4 0 (. 44 9 ) 0 .3 68 (.0 14 5 ) 0 .3 42 (.0 13 5 ) 15 .4 2 (.60 9 ) 15 .2 2 (.60 1 ) 2 4 .30 (.9 5 7) 2 3 .90 (.9 4 1) TR L 1 0. 90 (.4 29 ) 1 0. 70 (.4 21 ) 1. 75 (.0 69 ) 1. 25 (.0 49 ) 4 .7 2 (.1 3 6) 4 .5 2 (.1 7 8) 1 6. 10 (.6 34 ) 1 5. 90 (.6 26 ) FE E D D IR E C TIO N 1 3.5 0 (. 532 ) 1 2.8 0 (. 504 ) 2 7.4 0 (1 .079 ) 2 3.9 0 (.9 41) 4 33 0.0 0 (14. 17 3) M AX . N O T ES : 1. C O M F O R M S T O EIA -418 . 2. C O N T R O LLIN G D IM EN SIO N : M ILLIM E T ER . 3. D IM E N S IO N M EA S U R E D @ H U B . 4. IN C LU D E S F L AN G E D IS T O R T IO N @ O U T E R ED G E. 6 0.0 0 (2 .36 2) M IN . 26 .40 (1. 03 9) 24 .40 (.9 61 ) 3 3 0.4 0 (1 .19 7) MA X . 4 WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371 http://www.irf.com/ Data and specifications subject to change without notice. 8/97 Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/