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IRL5602STRLPBF

IRL5602STRLPBF

  • 厂商:

    EUPEC(英飞凌)

  • 封装:

    SOT404

  • 描述:

    MOSFET P-CH 20V 24A D2PAK

  • 数据手册
  • 价格&库存
IRL5602STRLPBF 数据手册
PD- 95099 IRL5602SPbF HEXFET® Power MOSFET l l l l l l l Advanced Process Technology Dynamic dv/dt Rating 175°C Operating Temperature P-Channel Fast Switching Fully Avalanche Rated Lead-Free D VDSS = -20V RDS(on) = 0.042Ω G ID = -24A S Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. D 2 Pak Absolute Maximum Ratings ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG Parameter Max. Continuous Drain Current, VGS @ -4.5V Continuous Drain Current, VGS @ -4.5V Pulsed Drain Current  Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy‚ Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt ƒ Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds -24 -17 -96 75 0.5 ± 8.0 290 -12 7.5 -0.81 -55 to + 175 Units A W W/°C V mJ A mJ V/ns °C 300 (1.6mm from case ) Thermal Resistance Parameter RθJC RθJA www.irf.com Junction-to-Case Junction-to-Ambient ( PCB Mounted,steady-state)** Typ. Max. Units ––– ––– 2.0 40 °C/W 1 03/10/04 IRL5602SPbF Electrical Characteristics @ TJ = 25°C (unless otherwise specified) ∆V(BR)DSS/∆TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) gfs Gate Threshold Voltage Forward Transconductance IDSS Drain-to-Source Leakage Current V(BR)DSS Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time LS Internal Source Inductance Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance IGSS Min. Typ. Max. Units Conditions -20 ––– ––– V VGS = 0V, ID = -250µA ––– -0.013 ––– V/°C Reference to 25°C, ID = -1mA… ––– ––– 0.042 VGS = -4.5V, ID = -12A „ ––– ––– 0.062 Ω VGS = -2.7V, ID = -10A „ ––– ––– 0.075 VGS = -2.5V, ID = -10A „ -0.7 ––– -1.0 V VDS = VGS, ID = -250µA 12 ––– ––– S VDS = -15V, ID = -12A… ––– ––– -25 VDS = -20V, VGS = 0V µA ––– ––– -250 VDS = -16V, VGS = 0V, TJ = 150°C ––– ––– 500 VGS = -8.0V nA ––– ––– -500 VGS = 8.0V ––– ––– 44 ID = -12A ––– ––– 8.7 nC VDS = -16V ––– ––– 19 VGS = -4.5V, See Fig. 6 and 13 „… ––– 9.7 ––– VDD = -10 V ––– 73 ––– ID = -12A ns ––– 53 ––– RG = 6.0Ω, VGS = 4.5V ––– 84 ––– RD = 0.8Ω, See Fig. 10„… Between lead, ––– 7.5 ––– nH and center of die contact ––– 1460 ––– VGS = 0V ––– 790 ––– pF VDS = -15V ––– 370 ––– ƒ = 1.0MHz, See Fig. 5… Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)  Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol ––– ––– -24 showing the A G integral reverse -96 ––– ––– p-n junction diode. S ––– ––– -1.4 V TJ = 25°C, IS = -12A, VGS = 0V „ ––– 58 88 ns TJ = 25°C, IF = -12A ––– 54 81 nC di/dt = -100A/µs „ Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes:  Repetitive rating; pulse width limited by ƒ ISD ≤ -12A, di/dt ≤ 120A/µs, VDD ≤ V(BR)DSS, ‚ Starting TJ = 25°C, L = 3.0mH „ Pulse width ≤ 300µs; duty cycle ≤ 2%. max. junction temperature. ( See fig. 11 ) RG = 25Ω, IAS = -14A. (See Figure 12) TJ ≤ 175°C * When mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. 2 www.irf.com IRL5602SPbF 100 100 VGS -15V -12V -10V -7.0V -5.0V -4.5V -2.7V BOTTOM -2.0V 10 -2.0V 20µs PULSE WIDTH TJ = 25 °C 1 0.1 1 10 10 -2.0V RDS(on) , Drain-to-Source On Resistance (Normalized) -I D , Drain-to-Source Current (A) 3.5 TJ = 25 ° C TJ = 175 ° C 10 V DS = -15V 20µs PULSE WIDTH 4.0 5.0 Fig 3. Typical Transfer Characteristics www.irf.com 10 100 Fig 2. Typical Output Characteristics 100 3.0 1 -VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics -VGS , Gate-to-Source Voltage (V) 20µs PULSE WIDTH TJ = 175 °C 1 0.1 100 -VDS , Drain-to-Source Voltage (V) 1 2.0 VGS -15V -12V -10V -7.0V -5.0V -4.5V -2.7V BOTTOM -2.0V TOP -I D , Drain-to-Source Current (A) -I D , Drain-to-Source Current (A) TOP 6.0 ID = -24A 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 0 VGS = -4.5V 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature ( °C) Fig 4. Normalized On-Resistance Vs. Temperature 3 IRL5602SPbF VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd C, Capacitance (pF) 2400 2000 Ciss 1600 Coss 1200 800 Crss 400 0 1 10 15 -VGS , Gate-to-Source Voltage (V) 2800 9 6 3 0 100 FOR TEST CIRCUIT SEE FIGURE 13 0 10 20 30 40 50 60 70 QG , Total Gate Charge (nC) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 1000 100 OPERATION IN THIS AREA LIMITED BY RDS(on) -IID , Drain Current (A) -ISD , Reverse Drain Current (A) VDS =-16V VDS =-10V 12 -VDS , Drain-to-Source Voltage (V) 100 10 TJ = 175 ° C TJ = 25 ° C 1 0.1 0.0 V GS = 0 V 0.4 0.8 1.2 -VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 ID = -12A 1.6 100us 1ms 10 10ms 1 TC = 25 ° C TJ = 175 ° C Single Pulse 1 10 100 -VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRL5602SPbF 25 RD VDS VGS -ID , Drain Current (A) 20 D.U.T. RG - + VDD 15 -4.5V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 10 5 td(on) 0 tr t d(off) tf VGS 25 50 75 100 125 150 TC , Case Temperature ( ° C) 10% 175 90% Fig 9. Maximum Drain Current Vs. Case Temperature VDS Thermal Response (Z thJC ) 10 1 D = 0.50 0.20 0.10 0.05 0.1 0.02 0.01 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.01 0.00001 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRL5602SPbF D.U.T RG IAS -20V tp VDD A DRIVER 0.01Ω 15V Fig 12a. Unclamped Inductive Test Circuit I AS EAS , Single Pulse Avalanche Energy (mJ) 1000 L VDS ID -5.9A -10A BOTTOM -14A TOP 800 600 400 200 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature ( °C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current tp V(BR)DSS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V -4.5V QGS .3µF QGD D.U.T. +VDS VGS VG -3mA Charge Fig 13a. Basic Gate Charge Waveform 6 .2µF IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit www.irf.com IRL5602SPbF Peak Diode Recovery dv/dt Test Circuit + D.U.T* ƒ Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + ‚ - - „ +  RG • dv/dt controlled by RG • ISD controlled by Duty Factor "D" • D.U.T. - Device Under Test VGS * + - VDD Reverse Polarity of D.U.T for P-Channel Driver Gate Drive P.W. Period D= P.W. Period [VGS=10V ] *** D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode [VDD] Forward Drop Inductor Curent Ripple ≤ 5% [ISD ] *** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For P-Channel HEXFETS www.irf.com 7 IRL5602SPbF D2Pak Package Outline D2Pak Part Marking Information T HIS IS AN IRF530S WIT H LOT CODE 8024 ASS EMBLED ON WW 02, 2000 IN T HE AS SEMBLY LINE "L" INT ERNATIONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER F530S DATE CODE YEAR 0 = 2000 WEEK 02 LINE L OR INTERNAT IONAL RECT IFIER LOGO 8 ASS EMBLY LOT CODE PART NUMBER F530S DAT E CODE P = DES IGNAT ES LEAD - FREE PRODUCT (OPT IONAL) YEAR 0 = 2000 WEEK 02 A = ASS EMBLY SITE CODE www.irf.com IRL5602SPbF D2Pak Tape & Reel Information TRR 1.60 (.063) 1.50 (.059) 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) FEED DIRECTION 1.85 (.073) 11.60 (.457) 11.40 (.449) 1.65 (.065) 0.368 (.0145) 0.342 (.0135) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) TRL 1.75 (.069) 1.25 (.049) 10.90 (.429) 10.70 (.421) 4.72 (.136) 4.52 (.178) 16.10 (.634) 15.90 (.626) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) MIN. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.04/05 www.irf.com 9 Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/
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