PD -93910B
IRLBD59N04E
HEXFET® Power MOSFET
Integrated Temperature Sensing Diode
Ultra Low On-Resistance
Dynamic dv/dt Rating
175°C Operating Temperature
Fully Avalanche Rated
Zener Gate Protected
VDSS = 40V
RDS(on) = 0.018Ω
ID = 59A
Description
The IRLBD59N04E is a 40V, N-channel HEXFET®
power MOSFET with gate protection provided by
integrated back to back zener diodes. Temperature
sensing is given by the change in forward voltage drop
of two antiparallel electrically isolated poly-silicon diodes.
The IRLBD59N04E provides cost effective temperature
sensing for system protection along with the quality and
ruggedness you expect from a HEXFET power MOSFET.
Absolute Maximum Ratings
5 Lead-D2Pak
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
IG
VESD
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
VGS Clamp Current
Electrostatic Votage Rating
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
Max.
Units
59
41
230
130
0.89
± 10
340
35
13
3.6
± 50
± 2.0
-55 to + 175
A
W
W/°C
V
mJ
A
mJ
V/ns
mA
kV
°C
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθJA
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Junction-to-Case
Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
Max.
Units
–––
–––
1.12
40
°C/W
1
11/13/01
IRLBD59N04E
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
∆V(BR)DSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
40
–––
–––
–––
1.0
10
29
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
VGS
gfs
Gate Threshold Voltage
Clamp Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
LS
Internal Source Inductance
–––
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
V(BR)DSS
IGSS
Typ.
–––
0.044
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
7.8
84
33
67
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.018
VGS = 10V, ID = 35A
Ω
0.021
VGS = 5.0V, ID = 30A
2.0
V
VDS = V GS, ID = 250µA
20
V
IGSS = 20µA
–––
S
VDS = 25V, ID = 35A
25
VDS = 40V, VGS = 0V
µA
250
VDS = 32V, VGS = 0V, TJ = 150°C
1.0
VGS = 5.0V
µA
-1.0
VGS = -5.0V
50
ID = 35A
13
nC VDS = 32V
18
VGS = 5.0V, See Fig. 6 and 13
–––
VDD = 20V
–––
ID = 35A
ns
–––
RG = 5.1Ω,
–––
VGS = 5.0V, See Fig.10
Between lead,
2.0 –––
6mm (0.25in.)
nH
G
from package
5.0 –––
and center of die contact
2190 –––
VGS = 0V
670 –––
VDS = 25V
130 –––
pF
ƒ = 1.0MHz, See Fig. 5
D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Q rr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 59
showing the
A
G
integral reverse
––– ––– 230
S
p-n junction diode.
––– ––– 1.3
V
TJ = 25°C, IS = 35A, VGS = 0V
––– 57
86
ns
TJ = 25°C, IF = 35A
––– 84 130
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Sense Diode Rating
VFM
∆VF/∆TJ
2
Parameter
Sense Diode Maximum Voltage Drop
Sense Diode Temperature Coefficient
Min. Typ. Max. Units
Conditions
675 ––– 725
mV IF = 250µA, TJ = 25°C
-1.30 -1.40 -1.58 mV/°C IF = 250µA, (TJ = 25°C and 160°C)
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IRLBD59N04E
1000
1000
VGS
15V
10V
7.0V
5.5V
4.5V
4.0V
3.5V
BOTTOM 2.7V
100
2.7V
10
300µs PULSE WIDTH
T J = 25°C
1
0.1
1
10
100
2.7V
10
300µs PULSE WIDTH
T J = 175°C
1
100
0.1
VDS, Drain-to-Source Voltage (V)
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.5
100
T J = 175°C
VDS = 15V
300µs PULSE WIDTH
10
ID = 59A
VGS = 10V
2.0
(Normalized)
T J = 25°C
RDS(on) , Drain-to-Source On Resistance
ID, Drain-to-Source Current (Α)
VGS
15V
10V
7.0V
5.5V
4.5V
4.0V
3.5V
BOTTOM 2.7V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
1.5
1.0
0.5
2.0
4.0
6.0
8.0
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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10.0
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
T J , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRLBD59N04E
VGS = 0V,
f = 1 MHZ
C iss
= C gs + Cgd ,
SHORTED
6.0
ID= 35A
C ds
VGS, Gate-to-Source Voltage (V)
C, Capacitance (pF)
100000
Crss = C gd
Coss = Cds + Cgd
10000
Ciss
1000
Coss
VDS= 32V
VDS= 20V
VDS= 8.0V
5.0
4.0
3.0
2.0
1.0
FOR TEST CIRCUIT
SEE FIGURE 13
Crss
0.0
100
1
10
0
100
10
20
30
40
Q G Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000.0
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100.0
T J = 175°C
100
10.0
T J = 25°C
1.0
100µsec
1
0.0
0.5
1.0
1.5
2.0
2.5
VSD, Source-toDrain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
10msec
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
0.1
1msec
10
3.0
1
10
100
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRLBD59N04E
60
50
ID , Drain Current (A)
RD
VDS
LIMITED BY PACKAGE
VGS
D.U.T.
RG
40
+
-VDD
VGS
30
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
20
10
VDS
90%
0
25
50
75
100
125
150
175
T C , Case Temperature (°C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
(Z thJC)
10
1
Thermal Response
D = 0.50
0.20
P DM
0.10
0.1
0.05
0.02
0.01
t1
SINGLE PULSE
(THERMAL RESPONSE)
t2
Notes:
1. Duty factor D =
2. Peak T
0.01
0.00001
0.0001
0.001
t1/ t 2
J = P DM x Z thJC
+T C
0.01
0.1
t1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRLBD59N04E
800
15V
ID
TOP
+
V
- DD
IAS
20V
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
A
EAS , Single Pulse Avalanche Energy (mJ)
D.U.T
RG
BOTTOM
DRIVER
L
VDS
14A
25A
35A
600
400
200
0
25
50
75
100
125
150
175
Starting TJ, Junction Temperature (°C)
I AS
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
QGD
0.8
VG
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
Sense Diode Voltage Drop (V)
QGS
0.7
0.6
IF = 250µA
0.5
.3µF
D.U.T.
+
V
- DS
0
VGS
25
50
75
100
125
150
175
T J , Temperature ( °C )
3mA
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
6
0.4
Fig 14. Sense Diode Voltage Drop
Vs.Temperature
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IRLBD59N04E
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T*
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
RG
VGS
*
+
-
VDD
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
[VGS=10V ] ***
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
[VDD]
Forward Drop
Inductor Curent
Ripple ≤ 5%
[ ISD ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 15. For N-channel HEXFET® power MOSFETs
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7
IRLBD59N04E
Case Outline 5 Lead-D2Pak (SMD-220)
PIN ASSIGNMENTS
1
2
3
4
5
- G - GATE
- T1 - ANODE
- D - DRAIN
- T2 - CATHODE
- S - SOURCE
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting TJ = 25°C, L = 0.55mH
RG = 25Ω, I AS = 35A. (See Figure 12)
Pulse width ≤ 400µs; duty cycle ≤ 2%.
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 39A
C = 100pF, R = 1.5kΩ
ISD ≤ 35A, di/dt ≤ 150A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended soldering techniques refer to application note #AN-994.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.11/01
8
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/