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IRS2092SPBF

IRS2092SPBF

  • 厂商:

    EUPEC(英飞凌)

  • 封装:

    SOIC16

  • 描述:

    IC AMP AUDIO 500W MONO D 16SOIC

  • 数据手册
  • 价格&库存
IRS2092SPBF 数据手册
IRS2092 PROTECTED DIGITAL AUDIO AMPLIFIER Product Summary Features          Integrated analog input Class D audio amplifier driver in a small 16 pin package Floating inputs enable easy half bridge implementation Programmable bidirectional over-current protection with self-reset function Programmable preset deadtime for improved THD performances Start and stop click noise reduction High noise immunity 100 V ratings deliver up to 500 W in output power Operates up to 800 kHz RoHS compliant  100 V VOFFSET (max) Gate driver Io+ 1.0 A Io- 1.2 A Selectable Deadtime 25/40/65/105 ns OC protection delay (max) 500 ns DC offset 60 dB THD+N* (1kHz, 50W, 4Ω) 0.01 % Residual Noise* 200 µVrms (AES-17 Filter) * Measured with recommended circuit Typical Applications     Package Options Home theater systems Mini component stereo systems Powered speaker systems General purpose audio power amplifiers SOIC16N PDIP16 Typical Connection Diagram IRS2092 INPUT +B 1 VAA CSH 16 2 GND VB 15 3 IN- HO 14 4 COMP VS 13 5 CSD VCC 12 6 VSS LO 11 7 VREF COM 10 8 OCSET DT 9 Speaker Vcc 12V -B 1 www.irf.com © 2013 International Rectifier October 24, 2013 IRS2092 Table of Contents Page Description 3 Simplified Block Diagram 4 Typical Application Diagram 4 Qualification Information 5 Absolute Maximum Ratings 6 Recommended Operating Conditions 7 Electrical Characteristics 8 Waveform Definitions 11 Functional Block Diagram 12 Input/Output Pin Equivalent Circuit Diagram 13 Lead Definitions 14 Lead Assignments 14 Package Details 15 Tape and Reel Details 16 Part Marking Information 17 Ordering Information 17 2 www.irf.com © 2013 International Rectifier October 24, 2013 IRS2092 Description The IRS2092 is a high voltage, high performance Class D audio amplifier driver with PWM modulator and protection. In conjunction with two external MOSFET and a few external components, a complete Class D audio amplifier with protection can be realized. International Rectifier’s proprietary noise isolation technology allows high current gate drive stage and high speed low noise error amplifier reside on a single small silicon die. Open elements of PWM modulator section allow flexible PWM topology implementation 3 www.irf.com © 2013 International Rectifier October 24, 2013 IRS2092 Simplified Block Diagram FLOATING INPUT CSH VAA VB HIGH SIDE CS COMP IN- VAA+VSS 2 HO OTA GND HV LEVEL SHIFT COMP HV LEVEL SHIFT VS HV LEVEL SHIFT FLOATING HIGH SIDE VCC VSS DEAD TIME CSD HV LEVEL SHIFT PROTECTION CONTROL SD LO DT COM HV LEVEL SHIFT VREF LOW SIDE CS OCSET DT Typical Application Diagram 47 kΩ 2.7 kΩ +B BAV19WS 10 µF Vin 510 1 nF 1 nF 2 GND CSH VB 16 15 3 IN- HO 14 4 COMP VS 13 5 CSD VCC 12 10 µF 6 VSS 7 VREF LO 11 COM 10 DT 9 IRF6645 10 kΩ MURS120 10 Ω 22 µF IRF6645 10 µF 10 µF 10 Ω 3.3 kΩ 8 2.7 kΩ OCSET IRS2092 35 V 22 µH 0.1 µF 0.47 µF 4Ω Vout 1Ω 0.1 µF Vcc 8.2 kΩ 1.2 kΩ 150 pF 33 kΩ 10 kΩ 1 kΩ 3.3 kΩ 1 nF 10 µF VAA 4.7 Ω 1 12 V 35 V 8.2 kΩ -B 4 www.irf.com © 2013 International Rectifier October 24, 2013 IRS2092 Qualification Information Qualification Level Moisture Sensitivity Level Machine Model ESD Human Body Model Charged Device Model IC Latch-Up Test RoHS Compliant †† Industrial (per JEDEC JESD 47E) Comments: This IC has passed JEDEC’s Industrial qualification. IR’s Consumer qualification level is granted by extension of the higher Industrial level. ††† MSL2 SOIC16N (per IPC/JEDEC J-STD-020C) DIP16 Not applicable Class B (per JEDEC standard JESD22-A114D) Class 2 (per EIA/JEDEC standard EIA/JESD22-A115-A) Class IV (per JEDEC standard JESD22-C101C) Class I, Level A (per JESD78A) Yes † †† Qualification standards can be found at International Rectifier’s web site http://www.irf.com/ Higher qualification ratings may be available should the user have such requirements. Please contact your International Rectifier sales representative for further information. ††† Higher MSL ratings may be available for the specific package types listed here. Please contact your International Rectifier sales representative for further information. 5 www.irf.com © 2013 International Rectifier October 24, 2013 IRS2092 Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM; all currents are defined positive into any lead. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions Symbol VB VS VHO VCSH VCC VLO VAA Definition High side floating supply voltage VSS Floating input negative supply voltage VGND Floating input supply ground voltage IINVCSD VCOMP VDT VOCSET IAAZ ISSZ ICCZ IBSZ IOREF dVS/dt dVSS/dt Inverting input current SD pin input voltage COMP pin input voltage DT pin input voltage OCSET pin input voltage Pd Maximum power dissipation @ TA  +25C RthJA Thermal resistance, Junction to ambient TJ TS TL † †† High side floating supply voltage High side floating output voltage CSH pin input voltage Low side fixed supply voltage Low side output voltage †† †† Floating input positive supply voltage †† †† † †† Floating input positive supply zener clamp current †† Floating input negative supply zener clamp current ††† Low side supply zener clamp current ††† Floating supply zener clamp current Reference output current Allowable Vs voltage slew rate Allowable Vss voltage slew rate ††† SOIC16N DIP16 SOIC16N DIP16 Min -0.3 VB -20 VS -0.3 VS -0.3 -0.3 -0.3 (See IAAZ) Max 220 VB +0.3 VB +0.3 VB +0.3 20 Vcc+0.3 210 -1 (See ISSZ) GND +0.3 VSS -0.3 (See ISSZ) VAA +0.3 (See IAAZ) --VSS -0.3 VSS -0.3 -0.3 -0.3 -------------------------55 --- ±3 VAA +0.3 VAA +0.3 VCC +0.3 VCC+0.3 20 20 10 10 5 50 50 1.0 1.6 115 75 150 150 300 Units V mA V mA V/ns V/ms W C/W Junction Temperature Storage Temperature Lead temperature (soldering, 10 seconds) IN- contains clamping diode to GND. VDD – IN+, GND -VSS, VCC-COM and VB-VS contain internal shunt zener diodes. Please note that voltage ratings of these can be limited by the clamping current. For the rising and falling edges of step signal of 10 V. VSS=15 V to 200 V. ††† 6 www.irf.com © 2013 International Rectifier C C C the October 24, 2013 IRS2092 Recommended Operating Conditions For proper operation, the device should be used within the recommended conditions below. The Vs and COM offset ratings are tested with supplies biased at VAA-VSS=10 V, VCC=12 V and VB-VS=12 V. All voltage parameters are absolute voltages referenced to COM; all currents are defined positive into any lead. Symbol VB VS IAAZ ISSZ VSS VHO VCC VLO VGND VINVCSD VCOMP CCOMP VDT IOREF VOCSET VCSH dVss/dt IPW fSW TA † †† ††† †††† ††††† 7 Definition High side floating supply absolute voltage High side floating supply offset voltage Floating input positive supply zener clamp current Floating input negative supply zener clamp current Floating input supply absolute voltage High side floating output voltage Low side fixed supply voltage Low side output voltage GND pin input voltage Inverting input voltage CSD pin input voltage COMP pin input voltage COMP pin phase compensation capacitor to GND DT pin input voltage Reference output current to COM OCSET pin input voltage CSH pin input voltage †† Allowable Vss voltage slew rate upon power-up Input pulse width Switching Frequency Ambient Temperature †††† Min. VS +10 † 1 1 0 Vs 10 0 ††† VSS VGND -0.5 VSS VSS 1 0 0.3 0.5 Vs 10 ††††† -40 Max. VS +18 200 11 11 200 VB 18 VCC VAA ††† VGND +0.5 VAA VAA VCC 0.8 5 VB 50 800 125 Units V mA V nF V mA V V/ms ns kHz C Logic operational for Vs equal to –5 V to +200 V. Logic state held for Vs equal to –5 V to –VBS. Nominal voltage for VREF is 5.1 V. IOREF of 0.3 – 0.8 mA dictates total external resistor value on VREF to be 6.3 kΩ to 16.7 kΩ. GND input voltage is limited by IAAZ and ISSZ. VSS ramps up from 0 V to 200 V. Output logic status may not respond correctly if input pulse width is smaller than the minimum pulse width. www.irf.com © 2013 International Rectifier October 24, 2013 IRS2092 Electrical Characteristics VCC,VBS= 12 V, VSS=VS=COM=0 V, VAA=10 V, CL=1 nF and TA=25 C unless otherwise specified. Symbol Definition Low Side Supply Vcc supply UVLO positive UVCC+ threshold Vcc supply UVLO negative UVCCthreshold UVCCHYS UVCC hysteresis IQCC Low side quiescent current Low side zener diode clamp VCLAMPL voltage High Side Floating Supply High side well UVLO positive UVBS+ threshold High side well UVLO negative UVBSthreshold UVBSHYS UVBS hysteresis IQBS High side quiescent current ILKH High to Low side leakage current High side zener diode clamp VCLAMPH voltage Floating Input Supply VA+, VA- floating supply UVLO UVAA+ positive threshold from VSS VA+, VA- floating supply UVLO UVAAnegative threshold from VSS UVAAHYS IQAA0 IQAA1 IQAA2 ILKM VCLAMPM+ VCLAMPM- 8 Min Typ Max 8.4 8.9 9.4 8.2 8.7 9.2 - 0.2 - 3 mA 19.6 20.4 21.6 V 8.0 8.5 9.0 7.8 8.3 8.8 - 0.2 - 1 50 19.6 20.4 21.6 8.2 8.7 9.2 7.7 8.2 8.7 - 0.5 - - 0.5 2 - 8 11 - 8 11 - - 50 6.0 7.0 8.0 UVAA hysteresis Floating Input positive quiescent supply current Floating Input positive quiescent supply current Floating Input positive quiescent supply current Floating input side to Low side leakage current VAA floating supply zener diode clamp voltage, positive, with respect to GND VSS floating supply zener diode clamp voltage, negative, with respect to GND www.irf.com Units V © 2013 International Rectifier -7.0 -6.0 VDT=VCC ICC=5 mA V mA µA V V mA µA V -8.0 Test Conditions VB=VS =200 V IBS=5 mA VSS =0 V, GND pin floating VSS =0 V, GND pin floating VSS =0 V, GND pin floating VAA=10 V, VSS =0 V, VCSD =VSS VAA=10 V, VSS =0 V, VCSD =VAA VAA=10 V, VSS =0 V, VCSD =GND VAA=VSS=VGND= 100 V IAA=5 mA, ISS=5 mA, VGND=0 V, VCSD =VSS IAA=5 mA, ISS=5 mA, VGND=0 V, VCSD =VSS October 24, 2013 IRS2092 Electrical Characteristics (cont’d) VCC,VBS= 12 V, VSS=VS=COM=0 V, VAA=10 V, CL=1 nF and TA=25 C unless otherwise specified. Audio Input (VGND=0, VAA=5V, VSS=-5V) VOS Input offset voltage IBIN Input bias current -15 - 0 - 15 40 mV nA BW Small signal bandwidth - 9 - MHz CCOMP=2 nF, Rf=3.3 kΩ VCOMP gm GV OTA Output voltage OTA transconductance OTA gain VAA-1 60 100 - VSS+1 - V mS dB VIN-=10 mV VNrms BW=20 kHz, Resolution BW=22 Hz Fig.5 CCOMP=1 nF OTA input noise voltage - 250 - mVrms SR Slew rate CMRR Common-mode rejection ratio PSRR Supply voltage rejection ratio PWM comparator PWM comparator threshold in VthPWM COMP COMP pin star-up local oscillation fOTA frequency Protection VREF Reference output voltage - ±5 60 65 - V/us - (VAAVSS)/2 - V 0.7 1.0 1.5 MHz VCSD =GND 4.8 5.1 5.4 1.1 1.2 1.3 1.1+ Vs 1.2+ Vs 1.3+ Vs V IOREF =0.5 mA OCSET=1.2 V, Fig.6 Vs=200 V, 0.62xVAA 0.70xVAA 0.78xVAA 0.26xVAA 70 70 0.30xVAA 100 100 0.34xVAA 130 130 - - 250 - - 500 - - 500 VthOCL Low side OC threshold in Vs VthOCH High side OC threshold in VCSH CSD pin shutdown release threshold CSD pin self reset threshold CSD pin discharge current CSD pin charge current Shutdown propagation delay from VCSD > VSS + VthOCH to Shutdown Propagation delay time from VCSH > VthOCH to Shutdown Propagation delay time from Vs> VthOCL to Shutdown Vth1 Vth2 ICSD+ ICSDtSD tOCH tOCL 9 www.irf.com © 2013 International Rectifier dB µA VCSD = VSS +5 V VCSD = VSS +5 V ns Fig.3 Fig.4 October 24, 2013 IRS2092 Electrical Characteristics (cont’d) VCC,VBS= 12 V, VSS=VS=COM=0 V, VAA=10 V, CL=1 nF and TA=25 C unless otherwise specified. Gate Driver Output high short circuit current Io+ (Source) Output low short circuit current Io(Sink) Low level out put voltage VOL LO – COM, HO - VS High level out put voltage VOH VCC – LO, VB - HO High and low side turn-on ton propagation delay High and low side turn-off toff propagation delay tr Turn-on rise time tf Turn-off fall time Deadtime: LO turn-off to HO turnDT1 on (DTLO-HO) & HO turn-off to LO turn-on (DTHO-LO) Deadtime: LO turn-off to HO turnDT2 on (DTLO-HO) & HO turn-off to LO turn-on (DTHO-LO) Deadtime: LO turn-off to HO turnDT3 on (DTLO-HO) & HO turn-off to LO turn-on (DTHO-LO) Deadtime: LO turn-off to HO turnDT4 on (DTLO-HO) & HO turn-off to LO turn-on (DTHO-LO)VDT= VDT4 VDT1 DT mode select threshold 2 VDT2 DT mode select threshold 3 VDT3 DT mode select threshold 4 10 www.irf.com - 1.0 - A Vo=0 V, PWVDT> VDT2, 50 65 85 VDT2>VDT> VDT3, 85 105 135 VDT3>VDT> VDT4, 0.51xVcc 0.32xVcc 0.21xVcc 0.57xVcc 0.36xVcc 0.23xVcc 0.63xVcc 0.40xVcc 0.25xVcc © 2013 International Rectifier V October 24, 2013 IRS2092 Waveform Definitions 50% COMP 50% ton(L) Vth1 CSD toff(L) toff(H) ton(H) 90% LO 10% 90% DTLO-HO DTHO-LO HO HO/LO 90% tSD 10% Figure 1: Switching Time Waveform Definitions Figure 2: CSD to Shutdown Waveform Definitions VthOCH CSH VthOCL VS VS 90% 90% LO HO tOCL tOCH Figure 3: VS > VthOCL to Shutdown Waveform Figure 4: VCSH > VthOCH to Shutdown Waveform IRS2092 820 Ω 15 V 10 µF 1 VAA CSH 16 2 GND VB 15 3 IN- HO 14 4 COMP VS 13 5 CSD VCC 12 6 VSS LO 11 7 VREF COM 10 8 OCSET 3.3 µF 100 Ω 47 kΩ 15 V 2nF 10 µF 2 nF 820 Ω 100 Ω DT 9 10 Ω 10 µF 100 kΩ ` LT1028 100 Ω NOISE OUT 47 µF 10 µF GND 100 Ω 10 kΩ 10 Ω 10 nF Figure 5: OTA input noise voltage mesurent circuit 11 www.irf.com © 2013 International Rectifier October 24, 2013 IRS2092 Functional Block Diagram: IRS2092 FLOATING INPUT VB IN- VAA+VSS 2 ` Q COMP 20.4V ` UV HIGH SIDE CS 6V VAA CSH UV DETECT CLICK NOISE ELLIMINATION OTA ENABLE GND PWM MODULATOR HV LEVEL SHIFT COMP UV DETECT 6V HO HV LEVEL SHIFT FLOATING HIGH SIDE VS HV LEVEL SHIFT 5V REG VCC UV DETECT VSS DEAD TIME CSD LO HV LEVEL SHIFT PROTECTION CONTROL HV LEVEL SHIFT 20.4V SD DT CHARGE/ DISCHARGE COM VREF LOW SIDE CS OCSET DT 12 www.irf.com © 2013 International Rectifier October 24, 2013 IRS2092 Input/Output Pin Equivalent Circuit Diagrams: IRS2092 VB VAA ESD Diode ESD Diode 6V Zener Diode 20 V Clamp HO ESD Diode IN- VS GND 200 V ESD Diode V CC 6V Zener Diode VSS VCC ESD Diode 20 V Clamp LO ESD Diode COM VAA VCC ESD Diode ESD Diode COMP or CSD DT, VREF or OCSET ESD Diode VSS 13 www.irf.com ESD Diode COM © 2013 International Rectifier October 24, 2013 IRS2092 Lead Definitions: IRS2092 Pin # Symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 VAA GND INCOMP CSD VSS VREF OCSET DT COM LO VCC VS HO VB CSH Description Floating input positive supply Floating input supply return Analog inverting input Phase compensation input, comparator input Shutdown timing capacitor Floating input negative supply 5V reference voltage to program OCSET pin Low side over current threshold setting Deadtime program input Low side supply return Low side output Low side supply High side floating supply return High side output High side floating supply High side over current sensing input Lead Assignments 1 16 CSH GND 2 15 VB IN- 3 14 HO COMP 4 13 VS CSD 5 12 VCC VSS 6 11 LO VREF 7 10 COM OCSET 8 9 DT IRS2092 VAA PDIP16 and SOIC16N 14 www.irf.com © 2013 International Rectifier October 24, 2013 IRS2092 Package Details: PDIP16 Package Details: SOIC16N 15 www.irf.com © 2013 International Rectifier October 24, 2013 IRS2092 Tape and Reel Details: SOIC16N LOADED TAPE FEED DIRECTION A A B H D F C NOTE : CONTROLLING DIMENSION IN MM E G CARRIER TAPE DIMENSION FOR 16SOICN Metric Imperial Code Min Max Min Max A 7.90 8.10 0.311 0.318 B 3.90 4.10 0.153 0.161 C 15.70 16.30 0.618 0.641 D 7.40 7.60 0.291 0.299 E 6.40 6.60 0.252 0.260 F 10.20 10.40 0.402 0.409 G 1.50 n/a 0.059 n/a H 1.50 1.60 0.059 0.062 F D C B A E G H REEL DIMENSIONS FOR 16SOICN Metric Imperial Code Min Max Min Max A 329.60 330.25 12.976 13.001 B 20.95 21.45 0.824 0.844 C 12.80 13.20 0.503 0.519 D 1.95 2.45 0.767 0.096 E 98.00 102.00 3.858 4.015 F n/a 22.40 n/a 0.881 G 18.50 21.10 0.728 0.830 H 16.40 18.40 0.645 0.724 16 www.irf.com © 2013 International Rectifier October 24, 2013 IRS2092 Part Marking Information IRS2092(S) Part number YWW ? Date code Pin 1 Identifier IR logo ? XXXX ? MARKING CODE P Lead Free Released Lot Code (Prod mode – 4 digit SPN code) Assembly site code Per SCOP 200-002 Non-Lead Free Released Ordering Information Standard Pack Base Part Number Package Type PDIP16 IRS2092 Complete Part Number Form Quantity Tube/Bulk 25 IRS2092PBF Tube/Bulk 45 IRS2092SPBF Tape and Reel 2500 IRS2092STRPBF SOIC16N The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no responsibility for the consequences of the use of this information. International Rectifier assumes no responsibility for any infringement of patents or of other rights of third parties which may result from the use of this information. No license is granted by implication or otherwise under any patent or patent rights of International Rectifier. The specifications mentioned in this document are subject to change without notice. This document supersedes and replaces all information previously supplied. For technical support, please contact IR’s Technical Assistance Center http://www.irf.com/technical-info/ WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 17 www.irf.com © 2013 International Rectifier October 24, 2013
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