ISC0703NLSATMA1

ISC0703NLS MOSFET OptiMOSTM5Power-Transistor,60V PG-TDSON-8 8 Features 7 5 6 •Idealforhigh-frequencyswitching •Optimizedforchargers •100%avalanchetested •Superiorthermalresistance •N-channel,logiclevel •Pb-freeleadplating;RoHScompliant •Halogen-freeaccordingtoIEC61249-2-21 •Qualifiedforstandardgradeapplications Pin 1 7 8 4 2 3 3 2 4 1 Productvalidation Drain Pin 5-8 QualifiedaccordingtoJEDECStandard Gate Pin 4 Table1KeyPerformanceParameters Parameter Value Unit VDS 60 V RDS(on),max 6.9 mΩ ID 57 A Qoss 15 nC QG(0V..4.5V) 8.7 nC *1 *1: Internal body diode Type/OrderingCode Package Marking RelatedLinks ISC0703NLS PG-TDSON-8 0703NL - Final Data Sheet 6 5 1 Source Pin 1-3 Rev.2.0,2021-03-15 OptiMOSTM5Power-Transistor,60V ISC0703NLS TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Final Data Sheet 2 Rev.2.0,2021-03-15 OptiMOSTM5Power-Transistor,60V ISC0703NLS 1Maximumratings atTA=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Values Unit Note/TestCondition 57 40 13 A VGS=10V,TC=25°C VGS=10V,TC=100°C VGS=10V,TA=25°C, RthJA=50°C/W2) - 228 A TA=25°C - - 13 mJ ID=32A,RGS=25Ω VGS -20 - 20 V - Power dissipation Ptot - - 44 3.0 W TC=25°C TA=25°C,RthJA=50°C/W2) Operating and storage temperature Tj,Tstg -55 - 175 °C IEC climatic category; DIN IEC 68-1: 55/175/56 Unit Note/TestCondition Min. Typ. Max. ID - - ID,pulse - Avalanche energy, single pulse EAS Gate source voltage 1) Continuous drain current Pulsed drain current3) 4) 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case, bottom Values Min. Typ. Max. RthJC - 2.5 3.4 °C/W - Thermal resistance, junction - case, top RthJC - - 20 °C/W - Device on PCB, 6 cm² cooling area 2) RthJA - - 50 °C/W - 1) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature as specified. For other case temperatures please refer to Diagram 2. De-rating will be required based on the actual environmental conditions. 2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 3) See Diagram 3 for more detailed information 4) See Diagram 13 for more detailed information Final Data Sheet 3 Rev.2.0,2021-03-15 OptiMOSTM5Power-Transistor,60V ISC0703NLS 3Electricalcharacteristics atTj=25°C,unlessotherwisespecified Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=1mA 1.6 2.3 V VDS=VGS,ID=15µA - 0.1 10 1 100 µA VDS=60V,VGS=0V,Tj=25°C VDS=60V,VGS=0V,Tj=125°C IGSS - 10 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 5.8 7.6 6.9 8.9 mΩ VGS=10V,ID=32A VGS=4.5V,ID=16A Gate resistance1) RG - 1.2 - Ω - Transconductance gfs - 65 - S |VDS|≥2|ID|RDS(on)max,ID=32A Unit Note/TestCondition Min. Typ. Max. V(BR)DSS 60 - Gate threshold voltage VGS(th) 1.1 Zero gate voltage drain current IDSS Gate-source leakage current Table5Dynamiccharacteristics Parameter Symbol Input capacitance1) Values Min. Typ. Max. Ciss - 1100 1400 pF VGS=0V,VDS=30V,f=1MHz Coss - 250 320 pF VGS=0V,VDS=30V,f=1MHz Reverse transfer capacitance Crss - 14 24 pF VGS=0V,VDS=30V,f=1MHz Turn-on delay time td(on) - 3.0 - ns VDD=30V,VGS=4.5V,ID=32A, RG,ext=3Ω Rise time tr - 2.0 - ns VDD=30V,VGS=4.5V,ID=32A, RG,ext=3Ω Turn-off delay time td(off) - 9.4 - ns VDD=30V,VGS=4.5V,ID=32A, RG,ext=3Ω Fall time tf - 2.8 - ns VDD=30V,VGS=4.5V,ID=32A, RG,ext=3Ω Unit Note/TestCondition Output capacitance1) 1) Table6Gatechargecharacteristics2) Parameter Symbol Gate to source charge Values Min. Typ. Max. Qgs - 3.3 - nC VDD=30V,ID=32A,VGS=0to4.5V Gate charge at threshold Qg(th) - 1.7 - nC VDD=30V,ID=32A,VGS=0to4.5V Gate to drain charge Qgd - 3.1 - nC VDD=30V,ID=32A,VGS=0to4.5V Switching charge Qsw - 4.6 - nC VDD=30V,ID=32A,VGS=0to4.5V Gate charge total Qg - 8.7 11 nC VDD=30V,ID=32A,VGS=0to4.5V Gate plateau voltage Vplateau - 3.0 - V VDD=30V,ID=32A,VGS=0to4.5V Gate charge total1) Qg - 17 23 nC VDD=30V,ID=32A,VGS=0to10V Gate charge total, sync. FET Qg(sync) - 15 - nC VDS=0.1V,VGS=0to10V Output charge Qoss - 15 - nC VDS=30V,VGS=0V 1) 1) 2) Defined by design. Not subject to production test. See ″Gate charge waveforms″ for parameter definition Final Data Sheet 4 Rev.2.0,2021-03-15 OptiMOSTM5Power-Transistor,60V ISC0703NLS Table7Reversediode Parameter Symbol Diode continuous forward current Diode pulse current Diode forward voltage 1) Reverse recovery time 1) Reverse recovery charge 1) Values Unit Note/TestCondition 41 A TC=25°C - 228 A TC=25°C - 0.88 1.1 V VGS=0V,IF=32A,Tj=25°C trr - 28 - ns VR=30V,IF=32A,diF/dt=100A/µs Qrr - 21 - nC VR=30V,IF=32A,diF/dt=100A/µs Min. Typ. Max. IS - - IS,pulse - VSD Defined by design. Not subject to production test. Final Data Sheet 5 Rev.2.0,2021-03-15 OptiMOSTM5Power-Transistor,60V ISC0703NLS 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation Diagram2:Draincurrent 50 60 50 40 40 ID[A] Ptot[W] 30 30 20 20 10 0 10 0 25 50 75 100 125 150 0 175 0 25 50 75 TC[°C] 100 125 150 175 TC[°C] Ptot=f(TC) ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 3 101 10 single pulse 0.01 0.02 0.05 0.1 0.2 0.5 1 µs 102 10 µs 100 µs DC 100 ZthJC[K/W] ID[A] 101 1 ms 100 10 ms 10-1 10-2 10-1 100 101 102 10-1 10-5 10-4 VDS[V] 10-2 10-1 100 tp[s] ID=f(VDS);TC=25°C;D=0;parameter:tp Final Data Sheet 10-3 ZthJC=f(tp);parameter:D=tp/T 6 Rev.2.0,2021-03-15 OptiMOSTM5Power-Transistor,60V ISC0703NLS Diagram5:Typ.outputcharacteristics Diagram6:Typ.drain-sourceonresistance 240 20 10 V 5V 18 2.8 V 200 4.5 V 16 3.5 V 3V 160 120 RDS(on)[mΩ] ID[A] 14 4V 12 10 80 4V 3.5 V 8 4.5 V 5V 40 6 3V 2.8 V 0 0 1 2 3 4 4 5 10 V 0 10 20 30 VDS[V] 40 50 60 ID[A] ID=f(VDS),Tj=25°C;parameter:VGS RDS(on)=f(ID),Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.drain-sourceonresistance 240 28 24 200 20 25 °C 160 RDS(on)[mΩ] ID[A] 175 °C 120 16 12 175 °C 80 8 25 °C 40 0 4 0 1 2 3 4 5 VGS[V] 0 4 8 12 16 20 VGS[V] ID=f(VGS),|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 0 RDS(on)=f(VGS),ID=32A;parameter:Tj 7 Rev.2.0,2021-03-15 OptiMOSTM5Power-Transistor,60V ISC0703NLS Diagram10:Typ.gatethresholdvoltage 2.4 2.4 2.0 2.0 1.6 1.6 VGS(th)[V] RDS(on)(normalizedto25°C) Diagram9:Normalizeddrain-sourceonresistance 1.2 150 µA 1.2 15 µA 0.8 0.8 0.4 -75 -50 -25 0 25 50 75 100 125 150 0.4 -75 175 -50 -25 0 Tj[°C] 25 50 75 100 125 150 175 Tj[°C] RDS(on)=f(Tj),ID=32A,VGS=10V VGS(th=f(Tj),VGS=VDS;parameter:ID Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 4 103 10 25 °C 25 °C, max 175 °C 175 °C, max 103 Ciss Coss IF[A] C[pF] 102 2 10 101 101 100 Crss 0 10 20 30 40 50 60 100 0.4 0.6 VDS[V] 1.0 1.2 1.4 1.6 1.8 VSD[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 0.8 IF=f(VSD);parameter:Tj 8 Rev.2.0,2021-03-15 OptiMOSTM5Power-Transistor,60V ISC0703NLS Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 2 10 10 12 V 30 V 48 V 8 101 6 VGS[V] IAV[A] 25 °C 100 °C 150 °C 4 0 10 2 10-1 10-2 10-1 100 101 102 103 tAV[µs] 0 0 2 4 6 8 10 12 14 16 18 Qgate[nC] IAS=f(tAV);RGS=25Ω;parameter:Tj,start VGS=f(Qgate),ID=32Apulsed,Tj=25°C;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Diagram Gate charge waveforms 65 64 63 VBR(DSS)[V] 62 61 60 59 58 57 -75 -50 -25 0 25 50 75 100 125 150 175 Tj[°C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 9 Rev.2.0,2021-03-15 OptiMOSTM5Power-Transistor,60V ISC0703NLS 5PackageOutlines PACKAGE - GROUP NUMBER: REVISION: 01 DIMENSIONS A b c D D1 D2 E E1 e L L1 PG-TDSON-8-U08 DATE: 12.02.2021 MILLIMETERS MIN. MAX. 0.90 1.20 0.34 0.54 0.15 0.35 4.80 5.35 3.90 4.40 0.00 0.22 5.70 6.10 4.05 4.25 1.27 0.45 0.65 0.45 0.65 Figure1OutlinePG-TDSON-8,dimensionsinmm Final Data Sheet 10 Rev.2.0,2021-03-15 OptiMOSTM5Power-Transistor,60V ISC0703NLS RevisionHistory ISC0703NLS Revision:2021-03-15,Rev.2.0 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2021-03-15 Release of final version Trademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. WeListentoYourComments Anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?Yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.Pleasesendyourproposal(includingareferencetothisdocument)to: erratum@infineon.com Publishedby InfineonTechnologiesAG 81726München,Germany ©2020InfineonTechnologiesAG AllRightsReserved. LegalDisclaimer Theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics (“Beschaffenheitsgarantie”). Withrespecttoanyexamples,hintsoranytypicalvaluesstatedhereinand/oranyinformationregardingtheapplicationofthe product,InfineonTechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithoutlimitation warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty. Inaddition,anyinformationgiveninthisdocumentissubjecttocustomer’scompliancewithitsobligationsstatedinthis documentandanyapplicablelegalrequirements,normsandstandardsconcerningcustomer’sproductsandanyuseofthe productofInfineonTechnologiesincustomer’sapplications. Thedatacontainedinthisdocumentisexclusivelyintendedfortechnicallytrainedstaff.Itistheresponsibilityofcustomer’s technicaldepartmentstoevaluatethesuitabilityoftheproductfortheintendedapplicationandthecompletenessoftheproduct informationgiveninthisdocumentwithrespecttosuchapplication. Information Forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestInfineon TechnologiesOffice(www.infineon.com). Warnings Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion, pleasecontactthenearestInfineonTechnologiesOffice. TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 11 Rev.2.0,2021-03-15