ISC0806NLS
MOSFET
OptiMOSTM5Power-Transistor,100V
PG-TDSON-8
8
Features
7
5
6
6
7
5
•Idealforhigh-frequencyswitching
•Optimizedforcharger
•100%avalanchetested
•Superiorthermalresistance
•N-channel,logiclevel
•Pb-freeleadplating;RoHScompliant
•Halogen-freeaccordingtoIEC61249-2-21
Pin 1
8
4
2
3
3
2
4
1
Productvalidation
QualifiedaccordingtoJEDECStandard
Drain
Pin 5-8
Table1KeyPerformanceParameters
Parameter
Value
Unit
VDS
100
V
Gate
Pin 4
*1
Source
Pin 1-3
*1: Internal body diode
RDS(on),max
5.4
mΩ
ID
97
A
Qoss
50
nC
QG(0V..4.5V)
20
nC
Type/OrderingCode
Package
Marking
RelatedLinks
ISC0806NLS
PG-TDSON-8
0806NL
-
Final Data Sheet
1
Rev.2.2,2022-02-28
OptiMOSTM5Power-Transistor,100V
ISC0806NLS
TableofContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Final Data Sheet
2
Rev.2.2,2022-02-28
OptiMOSTM5Power-Transistor,100V
ISC0806NLS
1Maximumratings
atTA=25°C,unlessotherwisespecified
Table2Maximumratings
Parameter
Symbol
Continuous drain current1)
Values
Unit
Note/TestCondition
97
74
16
A
VGS=10V,TC=25°C
VGS=10V,TC=100°C
VGS=10V,TA=25°C,RthJA=50°C/W2)
-
388
A
TC=25°C
-
-
93
mJ
ID=43A,RGS=25Ω
VGS
-20
-
20
V
-
Power dissipation
Ptot
-
-
96
2.5
W
TC=25°C
TA=25°C,RthJA=50°C/W2)
Operating and storage temperature
Tj,Tstg
-55
-
150
°C
IEC climatic category; DIN IEC 68-1:
55/150/56
Unit
Note/TestCondition
Min.
Typ.
Max.
ID
-
-
Pulsed drain current3)
ID,pulse
-
Avalanche energy, single pulse4)
EAS
Gate source voltage
2Thermalcharacteristics
Table3Thermalcharacteristics
Parameter
Symbol
Thermal resistance, junction - case,
bottom
Values
Min.
Typ.
Max.
RthJC
-
0.7
1.3
°C/W -
Thermal resistance, junction - case,
top
RthJC
-
-
20
°C/W -
Device on PCB,
6 cm² cooling area2)
RthJA
-
-
50
°C/W -
1)
Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature
as specified. For other case temperatures please refer to Diagram 2. De-rating will be required based on the actual
environmental conditions.
2)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
3)
See Diagram 3 for more detailed information
4)
See Diagram 13 for more detailed information
Final Data Sheet
3
Rev.2.2,2022-02-28
OptiMOSTM5Power-Transistor,100V
ISC0806NLS
3Electricalcharacteristics
atTj=25°C,unlessotherwisespecified
Table4Staticcharacteristics
Parameter
Symbol
Drain-source breakdown voltage
Values
Unit
Note/TestCondition
-
V
VGS=0V,ID=1mA
1.6
2.3
V
VDS=VGS,ID=61µA
-
0.1
10
1.0
100
µA
VDS=100V,VGS=0V,Tj=25°C
VDS=100V,VGS=0V,Tj=125°C
IGSS
-
10
100
nA
VGS=20V,VDS=0V
Drain-source on-state resistance
RDS(on)
-
5.0
6.5
5.4
7.1
mΩ
VGS=10V,ID=50A
VGS=4.5V,ID=25A
Gate resistance
RG
-
1.2
-
Ω
-
Transconductance
gfs
-
89
-
S
|VDS|≥2|ID|RDS(on)max,ID=50A
Unit
Note/TestCondition
Min.
Typ.
Max.
V(BR)DSS
100
-
Gate threshold voltage
VGS(th)
1.1
Zero gate voltage drain current
IDSS
Gate-source leakage current
Table5Dynamiccharacteristics
Parameter
Symbol
Input capacitance1)
Values
Min.
Typ.
Max.
Ciss
-
2600
3400
pF
VGS=0V,VDS=50V,f=1MHz
Coss
-
420
560
pF
VGS=0V,VDS=50V,f=1MHz
Reverse transfer capacitance
Crss
-
19
25
pF
VGS=0V,VDS=50V,f=1MHz
Turn-on delay time
td(on)
-
3.7
-
ns
VDD=50V,VGS=4.5V,ID=50A,
RG,ext=1.6Ω
Rise time
tr
-
5.4
-
ns
VDD=50V,VGS=4.5V,ID=50A,
RG,ext=1.6Ω
Turn-off delay time
td(off)
-
14
-
ns
VDD=50V,VGS=4.5V,ID=50A,
RG,ext=1.6Ω
Fall time
tf
-
7.0
-
ns
VDD=50V,VGS=4.5V,ID=50A,
RG,ext=1.6Ω
Unit
Note/TestCondition
Output capacitance1)
1)
Table6Gatechargecharacteristics2)
Parameter
Symbol
Gate to source charge
Values
Min.
Typ.
Max.
Qgs
-
8.4
-
nC
VDD=50V,ID=50A,VGS=0to4.5V
Gate charge at threshold
Qg(th)
-
4.5
-
nC
VDD=50V,ID=50A,VGS=0to4.5V
Gate to drain charge
Qgd
-
6.9
-
nC
VDD=50V,ID=50A,VGS=0to4.5V
Switching charge
Qsw
-
11
-
nC
VDD=50V,ID=50A,VGS=0to4.5V
Gate charge total
Qg
-
20
26
nC
VDD=50V,ID=50A,VGS=0to4.5V
Gate plateau voltage
Vplateau
-
3.2
-
V
VDD=50V,ID=50A,VGS=0to4.5V
Gate charge total1)
Qg
-
37
49
nC
VDD=50V,ID=50A,VGS=0to10V
Output charge
Qoss
-
50
-
nC
VDS=50V,VGS=0V
1)
1)
2)
Defined by design. Not subject to production test.
See ″Gate charge waveforms″ for parameter definition
Final Data Sheet
4
Rev.2.2,2022-02-28
OptiMOSTM5Power-Transistor,100V
ISC0806NLS
Table7Reversediode
Parameter
Symbol
Diode continuous forward current
Values
Unit
Note/TestCondition
81
A
TC=25°C
-
388
A
TC=25°C
-
0.89
1.1
V
VGS=0V,IF=50A,Tj=25°C
trr
-
49
-
ns
VR=50V,IF=50A,diF/dt=100A/µs
Qrr
-
67
-
nC
VR=50V,IF=50A,diF/dt=100A/µs
Min.
Typ.
Max.
IS
-
-
Diode pulse current
IS,pulse
-
Diode forward voltage
VSD
Reverse recovery time
Reverse recovery charge
Final Data Sheet
5
Rev.2.2,2022-02-28
OptiMOSTM5Power-Transistor,100V
ISC0806NLS
4Electricalcharacteristicsdiagrams
Diagram1:Powerdissipation
Diagram2:Draincurrent
100
80
80
60
60
ID[A]
Ptot[W]
100
40
40
20
20
0
0
25
50
75
100
125
150
0
175
0
25
50
TC[°C]
75
100
125
150
175
TC[°C]
Ptot=f(TC)
ID=f(TC);VGS≥10V
Diagram3:Safeoperatingarea
Diagram4:Max.transientthermalimpedance
3
102
10
1 µs
10 µs
102
101
single pulse
0.01
0.02
0.05
0.1
0.2
0.5
100 µs
ZthJC[K/W]
ID[A]
101
1 ms
100
10 ms
100
10-1
DC
10-1
10-2
10-2
10-1
100
101
102
103
10-3
10-6
10-5
10-4
VDS[V]
10-2
10-1
100
tp[s]
ID=f(VDS);TC=25°C;D=0;parameter:tp
Final Data Sheet
10-3
ZthJC=f(tp);parameter:D=tp/T
6
Rev.2.2,2022-02-28
OptiMOSTM5Power-Transistor,100V
ISC0806NLS
Diagram5:Typ.outputcharacteristics
Diagram6:Typ.drain-sourceonresistance
400
16
10 V
2.8 V
350
14
3V
300
12
5V
3.5 V
4V
10
200
RDS(on)[mΩ]
ID[A]
250
4.5 V
150
4.5 V
8
6
5V
4V
100
50
0
2
3V
2.8 V
0
1
2
3
4
10 V
4
3.5 V
0
5
0
25
50
75
VDS[V]
100
125
150
175
200
ID[A]
ID=f(VDS),Tj=25°C;parameter:VGS
RDS(on)=f(ID),Tj=25°C;parameter:VGS
Diagram7:Typ.transfercharacteristics
Diagram8:Typ.drain-sourceonresistance
320
16
280
14
240
12
RDS(on)[mΩ]
ID[A]
200
160
25 °C
120
10
150 °C
8
150 °C
80
6
25 °C
40
0
0
1
2
3
4
5
VGS[V]
0
3
6
9
12
15
VGS[V]
ID=f(VGS),|VDS|>2|ID|RDS(on)max;parameter:Tj
Final Data Sheet
4
RDS(on)=f(VGS),ID=50A;parameter:Tj
7
Rev.2.2,2022-02-28
OptiMOSTM5Power-Transistor,100V
ISC0806NLS
Diagram10:Typ.gatethresholdvoltage
2.0
2.4
1.6
2.0
VGS(th)[V]
RDS(on)(normalizedto25°C)
Diagram9:Normalizeddrain-sourceonresistance
1.2
610 µA
1.6
61 µA
0.8
1.2
0.4
-75
-50
-25
0
25
50
75
100
125
150
0.8
-75
175
-50
-25
0
Tj[°C]
25
50
75
100
125
150
175
Tj[°C]
RDS(on)=f(Tj),ID=50A,VGS=10V
VGS(th)=f(Tj),VGS=VDS;parameter:ID
Diagram11:Typ.capacitances
Diagram12:Forwardcharacteristicsofreversediode
4
103
10
25 °C
25 °C, max
150 °C
150 °C, max
Ciss
102
IF[A]
C[pF]
103
Coss
102
101
Crss
101
0
20
40
60
80
100
100
0.4
0.6
VDS[V]
1.0
1.2
1.4
1.6
VSD[V]
C=f(VDS);VGS=0V;f=1MHz
Final Data Sheet
0.8
IF=f(VSD);parameter:Tj
8
Rev.2.2,2022-02-28
OptiMOSTM5Power-Transistor,100V
ISC0806NLS
Diagram13:Avalanchecharacteristics
Diagram14:Typ.gatecharge
2
10
10
20 V
50 V
80 V
8
101
IAV[A]
6
25 °C
VGS[V]
100 °C
125 °C
4
0
10
2
10-1
10-1
100
101
102
103
tAV[µs]
0
0
10
20
30
40
Qgate[nC]
IAS=f(tAV);RGS=25Ω;parameter:Tj,start
VGS=f(Qgate),ID=50Apulsed,Tj=25°C;parameter:VDD
Diagram15:Drain-sourcebreakdownvoltage
Diagram Gate charge waveforms
108
106
VBR(DSS)[V]
104
102
100
98
96
94
-75
-50
-25
0
25
50
75
100
125
150
175
Tj[°C]
VBR(DSS)=f(Tj);ID=1mA
Final Data Sheet
9
Rev.2.2,2022-02-28
OptiMOSTM5Power-Transistor,100V
ISC0806NLS
5PackageOutlines
PACKAGE - GROUP
NUMBER:
REVISION: 01
DIMENSIONS
A
b
c
D
D1
D2
E
E1
e
L
L1
PG-TDSON-8-U08
DATE: 12.02.2021
MILLIMETERS
MIN.
MAX.
0.90
1.20
0.34
0.54
0.15
0.35
4.80
5.35
3.90
4.40
0.00
0.22
5.70
6.10
4.05
4.25
1.27
0.45
0.65
0.45
0.65
Figure1OutlinePG-TDSON-8,dimensionsinmm
Final Data Sheet
10
Rev.2.2,2022-02-28
OptiMOSTM5Power-Transistor,100V
ISC0806NLS
RevisionHistory
ISC0806NLS
Revision:2022-02-28,Rev.2.2
Previous Revision
Revision
Date
Subjects (major changes since last revision)
2.0
2021-03-15
Release of final version
2.1
2021-04-01
Update of features list
2.2
2022-02-28
Update Id for EAS and footnotes
Trademarks
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Final Data Sheet
11
Rev.2.2,2022-02-28