ITS41K0SMENHUMA1

ITS41k0S-ME-N Smart High-Side NMOS-Power Switch Data Sheet Rev 1.0, 2012-09-01 Standard Power Smart High-Side NMOS-Power Switch 1 ITS41k0S-ME-N Overview Features • • • • • • • • • • • • • • Current controlled input Capable of driving all kind of loads (inductive, capacitive and resitive) Negative voltage clamped at output with inductive loads Current limitation Very low standby current Thermal shutdown with restart Overload protection Short circuit protection Overvoltage protection (including load dump) Reverse battery protection Loss of GND and loss of Vbb protection ESD-Protection Improved electromagnetic compatibility (EMC) Green Product (RoHS compliant) PG-SOT223-4 ITS41k0S-ME-N is not qualified and manufactured according to the requirements of Infineon Technologies with regards to automotive and/or transportation applications. Description The ITS41k0S-ME-N is a protected 1 Ω single channel Smart High-Side NMOS-Power Switch in a PG-SOT2234 package with charge pump and current controlled input, monolithically integrated in a smart power technology. Product Summary Overvoltage protection VSAZ min= 62V Operating voltage range 4,9V < VS < 60V On-state resistance RDSON typ 800 mΩ Operating Temperature range Tj = -40°C to 125°C Application • • • • All types of resistive, inductive and capacitive loads Current controlled power switch for 12V, 24V and 45V DC in industrial applications Driver for electromagnetic relays Signal amplifier Type Package Marking ITS41k0S-ME-N PG-SOT223-4 I1k0SN Data Sheet 2 Rev 1.0, 2012-09-01 ITS41k0S-ME-N Block Diagram and Terms 2 Block Diagram and Terms ITS41k0S-ME-N 2, 4 VS Control Circuit Temperature Sensor RIN 3 OUT 1 IN Figure 1 Block diagram Voltage- and Current-Definitions: Switching Times and Slew Rate Definitions: IIN ITS41k0S-ME-N 2, 4 IINON 0 VS VOUT IS IINOFF +VS VDS 90% VDS Control Circuit SROFF Temperature Sensor 3 1 40% 30% SR ON IL 10% 0 RL I IN OUT VOUT IN 70% VS RIN VIN Data Sheet t ON t tOFF IL 0 GND Figure 2 t OFF ON OFF t Terms - parameter definition 3 Rev 1.0, 2012-09-01 ITS41k0S-ME-N Pin Configuration 3 Pin Configuration 3.1 Pin Assignment 4 1 2 Figure 3 Pin configuration top view, PG-SOT223-4 3.2 Pin Definitions and Functions 3 Pin Symbol Function 1 IN Input, activates the power switch in case of connection to GND 2 VS Supply voltage 3 OUT Output to the load 4 VS Supply voltage Data Sheet 4 Rev 1.0, 2012-09-01 ITS41k0S-ME-N General Product Characteristics 4 General Product Characteristics 4.1 Absolute Maximum Ratings Table 1 Absolute maximum ratings 1)Tj = 25°C all voltages with respect to ground. Currents flowing into the device unless otherwise specified in chapter “Block Diagram and Terms” Parameter Symbol Values Min. Unit Typ. Max. Note / Test Co ndition 60 V 4.1.1 Supply voltage VS Voltage VS Output stage OUT Output Current; (Short circuit current see electrical characteristics) I OUT self limited I IN -15 15 mA 4.1.3 Tj Tstg -40 125 °C 4.1.4 -55 125 °C 4.1.5 1.7 W 4.1.6 1000 mJ 4.1.7 -1 1 kV HBM3) 4.1.8 -5 5 kV HBM3) 4.1.9 A 4.1.2 Input IN Input Current Temperatures Junction Temperature Storage Temperature Power dissipation Ta = 25 °C2) P tot Inductive load switch-off energy dissipation Tj = 150 °C; IL=0.15A; single pulse 1) EAS ESD Susceptibility ESD susceptibility (input pin) ESD susceptibility (all other pins) VESD VESD 1) Not subject to production test, specified by design 2) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6 cm2 (one layer, 70mm thick) copper area for Vbb connection. PCB is vertical without blown air 3) ESD susceptibility HBM according to EIA/JESD 22-A 114. Note: Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” the normal operating range. Protection functions are not designed for continuous or repetitive operation. Data Sheet 5 Rev 1.0, 2012-09-01 ITS41k0S-ME-N General Product Characteristics 4.2 Functional Range Table 2 Functional Range Parameter Symbol Nominal Operating Voltage VS Values Min. Typ. Max. 4.9 – 60 Unit Note / Test Condition Number V VS increasing 4.2.1 Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table. 4.3 Thermal Resistance This thermal data was generated in accordance with JEDEC JESD51 standards. More information on www.jedec.org. Table 3 Thermal Resistance1) Parameter Symbol Values Unit Min. Typ. Max. – 40.5 – Note / Number Test Condition PG-SOT223-4 Junction to Case, Exposed pad Junction to ambient Junction to ambient Junction to ambient Junction to ambient Junction to ambient Rthjc RthJA_1s0p RthJA_1s0p_300mm RthJA_1s0p_600mm RthJA_2s2p RthJA_2s2pvia – 145.4 – – 77.2 – K/W 4.3.1 K/W 2) 4.3.2 K/W 3) 4.3.3 4.3.4 – 66.2 – K/W 4) – 57.8 – K/W 5) 4.3.5 K/W 6) 4.3.6 – 52.9 – 1) Not subject to production test, specified by design 2) Specified RthJA value is according to Jedec JESD51-3 at natural convection on FR4 1s0p board, footprint; the Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 1x 70µm Cu. 3) Specified RthJA value is according to Jedec JESD51-3 at natural convection on FR4 1s0p board, Cu, 300mm2; the Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 1x 70µm Cu. 4) Specified RthJA value is according to Jedec JESD51-3 at natural convection on FR4 1s0p board, 600mm2; the Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 1x 70µm Cu. 5) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; the Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu). 6) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board with two thermal vias; the Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu. The diameter of the two vias are equal 0.3mm and have a plating of 25um with a copper heatsink area of 3mm x 2mm). JEDEC51-7: The two plated-through hole vias should have a solder land of no less than 1.25 mm diameter with a drill hole of no less than 0.85 mm diameter. Data Sheet 6 Rev 1.0, 2012-09-01 ITS41k0S-ME-N Electrical Characteristics 5 Electrical Characteristics Table 4 VS = 9V to 60V; Tj = -40°C to 125°C; all voltages with respect to ground. Currents flowing into the device unless otherwise specified in chapter “Block Diagram and Terms”. Typical values at Vs = 13.5V, Tj = 25°C Parameter Symbol Values Min. Typ. Max. – 0.8 1.5 Unit Note / Test Condition Number Ω IOUT= 150mA; Tj = 25°C; 5.0.1 Powerstage RDSON NMOS ON Resistance IN conected to GND RDSON NMOS ON Resistance – 1.5 3.0 Ω IOUT= 150mA; Tj = 125°C; 5.0.2 IN conected to GND RDSON NMOS ON Resistance – 2 5 Ω IOUT= 50mA; Tj = 25°C; VS = 6V; 5.0.3 IN conected to GND 1) ILNOM 0.2 – – A Ta = 85°C; Tj = 125°C; 5.0.4 Turn ON Time 3) (to 90% of Vout); VS to GND transition of VIN tON – – 125 4) µs VS=13.5V; RL = 270Ω 5.0.5 Turn ON Time 3) (to 90% of Vout); VS to GND transition of VIN tON – 45 100 µs 5.0.6 Turn OFF Time 3) (to 10% of Vout); GND to VS transition of VIN tOFF – – 175 4) µs VS=13.5V; RL = 270Ω; Tj = 25°C VS=13.5V; RL = 270Ω Turn OFF Time 3) (to 10% of Vout); GND to VS transition of VIN tOFF – 40 140 µs ON-Slew Rate 3) (10 to 30% of Vout); VS to GND transition of VIN SRON – – 6 4) ON-Slew Rate 3) (10 to 30% of Vout); VS to GND transition of VIN SRON – 1.3 4.0 V / µs VS=13.5V; RL = 270Ω; Tj = 25°C 5.0.10 OFF-Slew Rate 3) (70 to 40% of Vout); GND to VS transition of VIN SROFF – – 8 4) V / µs VS=13.5V; RL = 270Ω 5.0.11 OFF-Slew Rate 3) (70 to 40% of Vout); GND to VS transition of VIN SROFF – 1.7 4.0 V / µs VS=13.5V; RL = 270Ω; Tj = 25°C 5.0.12 Nominal Load Current ; device on PCB 2) Timings of Power Stages VS=13.5V; RL = 270Ω; Tj = 25°C V / µs VS=13.5V; RL = 270Ω 5.0.7 5.0.8 5.0.9 Standby current consumption Data Sheet 7 Rev 1.0, 2012-09-01 ITS41k0S-ME-N Electrical Characteristics Table 4 VS = 9V to 60V; Tj = -40°C to 125°C; all voltages with respect to ground. Currents flowing into the device unless otherwise specified in chapter “Block Diagram and Terms”. Typical values at Vs = 13.5V, Tj = 25°C Parameter Symbol Min. Typ. Max. Standby current ISOFF – 2 Initial peak short circuit current limit ILSCP IN conected to GND – Initial peak short circuit current limit ILSCP IN conected to GND Initial peak short circuit current limit ILSCP IN conected to GND Protection functions Values Unit Note / Test Condition Number 10 µA IN open 5.0.13 – 1.2 A 5.0.14 – 0.9 – A 0.2 – – A Tj = -40°C; VS = 13.5V tm = 100µs Tj = 25°C; VS = 13.5V tm = 100µs Tj =125°C; VS = 13.5V tm = 100µs 5) 5.0.15 5.0.16 Repetitive short circuit current limit IN conected to GND ILSCR – 0.7 – A – 5.0.17 Output clamp at VOUT = VS - VDSCL (inductive load switch off) VDSCL 60 – – V IS = 4mA 5.0.18 Overvoltage protection VSAZ TjTrip 62 68 – V IS = 1mA 5.0.19 150 – – °C – 5.0.20 10 – °C – 5.0.21 Tj = -25°C; RL = 270Ω; VOUT =< 0.1V Tj = 125°C; RL = 270Ω; VOUT =< 0.1V 5.0.22 Thermal overload trip temperature 4) Thermal hysteresis 4) THYS Input interface Off state input current IINOFF – – 0.05 mA Off state input current IINOFF – – 0.04 mA On state input current; IN connected to GND 6) IINON – 0.3 1.0 mA – 5.0.24 Input resistance RIN 0.5 1.0 2.5 kΩ – 5.0.25 – – 0.2 A – 5.0.26 – 600 – mV IFDS = 200mA IIN =< 0.05mA 5.0.27 5.0.23 Reverse Battery IDREV Forward voltage of the drain-source VFDS Continuous reverse drain current reverse diode 1) Nominal Load Current is limited by the current limitation; see protection function data 2) Device on 50mm x 50mm x 1,5mm epoxy FR4 PCB with 6cm² (one layer copper 70um thick) copper area for supply voltage connection. PCB in vertical position without blown air 3) Timing values only with high input slewrates (trIN = tfIN 1mA Data Sheet 8 Rev 1.0, 2012-09-01 ITS41k0S-ME-N Application Information 6 Application Information 6.1 Application Diagram The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty for a certain functionality, condition or quality of the device. Electronic Control Unit ITS41k0S-ME-N Wire Harness VS complexLOAD 2, 4 CS 220nF Control Circuit RIN GND 3 Temperature Sensor Vctrl 3 ON 1 OFF t Vctrl Figure 4 Wire Harness OUT COUT complex LOAD IN 1nF Infineon BCR 1xx GND 2 GND 1 Application Diagram The ITS41k0S-ME-N can be connected directly to a supply network. It is recommended to place a ceramic capacitor (e.g. CS = 220nF) between supply and GND to avoid line disturbances. Wire harness inductors/resistors are sketched in the application circuit above. The complex load (resistive, capacitive or inductive) must be connected to the output pin OUT. A built-in current limit protects the device against destruction. The ITS41k0S-ME-N can be switched on and off with a low power levelshifter switch e.g. Infineon BCR1xx. The IN pin must be pulled down to GND potential to switch the ITS41k0S-ME-N on. If no current is pulled down, the IN-node will float up to VS potential by an internal pull up. In this mode the ITS41k0S-ME-N is deactivated with very low current consumption. The output voltage slope is controlled during on and off transistion to minimize emissions. Only a small Cercap COUT =1nF is recommended to attenuate RF noise. In the following chapters the main features, some typical waverforms and the protection behaviour of the ITS41k0S-ME-N is shown. For further details please refer to application notes on the Infineon homepage. Data Sheet 9 Rev 1.0, 2012-09-01 ITS41k0S-ME-N Application Information Special features ITS41k0S-ME-N 2, 4 ZD 1 ITS41k0S-ME-N VS 2, 4 ZD2 ZD1 D1 VDS D1 Control circuit V B att Temperature Sensor RIN M1 3 Temperature Sensor R IN OUT VF M1 Control circuit IREV ZD2 V FZD1 M1 3 1 OUT I REV1 1 IN ZL ZL V ESD V OU T IN VS VREV 6.2 I REV2 If Over-Voltage is applied to the V S-Pin: Voltage is limited to VZD1; Current can be calculated : IZD1 = (VS – VZD1) / RIN In case of ESD Pulse on the input pin there is in both polarities a peak current IINpeak ~ VESD / RIN The control unit is protected in both cases by the Zenerdiode ZD1 ITS41k0S-ME-N 2, 4 ZD 1 If reverse Voltage is applied to the device : 1.) Current via Load Resistance RL : IRev1 = (VREV – VFM1) / RL 2.) Current via Input Resistance RIN : IREV2 = (V REV – VFZD1) / RIN Both currents will sum up to: IREV = IREV1+ IREV2 ITS41k0S-ME-N VS 2, 4 ZD2 ZD1 M1 3 3 V OUT OFF Data Sheet EL LL ER RL ON t OFF t When an inductive load is switched off a current path must be established until the current is sloped down to zero (all energy removed from the inductive load ). For that purpose the series combination ZD 2 and D1 is connceted between Gate and Drain of the power DMOS. When the device is switched off, the voltage at OUT turns negative until V DSCL is reached. The Voltage on the incutive load is the difference between V DSCL and VS. Figure 5 OUT 1 IN LL ON ELoad Temperature Sensor R IN OUT IL V DSCL Control circuit V Batt Temperature Sensor 1 D1 V DSCL D1 Control circuit IN EBatt ZD2 M1 RIN VS Energy stored in the load inductance is given by : EL= IL²*L/2 While demagnetizing the load inductance the energy dissipated by the Power -DMOS is: EAS = ES + EL – ER With an approximate solution for R L > 0Ω: EAS = (IL*L) / (2*RL)*(VS+VDSCL)*ln((1+(IL*RL) / VDSCL ) Special Feature descriptions 10 Rev 1.0, 2012-09-01 ITS41k0S-ME-N Application Information 6.3 Typical Application Waveforms General Input Output waveforms: IIN Waveforms switching a resistive load: IIN IINON 0 IINOFF IINON 0 t VS I INOFF VOUT +VS VDS 90% 70% t VOUT t SROFF 40% 30% SRON 10% 0 0 t IL tON t t OFF IL 0 0 t ON OFF ON OFF Waveforms switching a capacitive load: IIN IIN IINOFF V OUT ILSC 0 t Figure 6 Data Sheet OFF t IL 0 ON t ~ VS 0 t OFF IINOFF VOUT ~ VS IL IINON 0 t 0 OFF Waveforms switching an inducitive load : IINON 0 ON VDSCL OFF t ON t OFF ON OFF ON Typical application waveforms 11 Rev 1.0, 2012-09-01 ITS41k0S-ME-N Application Information 6.4 Protection behavior Overtemperature concept: Overtemperature behavior IIN TjRestart 0 TjTrip ON Toggling t Tj THYS Normal t 0 TJ cooling down Device Status IINOFF VOUT heating up OFF IINON TjTrip THYS Overtemperature t OFF Waveforms turn on into a short circuit : IIN IIN IINOFF OFF ON OFF Waveforms short circuit during on state : I INON 0 ON IINON 0 t VOUT IINOFF t VOUT 0 0 t t IL ILSCP ILSCR tM Controlled by the current limit circuit 0 Overloaded Data Sheet Controlled by the current limit circuit 0 OFF t OFF Shut down by overtemperature and restart by cooling (toggling ) Figure 7 Ipeak ILSCR t t SCOFF OFF IL Ipeak Normal operation OUT shorted to GND Shut down by overtemperature and restart by cooling (toggling ) Protective behaviour waveforms of the ITS41k0S-ME-N 12 Rev 1.0, 2012-09-01 ITS41k0S-ME-N Typical Performance Graphs 7 Typical Performance Graphs Typical Performance Characteristics Transient Thermal Impedance ZthJA versus Pulse Time tp @ 6cm² heatsink area (D= tp/T) Transient Thermal Impedance ZthJA versus Pulse Time tp @ min. footprint (D= tp/T) On-Resistance RDSON versus Junction Temperature TJ @ = VS = 9V; IL =150mA On-Resistance RDSON versus Supply Voltage VS = Vbb @ = IL =150mA Tj =par. 2 3 Vs=9V;IL=150mA Tj [°C]=−40°C;IL=150mA 1.8 Tj [°C]=−25°C;IL=150mA 2.5 Tj [°C]=−125°C;IL=150mA 1.6 1.4 2 RDSON [Ω] RDSON [Ω] 1.2 1 1.5 0.8 1 0.6 0.4 0.5 0.2 0 −40 25 0 125 Tj [°C] Data Sheet 13 10 20 30 Vs[V] 40 50 Rev 1.0, 2012-09-01 ITS41k0S-ME-N Typical Performance Graphs Typical Performance Characteristics Switch ON Time tON versus Junction Temperature TJ @ = RL = 270 Ω; VS =par. Switch OFF Time tOFF versus Junction Temperature TJ @ = RL = 270 Ω; VS =par. 60 70 50 60 50 40 tON [μs] tOFF [μs] 40 30 30 20 20 Vs=9V;RL=270Ω 10 10 Vs=13.5V;RL=270Ω Vs=42V;RL=270Ω 0 −40 25 Vs=9..42V;RL=270Ω 0 −40 125 Tj[°C] 25 125 Tj[°C] ON Slewrate SRON versus Junction Temperature TJ @ = RL = 270 Ω; VS =par. OFF Slewrate SROFF versus Junction Temperature TJ @ = RL = 270 Ω; VS =par. 4 7 Vs=9V;RL=270Ω Vs=9V;RL=270Ω Vs=13.5V;RL=270Ω 3.5 Vs=13.5V;RL=270Ω 6 Vs=42V;RL=270Ω Vs=42V;RL=270Ω 3 5 2.5 −dV V [ ] dtoff μs dV V [ ] dton μs 4 2 3 1.5 2 1 1 0.5 0 −40 25 0 −40 125 Tj[°C] Data Sheet 25 125 Tj[°C] 14 Rev 1.0, 2012-09-01 ITS41k0S-ME-N Typical Performance Graphs Typical Performance Characteristics Initial Peak Short Circuit Current Limit ILSCP versus Junction Temperature TJ @ VS=13.5V; tm =100µs Initial Short Circuit Shutdown Time tOFF SC versus Junction Start-Temperature TJSTART ; VS=parameter 3 1.2 10 1 2 10 tOFFSC [ms] ILSCp [A] 0.8 0.6 1 10 0.4 0 10 Vs=13.5V;RL=270Ω 0.2 Vs=24V;RL=270Ω Vs=13.5V;IL=150mA 0 −40 25 Vs=42V;RL=270Ω −1 10 −40 −25 125 0 Tj [°C] Initial Peak Short Circuit Current Limit ILSCP versus Supply Voltage VS = Vbb @ Tj =par.= 100µs. 25 50 Tj[°C] 75 100 125 Current Limitation Characteristic ILSC versus Drain Source Voltage Drop VDS @ VS =13.5 V 1.2 1 0.9 1 0.8 0.7 0.8 ILSC [A] ILSCp [A] 0.6 0.6 0.5 0.4 0.4 0.3 0.2 Tj=−40°C 0.2 Tj=25°C 0.1 Tj=125°C 0 0 Data Sheet 10 20 Vs [V] 30 Vs=13.5V 0 40 15 0 5 10 15 VON [V] 20 Rev 1.0, 2012-09-01 ITS41k0S-ME-N Typical Performance Graphs Typical Performance Characteristics Stand By Current Consumption ISOFF versus Junction Temperature TJ @ pin IN open 8 Vs=13.5V 7 Vs=42V Vs=60V 6 Isoff [μ] 5 4 3 2 1 0 −40 25 125 Tj [°C] Data Sheet 16 Rev 1.0, 2012-09-01 ITS41k0S-ME-N Package Outlines and Footprint 8 Package Outlines and Footprint 1.6±0.1 6.5 ±0.2 3 ±0.1 A 0.1 MAX. B 1 0.25 M A 2 3 2.3 0.7 ±0.1 4.6 3.5 ±0.2 0.5 MIN. 7 ±0.3 4 0.28 ±0.04 0.25 M B 0...10˚ SOT223-PO V04 Figure 8 PG-SOT223-4 (Plastic Dual Small Outline Package, RoHS-Compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pbfree finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020 Data Sheet 17 Rev 1.0, 2012-09-01 ITS41k0S-ME-N Revision History 9 Revision History Revision Date Changes 1.0 2012-09-01 Datasheet release Trademarks of Infineon Technologies AG AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, EconoPACK™, CoolMOS™, CoolSET™, CORECONTROL™, CROSSAVE™, DAVE™, DI-POL™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPIM™, EconoPACK™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OptiMOS™, ORIGA™, POWERCODE™; PRIMARION™, PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™, SINDRION™, SIPMOS™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™, TRENCHSTOP™, TriCore™. Other Trademarks Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™, PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™, FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG. FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics Corporation. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™ of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc., OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc. RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc. SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex Limited. Last Trademarks Update 2011-11-11 Data Sheet 18 Rev 1.0, 2012-09-01 Edition 2012-09-01 Published by Infineon Technologies AG 81726 Munich, Germany © 2012 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. The Infineon Technologies component described in this Data Sheet may be used in life-support devices or systems and/or automotive, aviation and aerospace applications or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that lifesupport automotive, aviation and aerospace device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.