PTFA192001EV4XWSA1

PTFA192001E PTFA192001F Confidential, Limited Internal Distribution Thermally-Enhanced High Power RF LDMOS FETs 200 W, 1930 – 1990 MHz Description tin 20 -40 15 10 on -45 ACPR -50 -55 34 36 38 40 42 44 46 t uc pr • Broadband internal matching • Typical two-carrier WCDMA performance at 1990 MHz, 30 V - Average output power = 47.0 dBm - Linear Gain = 15.9 dB - Efficiency = 27% - Intermodulation distortion = –36 dBc - Adjacent channel power = –41 dBc • Typical single-carrier WCDMA performance at 1960 MHz, 30 V, 3GPP signal, P/AR = 7.5 dB - Average output power = 48.5 dBm - Linear Gain = 15.9 dB - Efficiency = 34% - Intermodulation distortion = –37 dBc - Adjacent channel power = –40 dBc • Typical CW performance, 1960 MHz, 30 V - Output power at P–1dB = 240 W - Efficiency = 57% • Integrated ESD protection: Human Body Model, Class 2 (minimum) • Excellent thermal stability, low HCI drift • Capable of handling 5:1 VSWR @ 30 V, 200 W (CW) output power 25 Drain Efficiency (%) IM3 -35 Pb-free, RoHS-compliant and thermally-enhanced packages ue 30 sc IM3 (dBc), ACPR (dBc) -25 • d VDD = 30 V, IDQ = 1600 mA, ƒ = 1960 MHz, 3GPP WCDMA signal, P/A R = 8 dB, 10 MHz carrier spacing Efficiency PTFA192001F Package H-37260-2 Features 2-Carrier WCDMA Drive-up -30 PTFA192001E Package H-36260-2 od The PTFA192001E and PTFA192001F are 200-watt LDMOS FETs intended for single- and two-carrier WCDMA and CDMA applications from 1930 to 1990 MHz. Features include input and output matching, and thermally-enhanced packages with slotted or earless flanges. Manufactured with Infineon's advanced LDMOS process, these devices provide excellent thermal performance and superior reliability. 5 0 48 di Output Power, avg. (dBm) All published data at TCASE = 25°C unless otherwise indicated *See Infineon distributor for future availability. ESD: Electrostatic discharge sensitive device—observe handling precautions! Data Sheet 1 of 11 Rev. 08, 2017-07-19 PTFA192001E PTFA192001F Confidential, Limited Internal Distribution RF Characteristics WCDMA Measurements (tested in Infineon test fixture) VDD = 30 V, IDQ = 1.8 A, POUT = 50 W average ƒ1 = 1985 MHz, ƒ2 = 1995 MHz, 3GPP signal, channel bandwidth = 3.84 MHz , peak/average = 8 dB @ 0.01% CCDF Min Typ Max Unit Gain Gps 15.3 15.9 — dB Drain Efficiency ηD 26.5 27 — % Intermodulation Distortion IMD — –36 –34 dBc t Symbol uc Characteristic Two-tone Measurements (not subject to production test—verified by design/characterization in Infineon test fixture) Characteristic Symbol Gain Drain Efficiency Typ Max Unit Gps — 15.9 — dB ηD — 41 — % IMD — –30 — dBc Symbol Min Typ Max Unit DC Characteristics ue d Intermodulation Distortion Min pr od VDD = 30 V, IDQ = 1.6 A, POUT = 200 W PEP, ƒ = 1960 MHz, tone spacing = 1 MHz Conditions Drain-Source Breakdown Voltage VGS = 0 V, IDS = 10 mA V(BR)DSS 65 — — V Drain Leakage Current VDS = 28 V, VGS = 0 V IDSS — — 1.0 µA VDS = 63 V, VGS = 0 V IDSS — — 10.0 µA VGS = 10 V, VDS = 0.1 V RDS(on) — 0.05 — Ω Operating Gate Voltage VDS = 30 V, IDQ = 1.8 A VGS 2.0 2.5 3.0 V Gate Leakage Current VGS = 10 V, VDS = 0 V IGSS — — 1.0 µA on di sc Drain Leakage Current On-State Resistance tin Characteristic Maximum Ratings Parameter Symbol Value Unit Drain-Source Voltage VDSS 65 V Gate-Source Voltage VGS –0.5 to +12 V Junction Temperature TJ 200 °C Total Device Dissipation PD 625 W 3.57 W/°C Above 25°C derate by Storage Temperature Range TSTG –40 to +150 °C Thermal Resistance (TCASE = 70°C, 200 W CW) RθJC 0.28 °C/W Data Sheet 2 of 11 Rev. 08, 2017-07-19 PTFA192001E PTFA192001F Confidential, Limited Internal Distribution Ordering Information Type and Version Package Type Package Description Marking PTFA192001E V4 H-36260-2 Thermally-enhanced slotted flange, single-ended PTFA192001E PTFA192001F V4 H-37260-2 Thermally-enhanced earless flange, single-ended PTFA192001F uc t Typical Performance (data taken in a production test fixture) Broadband Performance VDD = 30 V, IDQ = 1600 mA, ƒ1 = 1957.5 MHz, ƒ2 = 1962.5 MHz VDD = 30 V, IDQ = 1600 mA, POUT = 50 W ue -40 -50 IM7 -60 100 on 10 35 1000 Output Power, PEP (W) -10 30 d IM5 IM3 -5 Return Loss 25 -15 -20 Efficiency 20 15 10 1860 -25 -30 Gain 1890 1920 1950 1980 2010 Input Return Loss (dB) Gain (dB), Efficiency (%) -30 tin Intermodulation Distortion (dBc) Up Low pr 40 -20 od Intermodulation Distortion Products v. Output Power -35 2040 di sc Frequency (MHz) *See Infineon distributor for future availability. Data Sheet 3 of 11 Rev. 08, 2017-07-19 PTFA192001E PTFA192001F Confidential, Limited Internal Distribution Typical Performance (cont.) Intermodulation Distortion Products vs. Tone Spacing Power Sweep, CW Conditions VDD = 30 V, IDQ = 1800 mA, ƒ = 1990 MHz VDD = 30 V IDQ = 1800 m A , ƒ = 1960 MHz, P OUT = 53 dBm PEP 15 45 14 35 TCASE = 25°C TCASE = 90°C 13 Efficiency 25 12 15 40 80 120 160 200 t 3rd Order -35 -40 -45 -50 5th 7th -55 240 0 5 10 20 25 30 35 40 2-Tone Drive-up tin ue Output Power (W) 15 Tone Spacing (MHz) d 0 -30 uc Gain (dB) Gain -25 od 55 pr 16 -20 Intermodulation Distortion (dBc) 65 Drain Efficiency (%) 17 Two-carrier WCDMA at Selected Biases on VDD = 30 V, IDQ = 1600 mA, ƒ = 1960 MHz, tone spacing = 1 MHz 40 -40 -45 30 IM5 25 IM7 -50 20 3rd Order IMD (dBc) IM3 35 15 -55 10 -60 42 44 46 48 50 52 54 2.2 A 1.8 A -40 -45 1.4 A -50 1.6 A -55 56 34 Output Power, PEP (dBm) Data Sheet 2.0 A -35 Drain Efficiency (%) Efficiency -35 -30 45 sc -30 di Intermodulation Distortion (dBc) -25 VDD = 30 V, ƒ = 1960 MHz, 3GPP WCDMA signal, P/AR = 8 dB, 10 MHz carrier spacing, series show IDQ 36 38 40 42 44 46 Output Power, PEP (dBm) 4 of 11 Rev. 08, 2017-07-19 PTFA192001E PTFA192001F Confidential, Limited Internal Distribution Typical Performance (cont.) Output Peak-to-Average Ratio Compression (PARC) at various Power levels Power Gain vs. Power Sweep (CW) over Temperature VDD = 30 V, IDQ = 1500 mA, ƒ = 1990 MHz, single-carrier WCDMA input PAR = 7.5 dB VDD = 30 V, IDQ = 1500 m A, ƒ = 1990 MHz 18 48 dBm 1 46 dBm 52 dBm 0.1 Input 50.5 dBm 0.01 85C 15 14 13 pr 50 dBm t 25C 16 od Power Gain (dB) Probability (%) -15C 17 10 uc 100 12 0.001 1 2 3 4 5 6 7 1 8 100 1000 Output Power (W) Voltage Sweep tin ue d Peak-to-Average (dB) 10 Bias Voltage vs. Temperature on IDQ = 1800 mA, ƒ = 1960 MHz, tone spacing = 1 MHz, Output Power (PEP) = 53 dBm 40 Efficiency IM3 Up -30 30 -40 20 Gain -50 Normalized Bias Voltage (V) 50 Gain (dB), Drain Efficiency (%) sc -20 di 3rd Order Intermodulation Distortion (dBc) -10 Voltage normalized to typical gate voltage, series show current 25 27 29 31 0.44 A 1.02 1.32 A 1.01 2.20 A 33 3.30 A 1.00 6.61 A 0.99 9.91 A 0.98 13.22 A 0.97 16.52 A 0.96 0.95 -20 10 23 1.03 0 20 40 60 80 100 Case Temperature (°C) Supply Voltage (V) Data Sheet 5 of 11 Rev. 08, 2017-07-19 on sc di d ue tin pr od t uc PTFA192001E PTFA192001F Confidential, Limited Internal Distribution Reference Circuit VDD 2K V R8 2K V R3 LM7805 QQ1 0.001µF C3 0.001µF C1 1.2K V R1 0.001µF C2 R6 5.1K V C6 10pF C11 10pF l7 l9 C7 10pF RF_IN l1 C23 0.7pF DUT l2 l3 l4 l5 l11 l6 l10 ue C10 10pF C17 10pF C18 1µF C15 0.1µF l 14 C26 0.7pF C19 1µF l15 VDD C16 10µF 50V C28 10pF l16 RF_OUT l17 C27 0.7pF L2 C20 2.2µF C21 0.1µF C22 10µF 50V tin C9 0.1µF l 13 l12 d l8 C14 2.2µF C25 0.7pF C24 0.7pF R7 5.1K V C8 4.7µF 16V C13 1µF C12 1µF od C5 0.1µF pr C4 4.7µF 16V L1 uc t B C P56 1.3K V Q1 R2 a 1 9 2 0 1 e f _ cs h 2K V R5 Reference circuit schematic for ƒ = 1960 MHz on Circuit Assembly Information DUT PTFA192001E or PTFA192001F PCB 0.76 mm [.030"] thick, εr = 3.48 sc l1 l2 l3 l4 (taper) l5 l6 l7, l8 l9, l10 l11 l12 (taper) l13 (taper) l14 (taper) l15 l16 l17 Electrical Characteristics at 1960 MHz 1 0.038 0.071 0.022 0.060 0.040 0.026 0.123 0.258 0.067 0.017 0.024 0.019 0.009 0.021 0.096 di Microstrip LDMOS Transistor Rogers RO4350 1 oz. copper Dimensions: L x W ( mm) Dimensions: L x W (in.) λ, 50.0 Ω λ, 50.0 Ω λ, 43.0 Ω λ, 43.0 Ω / 6.9 Ω λ, 6.9 Ω λ, 6.9 Ω λ, 60.0 Ω λ, 50.9 Ω λ, 5.0 Ω λ, 5.0 Ω / 7.2 Ω λ, 7.2 Ω / 12.3 Ω λ, 12.3 Ω / 41 Ω λ, 41.0 Ω λ, 41.0 Ω λ, 50.0 Ω 3.51 x 1.70 6.60 x 1.70 2.01 x 2.16 5.28 x 2.16 / 20.32 3.33 x 20.32 2.21 x 20.32 11.48 x 1.24 23.88 x 1.65 5.59 x 28.91 1.42 x 28.91 / 19.51 2.08 x 19.51 / 10.67 1.78 x 10.67 / 2.29 0.79 x 2.29 1.85 x 2.29 8.99 x 1.70 0.138 x 0.067 0.260 x 0.067 0.079 x 0.085 0.208 x 0.085 / 0.131 x 0.800 0.087 x 0.800 0.452 x 0.049 0.940 x 0.065 0.220 x 1.138 0.056 x 1.138 / 0.082 x 0.768 / 0.070 x 0.420 / 0.031 x 0.090 0.073 x 0.090 0.354 x 0.067 0.800 0.768 0.420 0.090 1Electrical characteristics are rounded. Data Sheet 7 of 11 Rev. 08, 2017-07-19 PTFA192001E PTFA192001F Confidential, Limited Internal Distribution Reference Circuit (cont.) RO4350_.030 RO4350_.030 V DD C11 C2 C1 C3 C4 L1 V DD C16 C5 R6 C6 R5 C12 C13 C14 Q1 R1 C23 R2 t R8 QQ1 C25 C28 C15 RF_IN uc R3 RF_OUT C26 C9 C24 C10 C27 C21 od C7 C8 V DD C22 pr C20 C19 C18 R7 L2 tin Reference circuit assembly diagram* (not to scale) ue A192001in_01 d C17 A192001out_01 a192001ef _assy Description Suggested Manufacturer P/N or Comment C1, C2, C3 C4, C8 C5, C9, C15, C21 C6, C10 C7, C28 C11, C17 C12, C13, C18, C19 C14, C20 C16, C22 C23, C24, C25, C26, C27 L1, L2 Q1 QQ1 R1 R2 R3, R5 R6, R7 R8 Capacitor, 0.001 µF Capacitor, 4.7 µF, 16 V Capacitor, 0.1 µF Ceramic capacitor, 10 pF Ceramic capacitor, 10 pF Capacitor, 10 pF Ceramic capacitor, 1 µF Capacitor, 2.2 µF Tantalum capacitor, 10 µF, 50 V Capacitor, 0.7 pF Digi-Key Digi-Key Digi-Key ATC ATC AVX Digi-Key Digi-Key Garrett Electronics AVX PCC1772CT-ND PCS3475CT-ND PCC104BCT-ND 100A 100 100B 100 08051J100GBTTR 445-1411-1-ND 445-1447-2-ND TPSE106K050R0400 08051J0R7BBTTR Ferrite, 8.9 mm Transistor Voltage regulator Chip resistor 1.2 k-ohms Chip resistor 1.3 k-ohms Chip resistor 2 k-ohms Chip resistor 5.1 k-ohms Potentiometer 2 k-ohms Elna Magnetics Infineon Technologies National Semiconductor Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key BDS 4.6/3/8.9-4S2 BCP56 LM7805 P1.2KGCT-ND P1.3KGCT-ND P2KECT-ND P5.1KECT-ND 3224W-202ETR-ND di sc on Component *Gerber files for this circuit available on request Data Sheet 8 of 11 Rev. 08, 2017-07-19 PTFA192001E PTFA192001F Confidential, Limited Internal Distribution Package Outline Specifications Package H-36260-2 45° X 2.03 [.080] 2X 12.70 [.500] 4X R 1.52 [R.060] D od S +0.10 LID 13.21 –0.15 C L [.520 +.004] pr –.006 uc 4.83±0.50 [.190±.020] t C L FLANGE 13.72 [.540] 23.37±0.51 [.920±.020] 2X R1.63 [R.064] ue d G tin 27.94 [1.100] 22.35±0.23 [.880±.009] C L 4.11±0.38 [.162±.015] 0.0381 [.0015] -A34.04 [1.340] h - 3 6 + 3 7 2 6 0 - 2 _ 3 6 2 6 0 / 0 4 - 2 5 - 0 8 di 1.02 [.040] sc on SPH 1.57 [.062] Diagram Notes—unless otherwise specified: 1. Interpret dimensions and tolerances per ASME Y14.5M-1994. 2. Pins: D = drain, S = source, G = gate. 3. Lead thickness: 0.10 +0.051/–0.025 [.004 +.002/–.001]. 4. Gold plating thickness: S, D, G - flange & leads: 1.14 ± 0.38 micron [45 ± 15 microinch] 5. All tolerances ± 0.127 [.005] unless specified otherwise. 6. Primary dimensions are mm. Alternate dimensions are inches. Find the latest and most complete information about products and packaging at the Infineon Internet page http://www.infineon.com/rfpower Data Sheet 9 of 11 Rev. 08, 2017-07-19 PTFA192001E PTFA192001F Confidential, Limited Internal Distribution Package Outline Specifications (cont.) Package H-37260-2 2X 12.70 [.500] 45° X 2.031 [.080] od 13.72 [.540] uc 4.83±0.50 [.190±.020] D t CL C L LID 13.21 +0.10 23.37±0.51 [.920±.020] d pr –0.15 [.520 +.004 ] –.006 ue G +0.381 tin 4X R0.508 –0.127 [R.020 +.015 ] –.005 S di 1.02 [.040] sc on LID 22.35±0.23 [.880±.009] 4.11±0.38 [.162±.015] 0.0381 [.0015] -Ah - 3 6 + 3 7 2 6 0 - 2 _ 3 7 2 6 0 0 / 4 - 2 5 - 0 8 SPH 1.57 [.062] FLANGE 23.11 [.910] Diagram Notes—unless otherwise specified: 1. Interpret dimensions and tolerances per ASME Y14.5M-1994. 2. Pins: D = drain, S = source, G = gate. 3. Lead thickness: 0.10 +0.051/–0.025 [.004 +.002/–.001]. 4. Gold plating thickness: S, D, G - flange & leads: 1.14 ± 0.38 micron [45 ± 15 microinch] 5. All tolerances ± 0.127 [.005] unless specified otherwise. 6. Primary dimensions are mm. Alternate dimensions are inches. Find the latest and most complete information about products and packaging at the Infineon Internet page http://www.infineon.com/rfpower Data Sheet 10 of 11 Rev. 08, 2017-07-19 PTFA192001E/F Confidential, Limited Internal Distribution Revision History: 2017-07-19 2015-03-04, Data Sheet Previous Version: Data Sheet Subjects (major changes since last revision) All Product discontinued t Page uc We Listen to Your Comments od Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: highpowerRF@infineon.com ue d pr To request other information, contact us at: +1 877 465 3667 (1-877-GO-LDMOS) USA or +1 408 776 0600 International tin GOLDMOS® is a registered trademark of Infineon Technologies AG. Published by Infineon Technologies AG 81726 Munich, Germany on Edition 2017-07-19 Legal Disclaimer sc © 2009 Infineon Technologies AG All Rights Reserved. di The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com/rfpower). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Data Sheet 11 of 11 Rev. 08, 2017-07-19