PTFA210701EV4R250XTMA1

PTFA210701E PTFA210701F Confidential, Limited Internal Distribution Thermally-Enhanced High Power RF LDMOS FET 70 W, 2110 – 2170 MHz Description 25 IM3 -45 20 tin ACPR -50 15 -55 -60 30 32 34 36 38 40 42 t uc • Broadband internal matching • Typical two-carrier WCDMA performance at 2140 MHz, 30 V - Average output power = 42 dBm - Linear Gain = 16.5 dB - Efficiency = 27.0% - Intermodulation distortion = –37 dBc - Adjacent channel power = –42.5 dBc ue 30 Drain Efficiency (%) -35 Thermally-enhanced packages, Pb-free and RoHS-compliant d 35 on IM3 (dBc), ACPR (dBc) -30 • pr VDD = 30 V, IDQ = 550 mA, ƒ = 2140 MHz, 3GPP WCDMA signal, P/A R = 8 dB, 10 MHz carrier spacing -40 PTFA210701F Package H-37265-2 Features Two-carrier WCDMA Drive-up Efficiency PTFA210701E Package H-36265-2 od The PTFA210701E and PTFA210701F are 70-watt LDMOS FETs designed for single- and dual-carrier WCDMA power amplifier applications in the 2110 MHz to 2170 MHz band. Features include input and output matching, and thermally-enhanced packages with slotted or earless flanges. Manufactured with Infineon's advanced LDMOS process, these devices provide excellent thermal performance and superior reliability. • Typical CW performance, 2170 MHz, 30 V - Output power at P–1dB = 80 W - Efficiency = 58% • Integrated ESD protection: Human Body Model, Class 2 (minimum) • Excellent thermal stability, low HCI drift • Capable of handling 10:1 VSWR @ 30 V, 70 W (CW) output power 10 5 44 sc Average Output Power (dBm) di RF Characteristics WCDMA Measurements (tested in Infineon test fixture) VDD = 30 V, IDQ = 550 mA, POUT = 18 W average ƒ1 = 2135 MHz, ƒ2 = 2145 MHz, 3GPP signal, channel bandwidth = 3.84 MHz, peak/average = 8 dB @ 0.01% CCDF Characteristic Symbol Min Typ Max Unit Gain Gps 15.5 16.5 — dB Drain Efficiency ηD 28 29 — % Intermodulation Distortion IMD — –36.5 –35.5 dBc All published data at TCASE = 25°C unless otherwise indicated *See Infineon distributor for future availability. ESD: Electrostatic discharge sensitive device—observe handling precautions! Data Sheet – DISCONTINUED 1 of 10 Rev. 03, 2014-02-12 PTFA210701E PTFA210701F Confidential, Limited Internal Distribution RF Characteristics (cont.) Two-tone Measurements (not subject to production test—verified by design/characterization in Infineon test fixture) Characteristic Min Typ Max Unit Gain Gps — 16.5 — dB Drain Efficiency ηD — 41 — % Intermodulation Distortion IMD — –29.5 — dBc od DC Characteristics uc Symbol t VDD = 30 V, IDQ = 550 mA, POUT = 70 W PEP, ƒ = 2140 MHz, tone spacing = 1 MHz Conditions Symbol Min Typ Max Unit Drain-Source Breakdown Voltage VGS = 0 V, IDS = 10 mA V(BR)DSS 65 — — V Drain Leakage Current VDS = 28 V, V GS = 0 V IDSS — — 1.0 µA IDSS — — 10.0 µA RDS(on) — 0.125 — Ω pr Characteristic d VDS = 63 V, V GS = 0 V VGS = 10 V, V DS = 0.1 V Operating Gate Voltage VDS = 30 V, IDQ = 550 mA VGS 2.0 2.5 3.0 V Gate Leakage Current VGS = 10 V, V DS = 0 V IGSS — — 1.0 µA tin ue On-State Resistance Maximum Ratings on Parameter Gate-Source Voltage Junction Temperature sc Drain-Source Voltage Symbol Value Unit VDSS 65 V VGS –0.5 to +12 V TJ 200 °C PD 190 W 1.09 W/°C di Total Device Dissipation Above 25°C derate by Storage Temperature Range TSTG –40 to +150 °C Thermal Resistance (TCASE = 70°C, 70 W CW) RθJC 0.92 °C/W Ordering Information Type and Version Package Type Package Description Marking PTFA210701E V4 H-36265-2 Thermally-enhanced slotted flange, single-ended PTFA210701E PTFA210701F V4 H-37265-2 Thermally-enhanced earless flange, single-ended PTFA210701F *See Infineon distributor for future availability. Data Sheet – DISCONTINUED 2 of 10 Rev. 03, 2014-02-12 PTFA210701E PTFA210701F Confidential, Limited Internal Distribution Two-tone Drive-up at Optimum IDQ VDD = 30 V, IDQ = 550 mA, ƒ = 2140 MHz, tone spacing = 1 MHz 0 -5 25 -10 Return Loss 20 -15 -20 15 -25 Gain -30 -30 40 Efficiency t Efficiency 45 -35 IM3 -40 -45 IM5 30 25 -50 -55 20 15 IM7 -60 10 -65 -35 10 2070 2090 2110 2130 2150 2170 2190 2210 37 d 35 5 39 41 43 45 47 49 Output Power, PEP (dBm) Power Sweep, CW Conditions VDD = 30 V, IDQ = 550 mA, ƒ = 2170 MHz sc Two-carrier WCDMA at Selected Biases VDD = 30 V, ƒ = 2140 MHz, 3GPP WCDMA signal, P/AR = 8 dB, 10 MHz carrier spacing, series show IDQ -30 60 17 450 mA di 50 650 mA -40 Gain (dB) 3rd Order IMD (dBc) -35 TCASE = 25°C TCASE = 90°C 18 -45 -50 Gain 16 40 15 30 600 mA 14 550 mA -55 Efficiency 500 mA 13 -60 30 32 34 20 36 38 40 42 0 44 20 40 60 80 10 100 Output Power (W) Average Output Power (dBm) Data Sheet – DISCONTINUED Drain Efficiency (%) on tin ue Frequency (MHz) 35 uc 30 Input Return Loss (dB) Gain (dB), Efficiency (%) 5 -25 od 10 pr 35 Intermodulation Distortion (dBc) Broadband Performance VDD = 30 V, IDQ = 550 mA, POUT = 42.5 dBm Drain Efficiency (%) Typical Performance (data taken in a production test fixture) 3 of 10 Rev. 03, 2014-02-12 PTFA210701E PTFA210701F Confidential, Limited Internal Distribution Typical Performance (cont.) Single-carrier WCDMA Drive-up Voltage Sweep -45 20 -50 10 ACPR -55 34 36 38 40 42 40 t -15 -20 IM3 Up -25 -30 -35 23 44 35 30 25 20 15 Gain 10 25 27 29 31 33 Supply Voltage (V) tin ue Average Output Power (dBm) Efficiency -45 d 32 45 -40 0 30 -10 Gain (dB), Drain Efficiency (%) 30 50 uc Efficiency -5 pr 40 3rd Order IMD (dBc) 50 -35 -40 IDQ = 550 mA, ƒ = 2140 MHz, tone spacing = 1 MHz, POUT (PEP) = 48.5 dBm od ACPR Up ACPR Low -30 Drain Efficiency (%) Adjacent Channel Power Ratio (dB) VDD = 30 V, IDQ = 550 mA, ƒ = 2140 MHz, 3GPP WCDMA signal, TM1 w/16 DPCH, 67% clipping, P/A R = 8.5 dB, 3.84 MHz BW Bias Voltage vs. Temperature on Intermodulation Distortion Products vs. Tone Spacing Voltage normalized to typical gate voltage, series show current sc VDD = 30 V, IDQ = 550 mA, ƒ = 2140 MHz, POUT = 48.5 dBm PEP -30 -35 3rd order 5th -40 -45 7th -50 -55 0 5 10 15 20 25 30 35 0.44 A 1.02 0.73 A 1.01 1.10 A 1.00 2.20 A 0.99 3.30 A 4.41 A 0.98 5.51 A 0.97 0.96 0.95 -20 40 Tone Spacing (MHz) Data Sheet – DISCONTINUED 0.15 A 1.03 Normalized Bias Voltage (V) -25 di Intermodulation Distortion (dBc) -20 0 20 40 60 80 100 Case Temperature (°C) 4 of 10 Rev. 03, 2014-02-12 PTFA210701E PTFA210701F Confidential, Limited Internal Distribution Broadband Circuit Impedance Z Source Ω Frequency Z Load G R jX R jX 2060 19.94 1.61 4.50 –2.87 2110 20.94 0.77 4.20 –2.50 2140 21.41 0.11 4.02 –2.29 2170 21.83 –0.69 3.88 –2.07 2220 22.26 –2.09 3.66 –1.66 Z0 = 50 Ω od 0 .1 0.4 0.5 pr ue 2220 MHz d Z Load 0.3 2060 MHz 0.2 0.1 0.0 Z Source 2220 MHz tin 2060 MHz 0.1 on DTOW ARD LOA GT HS N E L VE - W AV E LE NGT H S T OW A S MHz t Z Source Z Load Ω uc D di sc See next page for circuit information Data Sheet – DISCONTINUED 5 of 10 Rev. 03, 2014-02-12 PTFA210701E PTFA210701F Confidential, Limited Internal Distribution Reference Circuit C1 0.001µF R2 1.3K V R1 1.2KV QQ1 LM7805 VDD Q1 BCP56 C3 0.001µF R3 2K V R4 2K V C5 R7 0.1µF 1K V C6 1µF C7 0.01µF C8 10pF C12 10pF l8 R9 10 V C10 10pF RF_IN l1 l3 l2 l9 l4 l5 l6 l7 l11 C11 1.3pF C13 0.02µF C14 1µF C15 100µF 50V C22 0.5pF DUT l12 l13 l14 l10 ue l15 l16 RF_OUT L2 C18 0.02µF C19 1µF C20 100µF 50V C21 0.1µF tin C17 10pF C16 0.1µF C25 10pF C24 0.8pF C23 0.5pF d C9 0.8pF VDD L1 a210701e_sch 10µF 35V R8 5.1K V od + C4 R6 1K V pr R5 10 V uc t C2 0.001µF Reference circuit schematic for ƒ = 2140 MHz on Circuit Assembly Information PTFA210701E or PTFA210701F 0.76 mm [.030"] thick, εr = 3.48 LDMOS Transistor Rogers 4350 1 oz. copper Microstrip Electrical Characteristics at 2140 MHz1 Dimensions: L x W (mm) Dimensions: L x W (in.) 0.112 λ, 50.0 Ω 0.053 λ, 50.0 Ω 0.044 λ, 43.0 Ω 0.054 λ, 43.0 Ω 0.016 λ, 43.0 Ω 0.022 λ, 14.6 Ω 0.062 λ, 12.2 Ω 0.214λ, 61.0 Ω 0.211 λ, 53.0 Ω 0.042 λ, 6.5 Ω 0.043 λ, 6.5 Ω / 16.2 Ω 0.023 λ, 16.2 Ω / 50.0 Ω 0.010 λ, 53.0 Ω 0.130 λ, 53.0 Ω 0.116 λ, 53.0 Ω 9.53 x 1.78 4.52 x 1.78 3.73 x 2.18 4.57 x 2.18 1.37 x 2.18 1.73 x 8.76 4.88 x 10.82 18.36 x 1.22 17.91 x 1.57 3.25 x 21.84 3.30 x 21.84 / 7.80 1.88 x 7.80 / 1.57 0.89 x 1.57 11.07 x 1.57 9.88 x 1.57 di l1 l2 l3 l4 l5 l6 l7 l8 l9, l10 l11 l12 (taper) l13 (taper) l14 l15 l16 sc DUT PCB 0.375 x 0.070 0.178 x 0.070 0.147 x 0.086 0.180 x 0.086 0.054 x 0.086 0.068 x 0.345 0.192 x 0.426 0.723 x 0.048 0.705 x 0.062 0.128 x 0.860 0.130 x 0.860 / 0.307 0.074x 0.307 / 0.062 0.035 x 0.062 0.436 x 0.062 0.389 x 0.062 1Electrical characteristics are rounded. Data Sheet – DISCONTINUED 6 of 10 Rev. 03, 2014-02-12 PTFA210701E PTFA210701F Confidential, Limited Internal Distribution Reference Circuit (cont.) C5 R4 LM R3 R1 R2 R7 V DD QQ1 C2 C13 C12 Q1 L1 VDD C15 C7 R8 C8 RF_IN C16 C22 R9 RF_OUT C23 C11 C24 C25 od C10 C9 C14 t C4 R6 C6 C1 uc R5 C3 C21 pr C20 C17 VDD L2 C19 Component Description tin Reference circuit assembly diagram (not to scale)* ue RO4350_.030 A210701in_01 d C18 di sc on C1, C2, C3 Capacitor, 0.001 µF C4 Tantalum capacitor, 10 µF, 35 V C5, C16, C21 Capacitor, 0.1 µF C6, C14, C19 Ceramic capacitor, 1 µF C7 Capacitor, 0.01 µF C8, C10, C12, C17, C25 Ceramic capacitor, 10 pF C9, C24 Ceramic capacitor, 0.8 pF C11 Ceramic capacitor, 1.3 pF C13, C18 Capacitor, 0.02 µF C15, C20 Electrolytic capacitor, 100 µF, 50 V C22, C23 Ceramic capacitor, 0.5pF L1, L2 Ferrite, 8.9 mm Q1 Transistor QQ1 Voltage regulator R1 Chip resistor 1.2K ohms R2 Chip resistor 1.3K ohms R3 Chip resistor 2K ohms R4 Potentiometer 2K ohms R5, R9 Chip resistor 10 ohms R6, R7 Chip resistor 1K ohms R8 Chip resistor 5.1K ohms RO4350_.030 A210701out_01 a210701e_assy Suggested Manufacturer P/N or Comment Digi-Key Digi-Key Digi-Key Digi-Key ATC ATC ATC ATC ATC Digi-Key ATC Elna Magnetics Infineon Technologies National Semiconductor Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key PCC1772CT-ND 399-1655-2-ND PCC104BCT-ND 445-1411-2-ND 200B 103 100B 100 100B 0R8 100B 1R3 200B 203 PCE3718CT-ND 100B 0R5 BDS 4.6/3/8.9-4S2 BCP56 LM7805 P1.2KGCT-ND P1.3KGCT-ND P2KECT-ND 3224W-202ETR-ND P10ECT-ND P1KECT-ND P5.1KECT-ND *Gerber Files for this circuit available on request Data Sheet – DISCONTINUED 7 of 10 Rev. 03, 2014-02-12 PTFA210701E PTFA210701F Confidential, Limited Internal Distribution Package Outline Specifications Package H-36265-2 2X 7.11 [.280] (45° X 2.03 [.080]) CL uc t D 2.59±0.51 [.102±.020] S C L pr od FLANGE 9.78 [.385] 15.34±0.51 [.604±.020] LID 10.16±0.25 [.400±.010] G 2x 7.11 [.280] 15.23 [.600] 10.16±0.25 [.400±.010] on tin ue d 2X R1.60 [R.063] sc di SPH 1.57 [.062] 3.56±0.38 [.140±.015 0.0381 [.0015] -A2 0 0 7 1 - 1 1 - 6 _ h 3 - 6 + 3 7 2 6 5 _ P O s .v s d _ h 3 - 6 2 6 5 2 - 4X R1.52 [R.060] 20.31 [.800] 1.02 [.040] Diagram Notes—unless otherwise specified: 1. Lead thickness: 0.10 +0.051/–0.025 [.004 +.002/–.001]. 2. All tolerances ± 0.127 [.005] unless specified otherwise. 3. Pins: D = drain, S = source, G = gate. 4. Interpret dimensions and tolerances per ASME Y14.5M-1994. 5. Primary dimensions are mm. Alternate dimensions are inches. 6. Gold plating thickness: S, D, G - flange & leads: 1.14 ± 0.38 micron [45 ± 15 microinch] Find the latest and most complete information about products and packaging at the Infineon Internet page http://www.infineon.com/products Data Sheet – DISCONTINUED 8 of 10 Rev. 03, 2014-02-12 PTFA210701E PTFA210701F Confidential, Limited Internal Distribution Package Outline Specifications (cont.) Package H-37265-2 (45° X 2.03 [.080]) CL 2.59±0.51 [.102±.020] LID 10.16±0.25 [.400±.010] FLANGE 10.16 [.400] uc t D 10.16 [.400] d G pr od CL 15.34±.51 [.604±.020] ue 2X 7.11 [.280] FLANGE 4X R0.63 [R.025] MAX tin LID 10.16±0.25 [.400±.010] sc on SPH 1.57 [.062] di 3.56±.38 [.140±.015] | 0.025 [.001]| -A- S 10.16 [.400] 1.02 [.040] 0 7 1 1 1 9 _ h - 3 6 + 3 7 2 6 5 _ P O s _ h - 3 7 2 6 5 - 2 Diagram Notes—unless otherwise specified: 1. Lead thickness: 0.10 +0.051/–0.025 [.004 +.002/–.001]. 2. All tolerances ± 0.127 [.005] unless specified otherwise. 3. Pins: D = drain, S = source, G = gate. 4. Interpret dimensions and tolerances per ASME Y14.5M-1994. 5. Primary dimensions are mm. Alternate dimensions are inches. 6 Gold plating thickness: S, D, G - flange & leads: 1.14 ± 0.38 micron [45 ± 15 microinch] Find the latest and most complete information about products and packaging at the Infineon Internet page http://www.infineon.com/products Data Sheet – DISCONTINUED 9 of 10 Rev. 03, 2014-02-12 PTFA210701E/F Confidential, Limited Internal Distribution Revision History: 2014-02-12 2009-02-18, Data Sheet Previous Version: Subjects (major changes since last revision) Product Discontinued. Please see PD Notes: PD_012_14 t Page All Data Sheet uc We Listen to Your Comments od Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: highpowerRF@infineon.com ue d pr To request other information, contact us at: +1 877 465 3667 (1-877-GO-LDMOS) USA or +1 408 776 0600 International tin GOLDMOS® is a registered trademark of Infineon Technologies AG. Published by Infineon Technologies AG 85579 Neubiberg, Germany on Edition 2014-02-12 Legal Disclaimer sc © 2014 Infineon Technologies AG All Rights Reserved. di The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com/rfpower). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Data Sheet – DISCONTINUED 10 of 10 Rev. 03, 2014-02-12