SPA08N50C3XKSA1

SPP08N50C3, SPI08N50C3 SPA08N50C3 Cool MOS™ Power Transistor Feature VDS @ Tjmax 560 V RDS(on) 0.6 Ω ID 7.6 A • New revolutionary high voltage technology • Ultra low gate charge • Periodic avalanche rated PG-TO220FP PG-TO262 PG-TO220 • Extreme dv/dt rated • Ultra low effective capacitances 1 • Improved transconductance 2 3 P-TO220-3-31 • PG-TO-220-3-31;-3-111: Fully isolated package (2500 VAC; 1 minute) Type SPP08N50C3 Package PG-TO220 Ordering Code Q67040-S4567 Marking 08N50C3 SPI08N50C3 PG-TO262 Q67040-S4568 08N50C3 SPA08N50C3 PG-TO220FP SP000216306 08N50C3 Maximum Ratings Parameter Symbol Value SPP_I Continuous drain current Unit SPA A ID TC = 25 °C 7.6 7.61) TC = 100 °C 4.6 4.61) Pulsed drain current, tp limited by Tjmax ID puls 22.8 22.8 A Avalanche energy, single pulse EAS 230 230 mJ EAR 0.5 0.5 Avalanche current, repetitive tAR limited by Tjmax IAR 7.6 7.6 A Gate source voltage VGS ±20 ±20 V Gate source voltage AC (f >1Hz) VGS ±30 ±30 Power dissipation, TC = 25°C Ptot 83 32 Operating and storage temperature Reverse diode dv/dt 6) T j , Tstg dv/dt ID=5.5A, VDD=50V Avalanche energy, repetitive tAR limited by Tjmax2) ID=7.6A, VDD=50V Rev. 2.91 Page 1 -55...+150 15 W °C V/ns 2009-11-27 SPP08N50C3, SPI08N50C3 SPA08N50C3 Maximum Ratings Parameter Symbol Drain Source voltage slope dv/dt Value Unit 50 V/ns Values Unit VDS = 400 V, ID = 7.6 A, Tj = 125 °C Thermal Characteristics Parameter Symbol min. typ. max. Thermal resistance, junction - case RthJC - - 1.5 Thermal resistance, junction - case, FullPAK RthJC_FP - - 3.9 Thermal resistance, junction - ambient, leaded RthJA - - 62 Thermal resistance, junction - ambient, FullPAK RthJA FP Tsold - - 80 - - 260 Soldering temperature, wavesoldering K/W °C 1.6 mm (0.063 in.) from case for 10s 3) Electrical Characteristics, at Tj=25°C unless otherwise specified Parameter Symbol Conditions Drain-source breakdown voltage V(BR)DSS VGS=0V, ID=0.25mA Drain-Source avalanche V(BR)DS VGS=0V, ID=7.6A Values Unit min. typ. max. 500 - - - 600 - 2.1 3 3.9 V breakdown voltage Gate threshold voltage VGS(th) ID=350µA, VGS =VDS Zero gate voltage drain current IDSS V DS=500V, V GS=0V, Gate-source leakage current IGSS Drain-source on-state resistance RDS(on) Gate input resistance Rev. 2.91 RG µA Tj=25°C - 0.5 1 Tj=150°C - - 100 V GS=20V, V DS=0V - - 100 Ω V GS=10V, I D=4.6A Tj=25°C - 0.5 0.6 Tj=150°C - 1.5 - f=1MHz, open drain - 1.2 - Page 2 nA 2009-11-27 SPP08N50C3, SPI08N50C3 SPA08N50C3 Electrical Characteristics Parameter Transconductance Symbol gfs Conditions VDS≥2*ID*R DS(on)max, Values Unit min. typ. max. - 6 - S pF ID=4.6A Input capacitance Ciss VGS=0V, VDS=25V, - 750 - Output capacitance Coss f=1MHz - 350 - Reverse transfer capacitance Crss - 12 - - 56 - - 30 - Effective output capacitance,4) Co(er) VGS=0V, VDS=400 energy related Effective output capacitance,5) Co(tr) time related Turn-on delay time td(on) VDD=380V, VGS=0/10V, - 6 - Rise time tr ID=7.6A, - 5 - Turn-off delay time td(off) RG =12Ω - 60 - Fall time tf - 7 - - 3 - - 17 - - 32 - - 5 - Gate Charge Characteristics Gate to source charge Qgs Gate to drain charge Qgd Gate charge total Qg V DD=400V, ID=7.6A V DD=400V, ID=7.6A, ns nC V GS=0 to 10V Gate plateau voltage V(plateau) VDD=400V, ID=7.6A V 1Limited only by maximum temperature 2Repetitve avalanche causes additional power losses that can be calculated as P =E *f. AR AV 3Soldering temperature for TO-263: 220°C, reflow 4C o(er) is a fixed capacitance that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS. 5C o(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. 6I