SPA21N50C3XKSA1

SPP21N50C3 SPI21N50C3, SPA21N50C3 Cool MOS™ Power Transistor Feature VDS @ Tjmax 560 V RDS(on) 0.19 Ω ID 21 A • New revolutionary high voltage technology • Worldwide best RDS(on) in TO 220 • Ultra low gate charge P G-TO262 PG-TO220FP PG-TO220 • Periodic avalanche rated • Extreme dv/dt rated 1 2 3 • Ultra low effective capacitances • Improved transconductance Type Package Ordering Code Marking SPP21N50C3 PG-TO220 Q67040-S4565 21N50C3 SPI21N50C3 PG-TO262 21N50C3 SPA21N50C3 PG-TO220FP Q67040-S4564 SP000216364 21N50C3 Maximum Ratings Parameter Value Symbol SPA SPP_I Continuous drain current Unit ID A TC = 25 °C 21 211) TC = 100 °C 13.1 13.11) 63 63 Pulsed drain current, tp limited by Tjmax ID puls Avalanche energy, single pulse EAS 690 690 EAR 1 1 Avalanche current, repetitive tAR limited by Tjmax IAR 21 21 A Gate source voltage VGS ±20 ±20 V Gate source voltage AC (f >1Hz) VGS ±30 ±30 Power dissipation, TC = 25°C Ptot 208 34.5 Operating and storage temperature Tj , Tstg A mJ ID=10A, VDD=50V Avalanche energy, repetitive tAR limited by Tjmax2) ID=21A, VDD=50V Reverse diode dv/dt Rev. 3.2 7) dv/dt page 1 -55...+150 15 W °C V/ns 2009-12-22 SPP21N50C3 SPI21N50C3, SPA21N50C3 Maximum Ratings Parameter Symbol Drain Source voltage slope dv/dt Value Unit 50 V/ns Values Unit VDS = 400 V, ID = 21 A, Tj = 125 °C Thermal Characteristics Symbol Parameter min. typ. max. Thermal resistance, junction - case RthJC - - 0.6 Thermal resistance, junction - case, FullPAK RthJC_FP - - 3.6 Thermal resistance, junction - ambient, leaded RthJA - - 62 Thermal resistance, junction - ambient, FullPAK RthJA_FP - - 80 SMD version, device on PCB: RthJA @ min. footprint - - 62 @ 6 cm 2 cooling area 3) - 35 - - - 260 Soldering temperature, wavesoldering Tsold K/W °C 1.6 mm (0.063 in.) from case for 10s 4) Electrical Characteristics, at Tj=25°C unless otherwise specified Parameter Symbol Conditions Drain-source breakdown voltage V(BR)DSS VGS=0V, ID=0.25mA Drain-Source avalanche V(BR)DS VGS=0V, ID=21A Values Unit min. typ. max. 500 - - - 600 - 2.1 3 3.9 V breakdown voltage Gate threshold voltage VGS(th) ID=1000µA, VGS=VDS Zero gate voltage drain current I DSS VDS=500V, V GS=0V, Gate-source leakage current I GSS Drain-source on-state resistance RDS(on) Gate input resistance Rev. 3.2 RG µA Tj=25°C - 0.1 1 Tj=150°C - - 100 VGS=20V, V DS=0V - - 100 Ω VGS=10V, ID=13.1A Tj=25°C - 0.16 0.19 Tj=150°C - 0.54 - f=1MHz, open drain - 0.53 - page 2 nA 2009-12-22 SPP21N50C3 SPI21N50C3, SPA21N50C3 Electrical Characteristics Parameter Transconductance Symbol gfs Conditions VDS≥2*ID*R DS(on)max, Values Unit min. typ. max. - 18 - S pF ID=13.1A Input capacitance Ciss VGS=0V, VDS=25V, - 2400 - Output capacitance Coss f=1MHz - 1200 - Reverse transfer capacitance Crss - 30 - - 87 - - 181 - Effective output capacitance,5) Co(er) VGS=0V, VDS=400V energy related Effective output capacitance,6) Co(tr) time related Turn-on delay time td(on) VDD=380V, VGS=0/10V, - 10 - Rise time tr ID=21A, - 5 - Turn-off delay time td(off) RG =3.6Ω - 67 - Fall time tf - 4.5 - - 10 - - 50 - - 95 - - 5 - ns Gate Charge Characteristics Gate to source charge Qgs Gate to drain charge Qgd Gate charge total Qg VDD=380V, ID=21A VDD=380V, ID=21A, nC VGS=0 to 10V Gate plateau voltage V(plateau) VDD=380V, ID=21A V 1Limited only by maximum temperature 2Repetitve avalanche causes additional power losses that can be calculated as P =E *f. AR AV 3Device on 40mm*40mm*1.5mm epoxy PCB FR4 with 6cm² (one layer, 70 µm thick) copper area for drain connection. PCB is vertical without blown air. 4Soldering temperature for TO-263: 220°C, reflow 5C o(er) is a fixed capacitance that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS. 6C o(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. 7I