SPD08N50C3
Cool MOS™ Power Transistor
VDS @ Tjmax
560
V
RDS(on)
0.6
Ω
ID
7.6
A
Feature
• New revolutionary high voltage technology
• Worldwide best RDS(on) in TO-252
PG-TO252
• Ultra low gate charge
• Periodic avalanche rated
• Extreme dv/dt rated
• Ultra low effective capacitances
• Improved transconductance
, available
in Halogen free mold compounda)
• Fully qualified according to JEDEC for Industrial Applications
Type
Package
Ordering Code
Marking
SPD08N50C3
PG-TO252
Q67040-S4569
08N50C3
Maximum Ratings, at TC = 25°C, unless otherwise specified
Parameter
Symbol
Continuous drain current
ID
Value
Unit
A
TC = 25 °C
7.6
TC = 100 °C
4.6
Pulsed drain current, t p limited by Tjmax
ID puls
22.8
Avalanche energy, single pulse
EAS
230
EAR
0.5
Avalanche current, repetitive tAR limited by Tjmax
IAR
7.6
A
Gate source voltage
VGS
±20
V
Gate source voltage AC (f >1Hz)
VGS
±30
Power dissipation, TC = 25°C
Ptot
83
W
Operating and storage temperature
Tj , Tstg
dv/dt
-55... +150
°C
mJ
ID=5.5A, VDD=50V
Avalanche energy, repetitive tAR limited by Tjmax1)
ID=7.6A, VDD=50V
Reverse diode dv/dt
6)
non-Halogen free (OPN: SPD08N50C3BT), Halogen free (OPN: SPD08N50C3AT)
Rev. 2.7
Page 1
15
V/ns
a)
2020-05-15
SPD08N50C3
Maximum Ratings
Parameter
Symbol
Drain Source voltage slope
dv/dt
Value
Unit
50
V/ns
Values
Unit
VDS = 400 V, ID = 7.6 A, Tj = 125 °C
Thermal Characteristics
Parameter
Symbol
min.
typ.
max.
Thermal resistance, junction - case
RthJC
-
-
1.5
Thermal resistance, junction - ambient, leaded
RthJA
-
-
75
SMD version, device on PCB:
RthJA
@ min. footprint
-
-
75
@ 6 cm2 cooling area 2)
-
-
50
-
-
260
Soldering temperature, reflow soldering, MSL3
Tsold
K/W
°C
1.6 mm (0.063 in.) from case for 10s 3)
Electrical Characteristics
Parameter
Symbol
Conditions
Drain-source breakdown voltage V(BR)DSS VGS=0V, ID=0.25mA
Drain-Source avalanche
V(BR)DS VGS=0V, ID=7.6A
Values
Unit
min.
typ.
max.
500
-
-
-
600
-
2.1
3
3.9
V
breakdown voltage
Gate threshold voltage
VGS(th)
ID=350µΑ, VGS=V DS
Zero gate voltage drain current
I DSS
VDS=500V, V GS=0V,
Gate-source leakage current
I GSS
Drain-source on-state resistance RDS(on)
Gate input resistance
Rev. 2.7
RG
µA
Tj=25°C,
-
0.5
1
Tj=150°C
-
-
100
VGS=20V, V DS=0V
-
-
100
VGS=10V, ID =4.6A,
Ω
Tj=25°C
-
0.5
0.6
Tj=150°C
-
1.5
-
f=1MHz, open Drain
-
1.2
-
Page 2
nA
2020-05-15
SPD08N50C3
Electrical Characteristics , at Tj = 25 °C, unless otherwise specified
Parameter
Transconductance
Symbol
gfs
Conditions
VDS≥2*ID*R DS(on)max,
Values
Unit
min.
typ.
max.
-
6
-
S
pF
ID=4.6A
Input capacitance
Ciss
VGS=0V, VDS=25V,
-
750
-
Output capacitance
Coss
f=1MHz
-
350
-
Reverse transfer capacitance
Crss
-
12
-
-
56
-
-
30
-
Effective output capacitance,4) Co(er)
VGS=0V,
energy related
VDS=0V to 400V
Effective output capacitance,5) Co(tr)
pF
time related
Turn-on delay time
td(on)
VDD=400V, VGS=0/10V,
-
6
-
Rise time
tr
ID=7.6A, RG =12Ω
-
5
-
Turn-off delay time
td(off)
-
60
-
Fall time
tf
-
7
-
-
3
-
-
17
-
-
32
-
-
5
-
Gate Charge Characteristics
Gate to source charge
Qgs
Gate to drain charge
Qgd
Gate charge total
Qg
V DD=400V, ID=7.6A
V DD=400V, ID=7.6A,
ns
nC
V GS=0 to 10V
Gate plateau voltage
V(plateau) VDD=400V, ID=7.6A
V
1Repetitve avalanche causes additional power losses that can be calculated as P =EAR*f.
AV
2Device on 40mm*40mm*1.5mm epoxy PCB FR4 with 6cm² (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical without blown air.
3Soldering temperature for TO-263: 220°C, reflow
4C
o(er)
is a fixed capacitance that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS.
5C
o(tr)
is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
6I