TLD1124EL

LITIX™ Basic TLD1124EL 1 Channel High-Side Current Source 1 Package PG-SSOP-14 Marking TLD1124 Overview Applications • Exterior LED lighting applications such as tail/brake light, turn indicator, position light, side marker,... • Interior LED lighting applications such as ambient lighting, interior illumination and dash board lighting. 4.7nF** VS ISO-Pulse protection circuit depending on requirements Internal supply IN_SET Current adjustment TLD1124EL * In case PWM via VS is performed ** For EMI improvement if required OUT St atus GND Diagnosis enable CST =100pF** DEN Output control 470kΩ* RSET Thermal protection ST GND CVS =4.7nF Cmod =2.2µF VBATT to other LITIX™ Basic Application Diagram with TLD1124EL Data Sheet www.infineon.com Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL Overview Basic Features • 1 Channel device with integrated output stage (current source), optimized to drive LEDs with output current up to 360 mA • Low current consumption • PWM-operation supported via VS-pin • Output current adjustable via external low power resistor and possibility to connect PTC resistor for LED protection during over temperature conditions • Reverse polarity protection and overload protection • Undervoltage detection • Open load and short circuit to GND diagnosis • Wide temperature range: -40°C < Tj < 150°C • PG-SSOP-14 package with exposed heatslug Description The LITIX™ Basic TLD1124EL is a one channel high side driver IC with integrated output stage. It is designed to control LEDs with a current up to 360 mA. In typical automotive applications the device is capable to drive i.e. 3 red LEDs with a current up to 180 mA, which is limited by thermal cooling aspects. The output current is controlled practically independent of load and supply voltage changes. Table 1 Product Summary Parameter Symbol Value Operating voltage range VS(nom) 5.5 V ... 40 V Maximum voltage VS(max) VOUT(max) 40 V Nominal output (load) current IOUT(nom) 180 mA when using a supply voltage range of 8 V - 18 V (e.g. Automotive car battery). Currents up to IOUT(max) possible in applications with low thermal resistance RthJA Maximum output (load) current IOUT(max) 360 mA; depending on thermal resistance RthJA Output current accuracy at RSET = 12 kΩ kLT 2250 ± 7% Protective Functions • ESD protection • Under voltage lock out • Over Load protection • Over Temperature protection • Reverse Polarity protection Diagnostic Functions • Diagnosis enable function • OL detection • SC to Vs (indicated by OL diagnosis) • SC to GND detection Data Sheet 2 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL Block Diagram Block Diagram VS 2 Internal supply Thermal protection IN_SET Current adjustment Status TLD1124EL Figure 1 Data Sheet OUT GND Diagnosis enable ST DEN Output control Basic Block Diagram 3 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL Pin Configuration 3 Pin Configuration 3.1 Pin Assignment Figure 2 Data Sheet VS 1 VS 2 DEN 3 NC 4 NC 14 NC 13 NC 12 OUT 11 NC 5 10 ST IN_SET 6 9 GND NC 7 8 NC TLD1124EL EP Pin Configuration 4 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL Pin Configuration 3.2 Pin Definitions and Functions Pin Symbol Input/ Output Function 1, 2 VS – Supply Voltage; battery supply, connect a decoupling capacitor (100 nF - 1 µF) to GND 3 DEN I Diagnosis enable pin 4 NC – Pin not connected 5 NC – Pin not connected 6 IN_SET I/O Input / SET pin; Connect a low power resistor to adjust the output current 7 NC – Pin not connected 8 NC – Pin not connected – 1) 9 GND 10 ST I/O Status pin 11 NC – Pin not connected 12 OUT O Output 13 NC – Pin not connected 14 NC – Pin not connected – 1) Exposed Pad GND Ground Exposed Pad; connect to GND in application 1) Connect all GND-pins together. Data Sheet 5 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL General Product Characteristics 4 General Product Characteristics 4.1 Absolute Maximum Ratings Absolute Maximum Ratings 1) Tj = -40°C to +150°C; all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Max. VS VDEN VDEN(VS) VDEN VOUT VOUT VPS -16 40 V – -16 40 V – VS - 40 VS + 16 V – -16 40 V – -1 40 V – -16 40 V – -0.3 6 V – -0.3 6 V – Voltages 4.1.1 Supply voltage 4.1.2 Diagnosis enable voltage DEN 4.1.3 Diagn. enable voltage DEN related to VS 4.1.4 4.1.5 4.1.6 Diagn. enable voltage DEN related to VOUT VDEN - VOUT Output voltage Power stage voltage VPS = VS - VOUT 4.1.7 IN_SET voltage 4.1.8 Status voltage VIN_SET VST 4.1.9 IN_SET current IIN_SET – – 2 8 mA – Diagnosis output 4.1.10 Output current IOUT – 390 mA – Tj Tstg -40 150 °C – -55 150 °C – Currents Temperatures 4.1.11 Junction temperature 4.1.12 Storage temperature ESD Susceptibility 4.1.13 ESD resistivity to GND VESD -2 2 kV Human Body Model (100 pF via 1.5 kΩ)2) 4.1.14 ESD resistivity all pins to GND -500 500 V CDM3) 4.1.15 ESD resistivity corner pins to GND VESD VESD -750 750 V CDM3) 1) Not subject to production test, specified by design 2) ESD susceptibility, Human Body Model “HBM” according to ANSI/ESDA/JEDEC JS-001-2011 3) ESD susceptibility, Charged Device Model “CDM” according to JESD22-C101E Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. Data Sheet 6 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL General Product Characteristics 4.2 Pos. Functional Range Parameter Symbol Limit Values Min. Max. Unit Conditions 4.2.16 Supply voltage range for normal operation VS(nom) 5.5 40 V – 4.2.17 Power on reset threshold VS(POR) – 5 V RSET = 12 kΩ IOUT = 80% IOUT(nom) VOUT = 2.5 V 4.2.18 Junction temperature Tj -40 150 °C – Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table. 4.3 Pos. Thermal Resistance Parameter 4.3.1 Junction to Case 4.3.2 Junction to Ambient 1s0p board 4.3.3 Junction to Ambient 2s2p board Symbol Limit Values RthJC RthJA1 Min. Typ. Max. – 8 10 – – RthJA2 – – 61 56 45 43 Unit Conditions K/W 1) 2) K/W 1) 3) K/W 1) 4) – – – – Ta = 85 °C Ta = 135 °C Ta = 85 °C Ta = 135 °C 1) Not subject to production test, specified by design. Based on simulation results. 2) Specified RthJC value is simulated at natural convection on a cold plate setup (all pins and the exposed Pad are fixed to ambient temperature). Ta = 85°C, Total power dissipation 1.5 W. 3) The RthJA values are according to Jedec JESD51-3 at natural convection on 1s0p FR4 board. The product (chip + package) was simulated on a 76.2 x 114.3 x 1.5 mm3 board with 70 µm Cu, 300 mm2 cooling area. Total power dissipation 1.5 W distributed statically and homogenously over power stage. 4) The RthJA values are according to Jedec JESD51-5,-7 at natural convection on 2s2p FR4 board. The product (chip + package) was simulated on a 76.2 x 114.3 x 1.5 mm3 board with 2 inner copper layers (outside 2 x 70 µm Cu, inner 2 x 35 µm Cu). Where applicable, a thermal via array under the exposed pad contacted the first inner copper layer. Total power dissipation 1.5 W distributed statically and homogenously over power stage. Data Sheet 7 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL DEN Pin 5 DEN Pin The DEN pin is a single function pin: DEN Output Control IDEN Figure 3 VDEN Block Diagram DEN pin This pin is used to activate or deactivate the device internal diagnosis functions. The diagnostic functions are described in Chapter 6.2, Chapter 7 and Chapter 8. The diagnosis is activated, if the voltage applied at the DEN pin VDEN is higher than VDEN(act). The diagnosis is disabled for voltages below VDEN(dis). A possibility to use the DEN pin is via a Zener diode, which is connected between VS and DEN pin. A circuit example is shown in the application information section Chapter 10. The diagnosis is activated, if the following condition is fulfilled: (1) V S  VDEN  act  + VZD The current consumption on the DEN pin has to be considered for the total device current consumption. The current is specified in Pos. 5.1.8. The typical current consumption IDEN(H) as a function of the supply voltage VS for a Zener diode voltage of VZD = 6 V is shown in the following diagram. Typical IDEN=f(VS) with (VS-VDEN)=6V 160 140 120 IDEN [µA] 100 80 Tj=-40°C Tj=25°C 60 Tj=150°C 40 20 0 0 2 4 6 8 10 12 14 16 18 VS [V] Figure 4 Typical IDEN(H) current for a Zener diode voltage of 6 V The device and channel turn on is independent of the VDEN-voltage. After applying a supply voltage the device is activated after the power on reset time tPOR. Data Sheet 8 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL DEN Pin VS tPOR IOU T 100% 80% t Figure 5 Power on reset The DEN voltage VDEN does not influence the disable function via the ST pin. If VDEN < VDEN(dis) the device can still be disabled via the ST pin, if VST > VST(H). For details, please refer to Chapter 7.3. 5.1 Electrical Characteristics Internal Supply / DEN Pin Electrical Characteristics Internal Supply / DEN pin Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40°C to +150°C, RSET = 12 kΩ all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Typ. Max. Unit Conditions 5.1.1 Current consumption, active mode IS(on) – – 1.9 mA 1) 5.1.2 Current consumption, device disabled via ST IS(dis,ST) – – 1.7 mA 1) 5.1.3 Current consumption, IS(dis,IN_SET) – device disabled via IN_SET – 1.7 mA 1) 5.1.4 IS(fault,STu) Current consumption, active mode in fault detection condition with STpin unconnected – – 2.1 mA 1) 5.1.5 IS(fault,STG) Current consumption, active mode in fault detection condition with STpin connected to GND – – 6.2 mA 1) Data Sheet 9 IIN_SET = 0 µA Tj < 105 °C VS = 18 V VOUT = 3.6V VS = 18 V Tj < 105 °C VST = 5 V VS = 18 V Tj < 105 °C VIN_SET = 5 V VS = 18 V Tj < 105 °C RSET = 12 k VOUT = 18 V or 0 V VS = 18 V Tj < 105 °C RSET = 12 k VOUT = 18 V or 0 V VST = 0 V Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL DEN Pin Electrical Characteristics Internal Supply / DEN pin (cont’d) Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40°C to +150°C, RSET = 12 kΩ all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Typ. Max. Unit Conditions 5.1.6 Power-on reset delay time 2) tPOR – – 25 µs 3) 5.1.7 Required supply voltage for current control VS(CC) – – 5.5 V VOUT = 3.6 V IOUT ≥ 90% IOUT(nom) 5.1.8 DEN high input current IDEN(H) mA – – – – – – – – 0.1 0.1 0.2 0.4 Tj < 105 °C VS = 13.5 V, VDEN = 5.5 V VS = 18 V, VDEN = 5.5 V VS = 18 V, VDEN = 12 V VS = VDEN = 18 V 2.45 – 3.2 V VS = 8...18 V 5.1.9 DEN activation threshold (diagnosis enabled above VDEN(act)) VDEN(act) VS = 0 →13.5 V VOUT(nom) = 3.6 ± 0.3V IOUT = 80% IOUT(nom) 1.5 – 2.3 V VS = 8...18 V DEN deactivation threshold VDEN(dis) (diagnosis disabled below VDEN(dis)) 1) The total device current consumption is the sum of the currents IS and IDEN(H), please refer to Pos. 5.1.8 2) See also Figure 4 3) Not subject to production test, specified by design 5.1.10 Data Sheet 10 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL IN_SET Pin 6 IN_SET Pin The IN_SET pin is a multiple function pin for output current definition, input and diagnostics: Logic IN_SET high impedance IIN_SET VIN_SET VIN_SET(OL/SC) GND Figure 6 Block Diagram IN_SET pin 6.1 Output Current Adjustment via RSET The current adjustment can be done by placing a low power resistor (RSET) at the IN_SET pin to ground. The dimensioning of the resistor can be done using the formula below: kR SET = ---------I OUT (2) The gain factor k (RSET * output current) is specified in Pos. 9.2.4 and Pos. 9.2.5. The current through the RSET is defined by the resistor itself and the reference voltage VIN_SET(ref), which is applied to the IN_SET during supplied device. 6.2 Smart Input Pin The IN_SET pin can be connected via RSET to the open-drain output of a µC or to an external NMOS transistor as described in Figure 7 This signal can be used to turn off the output stage of the IC. A minimum IN_SET current of IIN_SET(act) is required to turn on the output stage. This feature is implemented to prevent glimming of LEDs caused by leakage currents on the IN_SET pin, see Figure 10 for details. In addition, the IN_SET pin offers the diagnostic feedback information, if the status pin is connected to GND and VDEN > VDEN(act) (refer to Chapter 5). Another diagnostic possibility is shown in Figure 8, where the diagnosis information is provided via the ST pin (refer to Chapter 7 and Chapter 8) to a micro controller In case of a fault event with the ST pin connected to GND the IN_SET voltage is increased to VIN_SET(OL/SC) Pos. 8.3.2. Therefore, the device has two voltage domains at the IN_SET-pin, which is shown in Figure 11. Data Sheet 11 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL IN_SET Pin Microcontroller (e.g. XC866) OUT RSET/2 RSET/2 IN_SET Current adjust Status Basic LED Driver ST GND IN VDDP = 5 V Figure 7 Schematics IN_SET interface to µC, diagnosis via IN_SET pin Microcontroller (e.g. XC866) OUT RSET IN_SET Current adjust Status Basic LED Driver ST GND IN VDDP = 5 V Figure 8 optional Schematics IN_SET interface to µC, diagnosis via ST pin The resulting switching times are shown in Figure 9: IIN_ SET IOU T tON (IN_ SET ) tOFF(IN _ SET) t 100% 80% 20% t Figure 9 Data Sheet Switching times via IN_SET 12 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL IN_SET Pin IOUT [mA] k = IOUTx * VIN_SET(ref) / IIN_SETx IOUTx IIN_SET(ACT) Figure 10 IIN_SETx IIN_SET [µA] IOUT versus IINSET V IN_ SET VIN _SET( OL /SC)m ax Diagnostic voltage range V IN_ SET(OL /SC) m in VIN _SET (ref ) m ax Normal operation and high temperature current reduction range Figure 11 Data Sheet Voltage domains for IN_SET pin, if ST pin is connected to GND 13 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL ST Pin 7 ST Pin The ST pin is a multiple function pin. IST(OL/SC) VST(OL/SC) No fault Fault Output Control ST No fault Fault VST IST(PD) Figure 12 Block Diagram ST pin 7.1 Diagnosis Selector If the voltage at the DEN pin VDEN is higher than VDEN(act), the diagnosis is activated. For details, please refer to Chapter 5. If the status pin is unconnected or connected to GND via a high ohmic resistor (VST to be below VST(L)), the ST pin acts as diagnosis output pin. In normal operation (device is activated) the ST pin is pulled to GND via the internal pull down current IST(PD). In case of an open load or short circuit to GND condition the ST pin is switched to VST(OL/SC) after the open load or short circuit detection filter time (Pos. 8.3.9, Pos. 8.3.12). If the device is operated in PWM operation via the VS pin the ST pin should be connected to GND via a high ohmic resistor (e.g. 470 kΩ) to ensure proper device behavior during fast rising VS slope. If the ST pin is shorted to GND the diagnostic feedback is performed via the IN_SET-pin, which is shown in Chapter 6.2 and Chapter 8. 7.2 Diagnosis Output If the status pin is unconnected or connected to GND via a high ohmic resistor (VST to be below VST(L)), it acts as a diagnostic output, if the voltage at the DEN pin is above VDEN(act). In case of a fault condition the ST pin rises its voltage to VST(OL/SC) (Pos. 8.3.7). Details are shown in Chapter 8. 7.3 Disable Input If an external voltage higher than VST(H) (Pos. 8.3.5) is applied to the ST pin, the device is switched off. This function is working independently of the voltage at the DEN pin. Even if the diagnosis is disabled via VDEN < VDEN(dis) the disable function of the ST pin is working. This function is used for applications, where multiple drivers should be used for one light function. It is possible to combine the drivers’ fault diagnosis via the ST pins. If a single LED chain fails, the entire light function is switched off. In this scenario e.g. the diagnostic circuit on the body control module can easily distinguish between the two cases (normal load or load fault), because nearly no current is flowing into the LED module during the fault scenario - the drivers consume a current of IS(fault,STu) (Pos. 5.1.4) or IS(dis,ST) (Pos. 5.1.2). Data Sheet 14 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL ST Pin As soon as one LED chain fails, the ST-pin of this device is switched to VST(OL/SC). The other devices used for the same light function can be connected together via the ST pins. This leads to a switch off of all devices connected together. Application examples are shown in Chapter 10. V ST IOU T tON (ST) tOFF( ST) t 100% 80% 20% t Figure 13 Data Sheet Switching times via ST Pin 15 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL Load Diagnosis 8 Load Diagnosis The diagnosis function is enabled, if the voltage at the DEN pin VDEN is above VDEN(act) as described in Chapter 5. 8.1 Open Load An open load diagnosis feature is integrated in the TLD1124EL driver IC. If there is an open load on the output, the output is turned off. The potential on the IN_SET pin rises up to VIN_SET(OL/SC). This high voltage can be used as input signal for an µC as shown in Figure 8. The open load status is not latched, as soon as the open load condition is no longer present, the output stage will be turned on again. An open load condition is detected, if the voltage drop over the output stage VPS is below the threshold according Pos. 8.3.10 and a filter time of tOL is passed. V IN_ SET VIN _SET( OL /SC) VIN_ SET( ref ) tOL tIN _SET (re se t) VOU T t VS V S – VPS(OL ) VF open load occurs open load disappears t Figure 14 Data Sheet IN_SET behavior during open load condition with ST pin connected to GND and VDEN > VDEN(act) 16 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL Load Diagnosis VIN _SET VIN _SET( ref ) t VST V ST( OL /SC) tOL tIN_ SET(re se t) VOU T t VS VS – VPS( OL) VF open load occurs open load disappears t Figure 15 IN_SET and ST behavior during open load condition (ST unconnected) and VDEN > VDEN(act) 8.2 Short Circuit to GND detection The TLD1124EL has an integrated SC to GND detection. If the output stage is turned on and the voltage at the output falls below VOUT(SC) the potential on the IN_SET pin is increased up to VIN_SET(OL/SC) after tSC, if the ST pin is connected to GND. If the ST is open or connected to GND via a high ohmic resistor the fault is indicated on the ST pin according to Chapter 7 after tSC. More details are shown in Figure 17. This condition is not latched. For detecting a normal condition after a short circuit detection an output current according to IOUT(SC) is driven by the channel. Data Sheet 17 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL Load Diagnosis VIN _SET VIN _SET( OL /SC) VIN _SET (ref ) VOU T tSC t tIN_ SET( re se t) VF VOUT (SC) t short circuit occurs Figure 16 short circuit disappears IN_SET behavior during short circuit to GND condition with ST connected to GND and VDEN > VDEN(act) V IN_ SET V IN_ SET(ref ) t V ST VST (OL /SC) V OU T tSC tIN _SET (re se t) t VF V OUT (SC) t short circuit occurs Figure 17 Data Sheet short circuit disappears IN_SET and ST behavior during short circuit to GND condition (ST unconnected) and VDEN > VDEN(act) 18 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL Load Diagnosis 8.3 Electrical Characteristics IN_SET Pin and Load Diagnosis Electrical Characteristics IN_SET pin and Load Diagnosis Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40°C to +150°C, RSET = 12 kΩ, VDEN = 5.5 V, all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Unit Conditions Min. Typ. Max. 8.3.1 IN_SET reference voltage VIN_SET(ref) 1.19 1.23 1.27 V 1) 8.3.2 IN_SET open load/short circuit voltage VIN_SET(OL/SC) 4 – 5.5 V 1) 8.3.3 IN_SET open load/short circuit current IIN_SET(OL/SC) 1.5 – 7.4 mA 1) 8.3.4 ST device turn on threshold (active low) in case of voltage applied from external (ST-pin acting as input) VST(L) 0.8 – – V – 8.3.5 ST device turn off threshold (active low) in case of voltage applied from external (ST-pin acting as input) VST(H) – – 2.5 V – 8.3.6 ST pull down current IST(PD) ST open load/short circuit VST(OL/SC) – – 15 µA 4 – 5.5 V 8.3.8 ST open load/short circuit IST(OL/SC) current (ST-pin acting as diagnosis output) 100 – 220 µA 8.3.9 OL detection filter time 10 22 35 µs 8.3.10 OL detection voltage VPS(OL) = VS - VOUT tOL VPS(OL) 0.2 – 0.4 V VST= 0.8 V 1) VS > 8 V Tj = 25...150 °C RST = 470 kΩ VS = VOUT (OL) or VOUT = 0 V (SC) 1) VS > 8 V Tj = 25...150 °C VST = 2.5 V VS = VOUT (OL) or VOUT = 0 V (SC) 1) VS > 8 V VS > 8 V 8.3.11 Short circuit to GND detection threshold VOUT(SC) 0.8 – 1.4 V VS > 8 V 8.3.12 SC detection filter time 10 22 35 µs 1) 8.3.13 IN_SET diagnosis reset time tSC tIN_SET(reset) – 5 20 µs 1) 8.3.7 Limit Values voltage (ST-pin acting as diagnosis output) Data Sheet 19 VOUT = 3.6 V Tj = 25...115 °C VS > 8 V Tj = 25...150 °C VS = VOUT (OL) or VOUTx = 0 V (SC) VS > 8 V Tj = 25...150 °C VIN_SET = 4 V VS = VOUT (OL) or VOUT = 0 V (SC) VS > 8 V VS > 8 V Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL Load Diagnosis Electrical Characteristics IN_SET pin and Load Diagnosis (cont’d) Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40°C to +150°C, RSET = 12 kΩ, VDEN = 5.5 V, all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Typ. Max. Unit Conditions 8.3.14 SC detection current in case of unconnected STpin IOUT(SC,STu) 100 200 300 µA VS > 8 V VOUT= 0 V 8.3.15 SC detection current in case of ST-pin shorted to GND IOUT(SC,STG) 0.1 2 4.75 mA VS > 8 V VOUT= 0 V VST = 0 V 8.3.16 IN_SET activation current without turn on of output stage IIN_SET(act) 2 – 15 µA See Figure 10 1) Not subject to production test, specified by design Data Sheet 20 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL Power Stage 9 Power Stage The output stage is realized as high side current source with a current of 360 mA. During off state the leakage current at the output stage is minimized in order to prevent a slightly glowing LED. The maximum current of the channel is limited by the power dissipation and used PCB cooling areas (which results in the applications RthJA). For an operating current control loop the supply and output voltages according to the following parameters have to be considered: • • • Required supply voltage for current control VS(CC), Pos. 5.1.7 Voltage drop over output stage during current control VPS(CC), Pos. 9.2.6 Required output voltage for current control VOUT(CC), Pos. 9.2.7 9.1 Protection The device provides embedded protective functions, which are designed to prevent IC destruction under fault conditions described in this data sheet. Fault conditions are considered as “outside” normal operating range. Protective functions are neither designed for continuous nor for repetitive operation. 9.1.1 Over Load Behavior An over load detection circuit is integrated in the LITIX™ Basic IC. It is realized by a temperature monitoring of the output stage (OUT). As soon as the junction temperature exceeds the current reduction temperature threshold Tj(CRT) the output current will be reduced by the device by reducing the IN_SET reference voltage VIN_SET(ref). This feature avoids LED’s flickering during static output overload conditions. Furthermore, it protects LEDs against over temperature, which are mounted thermally close to the device. If the device temperature still increases, the output current decreases close to 0 A. As soon as the device cools down the output current rises again. IOU T V IN_ SET Tj (C R T) Figure 18 Tj Output current reduction at high temperature Note: This high temperature output current reduction is realized by reducing the IN_SET reference voltage voltage (Pos. 8.3.1). In case of very high power loss applied to the device and very high junction temperature the output current may drop down to IOUT = 0 mA, after a slight cooling down the current increases again. 9.1.2 Reverse Battery Protection The TLD1124EL has an integrated reverse battery protection feature. This feature protects the driver IC itself, but also connected LEDs. The output reverse current is limited to IOUTx(rev) by the reverse battery protection. Data Sheet 21 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL Power Stage Note: Due to the reverse battery protection a reverse protection diode for the light module may be obsolete. In case of high ISO-pulse requirements and only minor protecting components like capacitors a reverse protection diode may be reasonable. The external protection circuit needs to be verified in the application. 9.2 Electrical Characteristics Power Stage Electrical Characteristics Power Stage Unless otherwise specified: VS = 5.5 V to 18 V, Tj = -40°C to +150°C, VOUT = 3.6 V, all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. 9.2.1 Output leakage current Typ. Unit Conditions µA IIN_SET = 0 µA VOUT = 2.5 V Tj = 150 °C 1) Tj = 85 °C Max. IOUT(leak) – – – – 21 9 9.2.2 Output leakage current in boost over battery setup -IOUT(leak,B2B) – – 150 µA 1) 9.2.3 Reverse output current -IOUT(rev) – – 3 µA 1) 9.2.4 Output current accuracy limited temperature range kLT VS = -16 V Output load: LED with break down voltage < -0.6 V 1) 2092 1935 9.2.5 IIN_SET = 0 µA VOUT = VS = 40 V 2250 2250 Tj = 25...115 °C VS = 8...18 V VPS = 2 V RSET = 6...12 kΩ RSET = 30 kΩ 2408 2565 1) Output current accuracy over kALL temperature 2092 1935 2250 2250 2408 2565 Tj = -40...115 °C VS = 8...18 V VPS = 2 V RSET = 6...12 kΩ RSET = 30 kΩ 1) 9.2.6 Voltage drop over power stage during current control VPS(CC) = VS - VOUT VPS(CC) 0.75 – – V VS = 13.5 V RSET = 12 kΩ IOUT ≥ 90% of (kLT(typ)/RSET) 9.2.7 Required output voltage for current control VOUT(CC) 2.3 – – V 1) VS = 13.5 V RSET = 12 kΩ IOUT ≥ 90% of (kLT(typ)/RSET) 9.2.8 Maximum output current IOUT(max) 360 – – mA RSET = 4.7 kΩ The maximum output current is limited by the thermal conditions. Please refer to Pos. 4.3.1 Pos. 4.3.3 9.2.9 ST turn on time tON(ST) – – 15 µs 2) Data Sheet 22 VS = 13.5 V RSET = 12 kΩ ST → L IOUT = 80% of (kLT(typ)/RSET) Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL Power Stage Electrical Characteristics Power Stage (cont’d) Unless otherwise specified: VS = 5.5 V to 18 V, Tj = -40°C to +150°C, VOUT = 3.6 V, all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Typ. Max. Unit Conditions 9.2.10 ST turn off time tOFF(ST) – – 10 µs 2) 9.2.11 IN_SET turn on time tON(IN_SET) – – 15 µs VS = 13.5 V IIN_SET = 0 → 100 µA IOUT = 80% of (kLT(typ)/RSET) 9.2.12 IN_SET turn off time tOFF(IN_SET) – – 10 µs VS = 13.5 V IIN_SET = 100 → 0 µA IOUT = 20% of (kLT(typ)/RSET) 9.2.13 Current reduction temperature threshold Tj(CRT) – 140 – °C 1) – A 1) IOUT(CRT) Output current during 85% of – current reduction at high (kLT(typ)/ temperature RSET) 1) Not subject to production test, specified by design 9.2.14 VS = 13.5 V RSET = 12 kΩ ST →H IOUT = 20% of (kLT(typ)/RSET) IOUT = 95% of (kLT(typ)/RSET) RSET = 12 kΩ Tj = 150 °C 2) see also Figure 13 Data Sheet 23 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL Application Information 10 Application Information Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. 4.7nF** VS CVS =4.7nF ISO-Pulse protection circuit depending on requirement s Internal supply IN_SET Current adjustment TLD1124EL * In case PWM via VS is performed ** For EMI improvement if required Figure 19 OUT St atus GND Diagnosis enable ST DEN Output control 470kΩ* RSET Thermal protection CST =100pF** GND Cmod =2.2µF VBATT to ot her LITIX™ Basic Application Diagram Note: This is a very simplified example of an application circuit. In case of high ISO-pulse requirements a reverse protection diode may be used for LED protection. The function must be verified in the real application. 10.1 • Further Application Information For further information you may contact http://www.infineon.com/ Data Sheet 24 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL Package Outlines 11 Package Outlines 0.19 +0.06 0.08 C 0.15 M C A-B D 14x 0.64 ±0.25 1 8 1 7 0.2 M D 8x Bottom View 3 ±0.2 A 14 6 ±0.2 D Exposed Diepad B 0.1 C A-B 2x 14 7 8 2.65 ±0.2 0.25 ±0.05 2) 0.1 C D 8˚ MAX. C 0.65 3.9 ±0.11) 1.7 MAX. Stand Off (1.45) 0 ... 0.1 0.35 x 45˚ 4.9 ±0.11) Index Marking 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Does not include dambar protrusion Dimensions in mm PG-SSOP-14-1,-2,-3-PO V02 Figure 20 PG-SSOP-14 Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). For further information on alternative packages, please visit our website: http://www.infineon.com/packages. Data Sheet 25 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL Revision History 12 Revision History Revision Date Changes 1.0 2013-08-08 Inital revision of data sheet 1.1 2015-03-19 Updated parameters KLT and KALL in the chapter Power Stage 1.2 2018-04-26 Updated to latest template 1.2 2018-04-26 Updated application drawing 1.2 2018-04-26 Updated package marking 1.2 2018-04-26 Updated package figure Data Sheet 26 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1124EL Table of Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 3.1 3.2 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 4.1 4.2 4.3 General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 5.1 DEN Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electrical Characteristics Internal Supply / DEN Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6 6.1 6.2 IN_SET Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Output Current Adjustment via RSET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Smart Input Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7 7.1 7.2 7.3 ST Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Diagnosis Selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Diagnosis Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Disable Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 14 14 14 8 8.1 8.2 8.3 Load Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Open Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Short Circuit to GND detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics IN_SET Pin and Load Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 16 17 19 9 9.1 9.1.1 9.1.2 9.2 Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Over Load Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reverse Battery Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 21 21 21 22 10 10.1 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 11 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 12 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Data Sheet 27 Rev. 1.2 2018-04-26 Trademarks All referenced product or service names and trademarks are the property of their respective owners. Edition 2018-04-26 Published by Infineon Technologies AG 81726 Munich, Germany © 2018 Infineon Technologies AG. All Rights Reserved. Do you have a question about any aspect of this document? Email: erratum@infineon.com Document reference TLD1124EL IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ("Beschaffenheitsgarantie"). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer's compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer's products and any use of the product of Infineon Technologies in customer's applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer's technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.