TLD1314EL

LITIX™ Basic TLD1314EL 3 Channel High-Side Current Source 1 Package PG-SSOP-14 Marking TLD1314 Overview Applications • Exterior LED lighting applications such as tail/brake light, turn indicator, position light, side marker,... • Interior LED lighting applications such as ambient lighting, interior illumination and dash board lighting. Internal supply Current adjustment TLD1314EL * In case PWM via VS is performed ** For EMI improvement if required 4.7nF** OUT2 OUT1 Status GND IN_SET CST =100pF** Diagnosis enable ST DEN OUT3 Output control 470kΩ* RSET Thermal protection 4.7nF** ISO-Pulse protection circuit depending on requirements 4.7nF** VS GND CVS =4.7nF Cmod =2.2µF VBATT to other LITIX™ Basic Application Diagram with TLD1314EL Data Sheet www.infineon.com Rev. 1.2 2018-04-26 LITIX™ Basic TLD1314EL Overview Basic Features • 3 Channel device with integrated output stages (current sources), optimized to drive LEDs with output current up to 120 mA per channel • Low current consumption • PWM-operation supported via VS-pin • Output current adjustable via external low power resistor and possibility to connect PTC resistor for LED protection during over temperature conditions • Reverse polarity protection and overload protection • Undervoltage detection • Open load and short circuit to GND diagnosis • Wide temperature range: -40°C < Tj < 150°C • PG-SSOP-14 package with exposed heatslug Description The LITIX™ Basic TLD1314EL is a three channel high side driver IC with integrated output stages. It is designed to control LEDs with a current up to 120 mA. In typical automotive applications the device is capable to drive i.e. 3 red LEDs per chain (total 9 LEDs) with a current up to 60 mA, which is limited by thermal cooling aspects. The output current is controlled practically independent of load and supply voltage changes. Table 1 Product Summary Parameter Symbol Value Operating voltage range VS(nom) 5.5 V ... 40 V Maximum voltage VS(max) VOUTx(max) 40 V Nominal output (load) current IOUTx(nom) 60 mA when using a supply voltage range of 8 V - 18 V (e.g. Automotive car battery). Currents up to IOUT(max) possible in applications with low thermal resistance RthJA Maximum output (load) current IOUTx(max) 120 mA; depending on thermal resistance RthJA Output current accuracy at RSET = 12 kΩ kLT 750 ± 7% Protective Functions • ESD protection • Under voltage lock out • Over Load protection • Over Temperature protection • Reverse Polarity protection Diagnostic Functions • Diagnosis enable function • OL detection • SC to Vs (indicated by OL diagnosis) • SC to GND detection Data Sheet 2 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1314EL Block Diagram Block Diagram VS 2 Internal supply IN_SET Diagnosis enable Current adjustment TLD1314EL Figure 1 Data Sheet OUT2 OUT1 Status ST DEN Output control GND Thermal protection OUT3 Basic Block Diagram 3 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1314EL Pin Configuration 3 Pin Configuration 3.1 Pin Assignment Figure 2 Data Sheet VS 1 VS 2 DEN 3 NC 4 NC 14 NC 13 OUT3 12 OUT2 11 OUT1 5 10 ST IN_SET 6 9 GND NC 7 8 NC TLD1314EL EP Pin Configuration 4 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1314EL Pin Configuration 3.2 Pin Definitions and Functions Pin Symbol Input/ Output Function 1, 2 VS – Supply Voltage; battery supply, connect a decoupling capacitor (100 nF - 1 µF) to GND 3 DEN I Diagnosis enable pin 4 NC – Pin not connected 5 NC – Pin not connected 6 IN_SET I/O Input / SET pin; Connect a low power resistor to adjust the output current 8 NC – Pin not connected 9 GND – 1) 10 ST I/O Status pin 11 OUT1 O Output 1 12 OUT2 O Output 2 13 OUT3 O Output 3 14 NC – Pin not connected – 1) Exposed Pad GND Ground Exposed Pad; connect to GND in application 1) Connect all GND-pins together. Data Sheet 5 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1314EL General Product Characteristics 4 General Product Characteristics 4.1 Absolute Maximum Ratings Absolute Maximum Ratings 1) Tj = -40°C to +150°C; all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Max. Unit Conditions Voltages 4.1.1 Supply voltage VS -16 40 V – 4.1.2 Diagnosis enable voltage DEN VDEN -16 40 V – 4.1.3 Diagn. enable voltage DEN related to VS VDEN(VS) VS - 40 VS + 16 V – 4.1.4 Diagn. enable voltage DEN related to VOUTx VDEN - VOUTx VDEN VOUTx -16 40 V – 4.1.5 Output voltage VOUTx -1 40 V – 4.1.6 Power stage voltage VPS = VS - VOUTx VPS -16 40 V – 4.1.7 IN_SET voltage VIN_SET -0.3 6 V – 4.1.8 Status voltage VST -0.3 6 V – 4.1.9 IN_SET current IIN_SET – – 2 8 mA – Diagnosis output 4.1.10 Output current IOUTx – 130 mA – Currents Temperatures 4.1.11 Junction temperature Tj -40 150 °C – 4.1.12 Storage temperature Tstg -55 150 °C – ESD Susceptibility 4.1.13 ESD resistivity to GND VESD -2 2 kV Human Body Model (100 pF via 1.5 kΩ)2) 4.1.14 ESD resistivity all pins to GND VESD -500 500 V CDM3) 4.1.15 ESD resistivity corner pins to GND VESD -750 750 V CDM3) 1) Not subject to production test, specified by design 2) ESD susceptibility, Human Body Model “HBM” according to ANSI/ESDA/JEDEC JS-001-2011 3) ESD susceptibility, Charged Device Model “CDM” according to JESD22-C101E Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. Data Sheet 6 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1314EL General Product Characteristics Functional Range 4.2 Pos. Parameter Symbol Limit Values Min. Max. Unit Conditions 4.2.16 Supply voltage range for normal operation VS(nom) 5.5 40 V – 4.2.17 Power on reset threshold VS(POR) – 5 V RSET = 12 kΩ IOUTx = 80% IOUTx(nom) VOUTx = 2.5 V 4.2.18 Junction temperature Tj -40 150 °C – Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table. Thermal Resistance 4.3 Pos. Parameter Symbol 4.3.1 Junction to Case RthJC 4.3.2 Junction to Ambient 1s0p board RthJA1 4.3.3 1) 2) 3) 4) Junction to Ambient 2s2p board Limit Values Min. Typ. Max. – 8 10 – – 61 56 Unit Conditions K/W 1) 2) K/W 1) 3) – – Ta = 85 °C Ta = 135 °C K/W RthJA2 1) 4) – 45 – Ta = 85 °C – 43 – Ta = 135 °C Not subject to production test, specified by design. Based on simulation results. Specified RthJC value is simulated at natural convection on a cold plate setup (all pins and the exposed Pad are fixed to ambient temperature). Ta = 85°C, Total power dissipation 1.5 W. The RthJA values are according to Jedec JESD51-3 at natural convection on 1s0p FR4 board. The product (chip + package) was simulated on a 76.2 x 114.3 x 1.5 mm3 board with 70 µm Cu, 300 mm2 cooling area. Total power dissipation 1.5 W distributed statically and homogenously over all power stages. The RthJA values are according to Jedec JESD51-5,-7 at natural convection on 2s2p FR4 board. The product (chip + package) was simulated on a 76.2 x 114.3 x 1.5 mm3 board with 2 inner copper layers (outside 2 x 70 µm Cu, inner 2 x 35 µm Cu). Where applicable, a thermal via array under the exposed pad contacted the first inner copper layer. Total power dissipation 1.5 W distributed statically and homogenously over all power stages. Data Sheet 7 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1314EL DEN Pin 5 DEN Pin The DEN pin is a single function pin: DEN Output Control IDEN Figure 3 VDEN Block Diagram DEN pin This pin is used to activate or deactivate the device internal diagnosis functions. The diagnostic functions are described in Chapter 6.2, Chapter 7 and Chapter 8. The diagnosis is activated, if the voltage applied at the DEN pin VDEN is higher than VDEN(act). The diagnosis is disabled for voltages below VDEN(dis). A possibility to use the DEN pin is via a Zener diode, which is connected between VS and DEN pin. A circuit example is shown in the application information section Chapter 10. The diagnosis is activated, if the following condition is fulfilled: (1) V S  VDEN  act  + VZD The current consumption on the DEN pin has to be considered for the total device current consumption. The current is specified in Pos. 5.1.8. The typical current consumption IDEN(H) as a function of the supply voltage VS for a Zener diode voltage of VZD = 6 V is shown in the following diagram. Typical IDEN=f(VS) with (VS-VDEN)=6V 160 140 120 IDEN [µA] 100 80 Tj=-40°C Tj=25°C 60 Tj=150°C 40 20 0 0 2 4 6 8 10 12 14 16 18 VS [V] Figure 4 Typical IDEN(H) current for a Zener diode voltage of 6 V The device and channel turn on is independent of the VDEN-voltage. After applying a supply voltage the device is activated after the power on reset time tPOR. Data Sheet 8 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1314EL DEN Pin VS tPOR IOU T 100% 80% t Figure 5 Power on reset The DEN voltage VDEN does not influence the disable function via the ST pin. If VDEN < VDEN(dis) the device can still be disabled via the ST pin, if VST > VST(H). For details, please refer to Chapter 7.3. 5.1 Electrical Characteristics Internal Supply / DEN Pin Electrical Characteristics Internal Supply / DEN pin Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40°C to +150°C, RSET = 12 kΩ all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Typ. Max. Unit Conditions 1) 5.1.1 Current consumption, active mode IS(on) – – 1.9 mA IIN_SET = 0 µA Tj < 105 °C VS = 18 V VOUTx = 3.6V 5.1.2 Current consumption, device disabled via ST IS(dis,ST) – – 1.7 mA 1) VS = 18 V Tj < 105 °C VST = 5 V 5.1.3 Current consumption, IS(dis,IN_SET) device disabled via IN_SET – – 1.7 mA 1) 5.1.4 Current consumption, IS(fault,STu) active mode in single fault detection condition with ST-pin unconnected – – 2.1 mA Data Sheet 9 VS = 18 V Tj < 105 °C VIN_SET = 5 V 1) VS = 18 V Tj < 105 °C RSET = 12 kΩ VOUTx = 18 V or 0 V Rev. 1.2 2018-04-26 LITIX™ Basic TLD1314EL DEN Pin Electrical Characteristics Internal Supply / DEN pin (cont’d) Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40°C to +150°C, RSET = 12 kΩ all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Typ. Max. Unit Conditions 1) 5.1.5 Current consumption, IS(fault,STG) active mode in single fault detection condition with ST-pin connected to GND – – 6.2 mA VS = 18 V Tj < 105 °C RSET = 12 kΩ VOUTx = 18 V or 0 V VST = 0 V 5.1.6 Power-on reset delay time tPOR – – 25 µs 3) VS = 0 →13.5 V VOUTx(nom) = 3.6 ± 0.3V IOUTx = 80% IOUTx(nom) 5.1.7 Required supply voltage for current control VS(CC) – – 5.5 V VOUTx = 3.6 V IOUTx ≥ 90% IOUTx(nom) 5.1.8 DEN high input current IDEN(H) mA Tj < 105 °C VS = 13.5 V, VDEN = 5.5 V VS = 18 V, VDEN = 5.5 V VS = 18 V, VDEN = 12 V VS = VDEN = 18 V V VS = 8...18 V 5.1.9 2) DEN activation threshold (diagnosis enabled above VDEN(act)) VDEN(act) – – – – – – – – 0.1 0.1 0.2 0.4 2.45 – 3.2 5.1.10 DEN deactivation 1.5 – 2.3 V VS = 8...18 V VDEN(dis) threshold (diagnosis disabled below VDEN(dis)) 1) The total device current consumption is the sum of the currents IS and IDEN(H), please refer to Pos. 5.1.8 2) See also Figure 4 3) Not subject to production test, specified by design Data Sheet 10 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1314EL IN_SET Pin 6 IN_SET Pin The IN_SET pin is a multiple function pin for output current definition, input and diagnostics: Logic IN_SET high impedance IIN_SET VIN_SET VIN_SET(OL/SC) GND Figure 6 Block Diagram IN_SET pin 6.1 Output Current Adjustment via RSET The output current for all three channels can only be adjusted simultaneously. The current adjustment can be done by placing a low power resistor (RSET) at the IN_SET pin to ground. The dimensioning of the resistor can be done using the formula below: kR SET = ---------I OUT (2) The gain factor k (RSET * output current) is specified in Pos. 9.2.4 and Pos. 9.2.5. The current through the RSET is defined by the resistor itself and the reference voltage VIN_SET(ref), which is applied to the IN_SET during supplied device. 6.2 Smart Input Pin The IN_SET pin can be connected via RSET to the open-drain output of a µC or to an external NMOS transistor as described in Figure 7 This signal can be used to turn off the output stages of the IC. A minimum IN_SET current of IIN_SET(act) is required to turn on the output stages. This feature is implemented to prevent glimming of LEDs caused by leakage currents on the IN_SET pin, see Figure 10 for details. In addition, the IN_SET pin offers the diagnostic feedback information, if the status pin is connected to GND and VDEN > VDEN(act) (refer to Chapter 5). Another diagnostic possibility is shown in Figure 8, where the diagnosis information is provided via the ST pin (refer to Chapter 7 and Chapter 8) to a micro controller In case of a fault event with the ST pin connected to GND the IN_SET voltage is increased to VIN_SET(OL/SC) Pos. 8.3.2. Therefore, the device has two voltage domains at the IN_SET-pin, which is shown in Figure 11. Data Sheet 11 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1314EL IN_SET Pin Microcontroller (e.g. XC866) OUT RSET/2 RSET/2 IN_SET Current adjust Status Basic LED Driver ST GND IN VDDP = 5 V Figure 7 Schematics IN_SET interface to µC, diagnosis via IN_SET pin Microcontroller (e.g. XC866) OUT RSET IN_SET Current adjust Status Basic LED Driver ST GND IN VDDP = 5 V Figure 8 optional Schematics IN_SET interface to µC, diagnosis via ST pin The resulting switching times are shown in Figure 9: IIN_ SET IOU T tON (IN_ SET ) tOFF(IN _ SET) t 100% 80% 20% t Figure 9 Data Sheet Switching times via IN_SET 12 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1314EL IN_SET Pin IOUT [mA] k = IOUTx * VIN_SET(ref) / IIN_SETx IOUTx IIN_SET(ACT) Figure 10 IIN_SETx IIN_SET [µA] IOUT versus IINSET V IN_ SET VIN _SET( OL /SC)m ax Diagnostic voltage range V IN_ SET(OL /SC) m in VIN _SET (ref ) m ax Normal operation and high temperature current reduction range Figure 11 Data Sheet Voltage domains for IN_SET pin, if ST pin is connected to GND 13 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1314EL ST Pin 7 ST Pin The ST pin is a multiple function pin. IST(OL/SC) VST(OL/SC) No fault Fault Output Control ST No fault Fault VST IST(PD) Figure 12 Block Diagram ST pin 7.1 Diagnosis Selector If the voltage at the DEN pin VDEN is higher than VDEN(act), the diagnosis is activated. For details, please refer to Chapter 5. If the status pin is unconnected or connected to GND via a high ohmic resistor (VST to be below VST(L)), the ST pin acts as diagnosis output pin. In normal operation (device is activated) the ST pin is pulled to GND via the internal pull down current IST(PD). In case of an open load or short circuit to GND condition the ST pin is switched to VST(OL/SC) after the open load or short circuit detection filter time (Pos. 8.3.9, Pos. 8.3.12). If the device is operated in PWM operation via the VS pin the ST pin should be connected to GND via a high ohmic resistor (e.g. 470 kΩ) to ensure proper device behavior during fast rising VS slope. If the ST pin is shorted to GND the diagnostic feedback is performed via the IN_SET-pin, which is shown in Chapter 6.2 and Chapter 8. 7.2 Diagnosis Output If the status pin is unconnected or connected to GND via a high ohmic resistor (VST to be below VST(L)), it acts as a diagnostic output, if the voltage at the DEN pin is above VDEN(act). In case of a fault condition the ST pin rises its voltage to VST(OL/SC) (Pos. 8.3.7). Details are shown in Chapter 8. 7.3 Disable Input If an external voltage higher than VST(H) (Pos. 8.3.5) is applied to the ST pin, the device is switched off. This function is working independently of the voltage at the DEN pin. Even if the diagnosis is disabled via VDEN < VDEN(dis) the disable function of the ST pin is working. This function is used for applications, where multiple drivers should be used for one light function. It is possible to combine the drivers’ fault diagnosis via the ST pins. If a single LED chain fails, the entire light function is switched off. In this scenario e.g. the diagnostic circuit on the body control module can easily distinguish between the two cases (normal load or load fault), because nearly no current is flowing into the LED module during the fault scenario - the drivers consume a current of IS(fault,STu) (Pos. 5.1.4) or IS(dis,ST) (Pos. 5.1.2). Data Sheet 14 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1314EL ST Pin As soon as one LED chain fails, the ST-pin of this device is switched to VST(OL/SC). The other devices used for the same light function can be connected together via the ST pins. This leads to a switch off of all devices connected together. Application examples are shown in Chapter 10. V ST IOU T tON (ST) tOFF( ST) t 100% 80% 20% t Figure 13 Data Sheet Switching times via ST Pin 15 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1314EL Load Diagnosis 8 Load Diagnosis The diagnosis function is enabled, if the voltage at the DEN pin VDEN is above VDEN(act) as described in Chapter 5. 8.1 Open Load An open load diagnosis feature is integrated in the TLD1314EL driver IC. If there is an open load on one of the outputs, the outputs are turned off. The potential on the IN_SET pin rises up to VIN_SET(OL/SC), if the ST is connected to GND. This high voltage can be used as input signal for an µC as shown in Figure 8. If the ST pin is open or connected to GND via a high ohmic resistor, the ST pin rises to a high potential as described in Chapter 7. More details are shown in Figure 17. The open load status is not latched, as soon as the open load condition is no longer present, the output stage will be turned on again. An open load condition is detected, if the voltage drop over the output stage VPS is below the threshold according Pos. 8.3.10 and a filter time of tOL is passed. V IN_ SET VIN _SET( OL /SC) VIN_ SET( ref ) tOL tIN _SET (re se t) VOU T t VS V S – VPS(OL ) VF open load occurs open load disappears t Figure 14 Data Sheet IN_SET behavior during open load condition with ST pin connected to GND and VDEN > VDEN(act) 16 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1314EL Load Diagnosis VIN _SET VIN _SET( ref ) t VST V ST( OL /SC) tOL tIN_ SET(re se t) VOU T t VS VS – VPS( OL) VF open load occurs open load disappears t Figure 15 IN_SET and ST behavior during open load condition (ST unconnected) and VDEN > VDEN(act) 8.2 Short Circuit to GND detection The TLD1314EL has an integrated SC to GND detection. If the output stage is turned on and the voltage at the output falls below VOUT(SC) the potential on the IN_SET pin is increased up to VIN_SET(OL/SC) after tSC, if the ST pin is connected to GND. If the ST is open or connected to GND via a high ohmic resistor the fault is indicated on the ST pin according to Chapter 7 after tSC. More details are shown in Figure 17. This condition is not latched. For detecting a normal condition after a short circuit detection an output current according to IOUT(SC) is driven by the channel. Data Sheet 17 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1314EL Load Diagnosis VIN _SET VIN _SET( OL /SC) VIN _SET (ref ) VOU T tSC t tIN_ SET( re se t) VF VOUT (SC) t short circuit occurs Figure 16 short circuit disappears IN_SET behavior during short circuit to GND condition with ST connected to GND and VDEN > VDEN(act) V IN_ SET V IN_ SET(ref ) t V ST VST (OL /SC) V OU T tSC tIN _SET (re se t) t VF V OUT (SC) t short circuit occurs Figure 17 Data Sheet short circuit disappears IN_SET and ST behavior during short circuit to GND condition (ST unconnected) and VDEN > VDEN(act) 18 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1314EL Load Diagnosis Note: In applications, where 1 output of the LITIX™ Basic IC is not used, a zener diode can be connected to the output to avoid unintended open load or short circuit conditions. The zener voltage should be in the range of the LEDs’ forward voltage. 8.3 Electrical Characteristics IN_SET Pin and Load Diagnosis Electrical Characteristics IN_SET pin and Load Diagnosis Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40°C to +150°C, RSET = 12 kΩ, VDEN = 5.5 V, all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Unit Conditions 1) Min. Typ. Max. 1.19 1.23 1.27 V VOUTx = 3.6 V Tj = 25...115 °C 1) 8.3.1 IN_SET reference voltage 8.3.2 IN_SET open load/short VIN_SET(OL/SC) 4 circuit voltage – 5.5 V VS > 8 V Tj = 25...150 °C VS = VOUTx (OL) or VOUTx = 0 V (SC) 8.3.3 IN_SET open load/short IIN_SET(OL/SC) circuit current 1.5 – 7.4 mA 1) VS > 8 V Tj = 25...150 °C VIN_SET = 4 V VS = VOUTx (OL) or VOUT = 0 V (SC) 8.3.4 VST(L) ST device turn on threshold (active low) in case of voltage applied from external (ST-pin acting as input) 0.8 – – V – 8.3.5 VST(H) ST device turn off threshold (active low) in case of voltage applied from external (ST-pin acting as input) – – 2.5 V – 8.3.6 ST pull down current IST(PD) – – 15 µA VST = 0.8 V 8.3.7 ST open load/short circuit voltage (ST-pin acting as diagnosis output) VST(OL/SC) 4 – 5.5 V 1) VS > 8 V Tj = 25...150 °C RST = 470 kΩ VS = VOUTx (OL) or VOUT = 0 V (SC) 8.3.8 ST open load/short circuit current (ST-pin acting as diagnosis output) IST(OL/SC) 100 – 220 µA 1) VS > 8 V Tj = 25...150 °C VST = 2.5 V VS = VOUTx (OL) or VOUT = 0 V (SC) 8.3.9 OL detection filter time tOL 10 22 35 µs 1) Data Sheet VIN_SET(ref) Limit Values 19 VS > 8 V Rev. 1.2 2018-04-26 LITIX™ Basic TLD1314EL Load Diagnosis Electrical Characteristics IN_SET pin and Load Diagnosis (cont’d) Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40°C to +150°C, RSET = 12 kΩ, VDEN = 5.5 V, all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Typ. Max. Unit Conditions 8.3.10 OL detection voltage VPS(OL) = VS - VOUTx VPS(OL) 0.2 – 0.4 V VS > 8 V 8.3.11 Short circuit to GND detection threshold VOUT(SC) 0.8 – 1.4 V VS > 8 V 8.3.12 SC detection filter time tSC 10 22 35 µs 1) VS > 8 V VS > 8 V – 5 20 µs 1) SC detection current in IOUT(SC,STu) case of unconnected STpin 100 200 300 µA VS > 8 V VOUTx = 0 V SC detection current in case of ST-pin shorted to GND 0.1 2 4.75 mA VS > 8 V VOUTx = 0 V VST = 0 V – 15 µA See Figure 10 8.3.13 IN_SET diagnosis reset time 8.3.14 8.3.15 tIN_SET(reset) IOUT(SC,STG) 8.3.16 IN_SET activation IIN_SET(act) 2 current without turn on of output stages 1) Not subject to production test, specified by design Data Sheet 20 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1314EL Power Stage 9 Power Stage The output stages are realized as high side current sources with a current of 120 mA. During off state the leakage current at the output stage is minimized in order to prevent a slightly glowing LED. The maximum current of each channel is limited by the power dissipation and used PCB cooling areas (which results in the applications RthJA). For an operating current control loop the supply and output voltages according to the following parameters have to be considered: • • • Required supply voltage for current control VS(CC), Pos. 5.1.7 Voltage drop over output stage during current control VPS(CC), Pos. 9.2.6 Required output voltage for current control VOUTx(CC), Pos. 9.2.7 9.1 Protection The device provides embedded protective functions, which are designed to prevent IC destruction under fault conditions described in this data sheet. Fault conditions are considered as “outside” normal operating range. Protective functions are neither designed for continuous nor for repetitive operation. 9.1.1 Over Load Behavior An over load detection circuit is integrated in the LITIX™ Basic IC. It is realized by a temperature monitoring of the output stages (OUTx). As soon as the junction temperature exceeds the current reduction temperature threshold Tj(CRT) the output current will be reduced by the device by reducing the IN_SET reference voltage VIN_SET(ref). This feature avoids LED’s flickering during static output overload conditions. Furthermore, it protects LEDs against over temperature, which are mounted thermally close to the device. If the device temperature still increases, the three output currents decrease close to 0 A. As soon as the device cools down the output currents rise again. IOU T V IN_ SET Tj (C R T) Figure 18 Tj Output current reduction at high temperature Note: This high temperature output current reduction is realized by reducing the IN_SET reference voltage voltage (Pos. 8.3.1). In case of very high power loss applied to the device and very high junction temperature the output current may drop down to IOUTx = 0 mA, after a slight cooling down the current increases again. 9.1.2 Reverse Battery Protection The TLD1314EL has an integrated reverse battery protection feature. This feature protects the driver IC itself, but also connected LEDs. The output reverse current is limited to IOUTx(rev) by the reverse battery protection. Data Sheet 21 Rev. 1.2 2018-04-26 LITIX™ Basic TLD1314EL Power Stage Note: Due to the reverse battery protection a reverse protection diode for the light module may be obsolete. In case of high ISO-pulse requirements and only minor protecting components like capacitors a reverse protection diode may be reasonable. The external protection circuit needs to be verified in the application. 9.2 Electrical Characteristics Power Stage Electrical Characteristics Power Stage Unless otherwise specified: VS = 5.5 V to 18 V, Tj = -40°C to +150°C, VOUTx = 3.6 V, all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. 9.2.1 Output leakage current Typ. Unit Conditions µA IIN_SET = 0 µA VOUTx = 2.5 V Tj = 150 °C 1) Tj = 85 °C Max. IOUTx(leak) – – – – 7 3 9.2.2 Output leakage current in boost over battery setup – IOUTx(leak,B2B) – 50 µA 1) 9.2.3 Reverse output current -IOUTx(rev) – 1 µA 1) 9.2.4 Output current accuracy kLT limited temperature range – Output current accuracy over temperature VS = -16 V Output load: LED with break down voltage < - 0.6 V 1) 697 645 9.2.5 IIN_SET = 0 µA VOUTx = VS = 40 V 750 750 Tj = 25...115 °C VS = 8...18 V VPS = 2 V RSET = 6...12 kΩ RSET = 30 kΩ 803 855 1) kALL 697 645 750 750 803 855 Tj = -40...115 °C VS = 8...18 V VPS = 2 V RSET = 6...12 kΩ RSET = 30 kΩ 9.2.6 Voltage drop over power stage during current control VPS(CC) = VS - VOUTx VPS(CC) 0.75 – – V 1) 9.2.7 Required output voltage for current control VOUTx(CC) 2.3 – – V 1) Data Sheet 22 VS = 13.5 V RSET = 12 kΩ IOUTx ≥ 90% of (kLT(typ)/RSET) VS = 13.5 V RSET = 12 kΩ IOUTx ≥ 90% of (kLT(typ)/RSET) Rev. 1.2 2018-04-26 LITIX™ Basic TLD1314EL Power Stage Electrical Characteristics Power Stage (cont’d) Unless otherwise specified: VS = 5.5 V to 18 V, Tj = -40°C to +150°C, VOUTx = 3.6 V, all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Typ. Max. Unit Conditions 9.2.8 Maximum output current IOUT(max) 120 – – mA RSET = 4.7 kΩ The maximum output current is limited by the thermal conditions. Please refer to Pos. 4.3.1 - Pos. 4.3.3 9.2.9 ST turn on time tON(ST) – – 15 µs 2) VS = 13.5 V RSET = 12 kΩ ST → L IOUTx = 80% of (kLT(typ)/RSET) 9.2.10 ST turn off time tOFF(ST) – – 10 µs 2) VS = 13.5 V RSET = 12 kΩ ST →H IOUTx = 20% of (kLT(typ)/RSET) 9.2.11 IN_SET turn on time tON(IN_SET) – – 15 µs VS = 13.5 V IIN_SET = 0 → 100 µA IOUTx = 80% of (kLT(typ)/RSET) 9.2.12 IN_SET turn off time tOFF(IN_SET) – – 10 µs VS = 13.5 V IIN_SET = 100 → 0 µA IOUTx = 20% of (kLT(typ)/RSET) 9.2.13 Current reduction temperature threshold Tj(CRT) – 140 – °C 1) – A 9.2.14 Output current during IOUT(CRT) 85% of – current reduction at high (kLT(typ) temperature /RSET) 1) Not subject to production test, specified by design 2) see also Figure 13 Data Sheet 23 IOUTx = 95% of (kLT(typ)/RSET) 1) RSET = 12 kΩ Tj = 150 °C Rev. 1.2 2018-04-26 LITIX™ Basic TLD1314EL Application Information 10 Application Information Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. Vbat BCM PROFET VBB channel1 load current sense internal power supply logic open load detect ion IN1 IS1 ESD protection clamp for inductive load gate control & charge pump mult i step load current limitation OU T 1 temperature sensor SEN channel2 control and protection circuit equivalent to channel 1 IN2 IS2 OU T 2 R GND GN D VBATT Cmod =2.2µF VS ISO-Pulse protection circuit depending on requirements CVS =4.7nF VS Internal supply CVS =4.7nF DEN Diagnosis Output control enable Output control enable R SET LITIX™ Basic 4.7nF** 4.7nF** 4.7nF** OUT3 OUT2 OUT1 IN_ SET Current adjust Status Status GND Output control OUT1 IN_SET Current ST Diagnosis enable Thermal protection OUT2 OUT1 IN_SET Current adjust DEN 4.7nF** 4.7nF** 4.7nF** OUT3 Thermal protection OUT2 Internal supply CVS =4.7nF DEN Diagnosis 4.7nF** 4.7nF** 4.7nF** OUT3 Thermal protection VS Internal supply RSET LITIX™ Basic adjust Status ST GND RSET LITIX™ Basic VZD>VOUT( CC) Status Status ST ST GND R