OPTIREG™ Linear TLE4263-2ES
5 V low drop voltage regulator
Features
•
Output voltage tolerance ≤ ±2%
•
180 mA output current capability
•
Low-drop voltage
•
Very low standby current consumption
•
Overtemperature protection
•
Reverse polarity protection
•
Short-circuit proof
•
Adjustable reset threshold
•
Watchdog for monitoring microprocessor
•
Power-on and undervoltage reset with programmable delay time
•
Reset low down to VQ = 1V
•
Wide temperature range
•
Exposed pad package with excellent thermal behavior
•
Suitable for use in automotive electronics
•
Green Product (RoHS compliant)
Potential applications
General automotive applications.
Product validation
Qualified for automotive applications. Product validation according to AEC-Q100/101.
Description
The OPTIREG™ Linear TLE4263-2ES is a monolithic integrated very low dropout voltage regulator in a SMD
package PG-DSO-8 exposed pad, especially designed for automotive applications. An input voltage up to 45 V
is regulated to an output voltage of 5.0 V. The component is able to drive loads up to 180 mA. The IC is shortcircuit proof by the implemented current limitation and has an integrated overtemperature shutdown.
It additionally provides features like power-on and undervoltage reset with adjustable reset threshold, a
watchdog circuit for monitoring a connected microcontroller and an inhibit input for enabling or disabling the
component.
Datasheet
www.infineon.com/OPTIREG-Linear
1
Rev. 1.11
2019-10-21
OPTIREG™ Linear TLE4263-2ES
5 V low drop voltage regulator
The reset output RO is set to “low” in case the output voltage falls below the reset switching threshold VQ,rt.
This threshold can be decreased down to 3.5 V by an external resistor divider. The power-on reset delay time
can be programmed by the external delay capacitor CD.
The watchdog circuit provides a monitoring function for microcontrollers: At missing pulses on the
watchdog’s input W the reset output RO is set to “low”. The trigger time for the watchdog pulses can be set by
the external capacitor CD.
The IC can be switched off by the inhibit input, reducing the current consumption to typically 0 mA.
Type
Package
Marking
TLE4263-2ES
PG-DSO-8 exposed pad
4263-2
Datasheet
2
Rev. 1.11
2019-10-21
OPTIREG™ Linear TLE4263-2ES
5 V low drop voltage regulator
Table of contents
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Potential applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Product validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
3.1
3.2
3.3
General product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
4.1
4.2
4.3
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Choosing external components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5
5.1
5.2
5.3
5.4
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power-on reset delay time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reset adjust function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Datasheet
3
6
6
7
7
14
15
15
16
16
Rev. 1.11
2019-10-21
OPTIREG™ Linear TLE4263-2ES
5 V low drop voltage regulator
Block diagram
1
Block diagram
W
Saturation
Control and
Protection
Circuit
Temperature
Sensor
Input
Watchdog
Ι
Q
Control
Amplifier
Buffer
Bandgap
Reference
Reset
Generator
Output
D Reset
Delay
RO Reset
Output
RADJ Reset
Threshold
Adjustment
INH
Inhibit
Figure 1
Datasheet
GND
GND
AEB03068
Block diagram
4
Rev. 1.11
2019-10-21
OPTIREG™ Linear TLE4263-2ES
5 V low drop voltage regulator
Pin configuration
2
Pin configuration
I
1
8
Q
INH
2
7
W
RO
3
6
RADJ
GND
4
5
D
Figure 2
Pin configuration (top view)
Table 1
Pin definition and functions
Pin
Symbol
Function
1
I
Input
for compensating line influences, a capacitor to GND close to the IC terminals is
recommended
2
INH
Inhibit
enables/disables the device;
connect to I if the this function is not needed
3
RO
Reset Output
open-collector output connected to the output via an internal 30kΩ pull-up
resistor;
leave open if the this function is not needed
4
GND
Ground
5
D
Reset Delay Timing
connect a ceramic capacitor to GND for adjusting the reset delay time / watchdog
trigger time;
leave open if this function is not needed
6
RADJ
Reset Threshold Adjust
connect an external voltage divider to adjust the reset switching threshold;
connect to GND for using internal threshold
7
W
Watchdog
rising edge triggered input for monitoring a microcontroller;
connect to GND if this function is not needed
8
Q
Output
block to ground with a capacitor close to the IC terminals with a capacitance
value C ≥ 22 µF, ESR ≤ 3 Ω
PAD
–
Exposed Pad
attach the exposed pad on package bottom to the heatsink area on circuit board;
connect to GND
Datasheet
5
Rev. 1.11
2019-10-21
OPTIREG™ Linear TLE4263-2ES
5 V low drop voltage regulator
General product characteristics
3
General product characteristics
3.1
Absolute maximum ratings
Table 2
Absolute maximum ratings1)
Tj = -40°C to +150°C; all voltages with respect to ground (unless otherwise specified)
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit Note or
Test Condition
Number
VI
II
- 42
–
–
–
45
–
V
–
–
Internally limited
P_3.1.1
VRO
IRO
- 0.3
–
–
–
42
–
V
–
–
Internally limited
P_3.1.2
VRADJ
- 0.3
–
6
V
–
P_3.1.3
VD
ID
- 0.3
–
–
–
42
–
V
–
–
Internally limited
P_3.1.4
VQ
IQ
0.30
–
–
–
7.0
–
V
–
–
Internally limited
P_3.1.5
VINH
IINH
-42
–
–
–
45
–
V
–
–
Internally limited
P_3.1.6
VW
-0.3
–
6
V
–
P_3.1.7
IGND
-0.5
–
–
A
–
P_3.1.8
Tj
Tstg
–
-50
–
–
150
150
°C
°C
–
–
P_3.1.9
Voltage
–
–
2
kV
2)
P_3.1.10
kV
3)
P_3.1.11
Input I
Input voltage
Input current
Reset output RO
Input voltage
Input current
Reset threshold RADJ
Voltage
Reset delay D
Voltage
Current
Output Q
Voltage
Current
Inhibit INH
Input voltage
Input current
Watchdog W
Voltage
Ground GND
Current
Temperature
Junction temperature
Storage temperature
ESD susceptibility
Human body model (HBM)
Charged device model (CBM) Voltage
–
–
1
1) Not subject to production test, specified by design.
2) ESD HBM test according JEDEC JESD22-A114
3) ESD CDM test according AEC/ESDA ESD-STM5 3.1-1999
Datasheet
6
Rev. 1.11
2019-10-21
OPTIREG™ Linear TLE4263-2ES
5 V low drop voltage regulator
General product characteristics
Notes
1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
3.2
Functional range
Table 3
Functional range
Parameter
Symbol
Values
Unit Note or Test Condition Number
Min.
Typ.
Max.
Input voltage
VI
5.5
–
45
V
1)
P_3.2.1
Junction temperature
Tj
-40
–
150
°C
–
P_3.2.2
1) Corresponds with characteristics of drop voltage, output current and power description (see diagrams).
Note:
Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics
table.
3.3
Thermal resistance
Table 4
Thermal resistance
Parameter
Symbol
Junction to case
RthJC
Junction to ambient
RthJA
Junction to ambient
RthJA
Junction to ambient
RthJA
Junction to ambient
RthJA
Values
Unit Note or Test Condition
Min.
Typ.
Max.
–
10
–
–
–
–
–
45
153
64
55
–
–
–
–
K/W
1)
K/W
2)
K/W
K/W
K/W
Number
measured to exposed pad P_3.3.1
P_3.3.2
footprint only
3)
P_3.3.3
2
2)
P_3.3.4
2
2)
P_3.3.5
300 mm heatsink area
600 mm heatsink area
1) Not subject to production test, specified by design
2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The product
(Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 2 inner copper layers (2 × 70 µm Cu,
2 × 35 µm Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
3) Specified RthJA value is according to Jedec JESD 51-3 at natural convection on FR4 1s0p board; The product
(Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 × 70 µm Cu).
Datasheet
7
Rev. 1.11
2019-10-21
OPTIREG™ Linear TLE4263-2ES
5 V low drop voltage regulator
Functional description
4
Functional description
The control amplifier compares a reference voltage to a voltage that is proportional to the output voltage and
drives the base of the series transistor via a buffer. Saturation control as a function of the load current prevents
any oversaturation of the power element. The component also has a number of internal circuits for protection
against:
•
Overload
•
Overtemperature
•
Reverse polarity
In case the externally scaled down output voltage at the reset adjust input falls below 1.35 V, the external reset
delay capacitor CD is discharged by the reset generator. When the voltage of the capacitor reaches the lower
threshold VDRL, a reset signal occurs at the reset output and is held until the upper threshold VDU is exceeded.
If the reset threshold input is connected to GND, reset is triggered at an output voltage of typically 4.65 V.
4.1
Choosing external components
The input capacitor CI is necessary for compensation of line influences. Using a resistor of approx. 1 Ω in series
with CI, the oscillating circuit consisting of input inductivity and input capacitance can be damped. The output
capacitor is necessary for the stability of the regulating circuit. Stability is ensured at values CQ ≥ 22 µF and an
ESR of ≤ 3 Ω within the operating temperature range. For small tolerances of the reset delay the spread of the
capacitance of the delay capacitor and its temperature coefficient should be noted.
4.2
Electrical characteristics
Table 5
Electrical characteristics
VI = 13.5 V; VINH > 3.6 V Tj = -40°C to +150°C ; (unless specified otherwise)
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note or Test Condition
Number
Normal Operation
Output voltage
VQ
4.90
5.00
5.10
V
5 mA ≤ IQ ≤ 150 mA;
6 V ≤ VI ≤ 28 V
P_4.2.1
Output voltage
VQ
4.90
5.00
5.10
V
6 V ≤ VI ≤ 32 V;
IQ = 100 mA;
Tj = 100°C
P_4.2.2
180
250
400
mA
VQ = 4.8V
P_4.2.3
Output current limitation IQ,max
Current consumption;
Iq = II - IQ
Iq
–
0
10
µA
VINH = 0 V; TJ ≤ 115°C
P_4.2.4
Current consumption;
Iq = II - IQ
Iq
–
0.90
1.30
mA
IQ = 0 mA
P_4.2.5
Current consumption;
Iq = II - IQ
Iq
–
10
18
mA
IQ = 150 mA
P_4.2.6
Current consumption;
Iq = II - IQ
Iq
–
15
24
mA
IQ = 150 mA; VI = 4.5 V
P_4.2.7
Dropout voltage
Vdr
–
0.35
0.50
V
IQ = 150 mA 1)
P_4.2.8
Load regulation
∆VQ,lo
–
–
25
mV
IQ = 5 mA to 150 mA
P_4.2.9
Datasheet
8
Rev. 1.11
2019-10-21
OPTIREG™ Linear TLE4263-2ES
5 V low drop voltage regulator
Functional description
Table 5
Electrical characteristics (cont’d)
VI = 13.5 V; VINH > 3.6 V Tj = -40°C to +150°C ; (unless specified otherwise)
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note or Test Condition
Number
Line regulation
∆VQ.li
–
3
25
mV
VI = 6 V to 28 V;
IQ = 150 mA
P_4.2.10
Power supply ripple
rejection
PSRR
–
54
–
dB
2)
fr = 100 Hz;
Vr = 0.5 Vpp
P_4.2.11
Switching threshold
VQ,rt
4.5
4.65
4.8
V
VRADJ = 0 V
P_4.2.12
Reset adjust threshold
VRADJ,th
1.26
1.36
1.44
V
3.5V ≤ VQ < 5 V
P_4.2.13
Reset low voltage
VRO,l
–
0.10
0.40
V
IRO = 1 mA
P_4.2.14
Saturation voltage
VD,sat
–
50
110
mV
VQ < VRAD,th
P_4.2.15
Upper timing threshold
VDU
1.40
1.70
2.20
V
–
P_4.2.16
Lower reset timing
threshold
VDRL
0.20
0.35
0.59
V
–
P_4.2.17
Charge current
ID,ch
40
60
88
µA
–
P_4.2.18
Reset delay time
trd
1.3
2.8
4.1
ms
CD = 100 nF
P_4.2.19
Reset reaction time
trr
0.5
1.2
4.0
µs
CD = 100 nF
P_4.2.20
Discharge current
ID,wd
4.40
6.25
9.40
µA
VD = 1.0 V
P_4.2.22
Upper timing threshold
VDU
1.40
1.70
2.20
V
–
P_4.2.24
Lower timing threshold
VDWL
0.20
0.35
0.55
V
–
P_4.2.25
Watchdog trigger time
TWI,tr
16
22.5
27
ms
CD = 100 nF
VQ > VQ,RT
P_4.2.26
Watchdog output low
time
TWD,L
1.0
2.10
3.50
ms
CD = 100 nF
VQ > VQ,RT
P_4.2.27
Watchdog period
TWI,p = TWD,L + TWI,tr
TWD,p
17
24.6
30.5
ms
CD = 100 nF
VQ > VQ,RT
P_4.2.28
Switching voltage
VINH,ON
3.6
–
–
V
IC turned on
P_4.2.29
Turn-OFF voltage
VINH,OFF
–
–
0.8
V
IC turned off
P_4.2.30
Input current
IINH
5
10
27
µA
VINH = 5 V
P_4.2.31
Reset Generator
Watchdog
Inhibit
1) Drop voltage = Vi - VQ (measured when the output voltage has dropped 100 mV from the nominal value obtained at 6 V
input).
2) Not subject to production test, specified by design.
Note:
Datasheet
The reset output is “low” within the range VQ = 1 V to VQ,rt.
9
Rev. 1.11
2019-10-21
OPTIREG™ Linear TLE4263-2ES
5 V low drop voltage regulator
Functional description
4.3
Typical performance characteristics
Drop voltage VDR versus
output current IQ
Vdr
Current consumption Iq versus
output current IQ
AED03061
32
mA
Iq
28
AED03060_4263
800
mV
700
24
600
T j = 125 ˚C
25 ˚C
500
20
VI = 13.5 V
400
16
300
12
200
8
100
0
4
0
50
100 150
200
mA
300
0
IQ
Current consumption Iq versus
input voltage VI
Ιq
Datasheet
100 150
200
mA
300
Output voltage VQ versus
input voltage VI
AED01097
12
mA
VQ
V
25
10
20
8
R L = 25 Ω
15
6
10
4
5
2
0
50
IQ
AED01096
30
0
0
0
10
20
30
40 V 50
VΙ
10
R L = 25 Ω
0
2
4
6
8 V 10
VΙ
Rev. 1.11
2019-10-21
OPTIREG™ Linear TLE4263-2ES
5 V low drop voltage regulator
Functional description
Output current IQ versus
input voltage VI
Timing threshold voltage VDU and VDRL versus
junction temperature TJ
AED01091
300
ΙQ
mA
AED03062
3.2
V
V
2.8
T j = 25 C
250
VI = 13.5 V
2.4
200
2.0
150
VDU
1.6
1.2
100
0.8
VDRL
50
0.4
0
0
10
20
30
0
-40
40 V 50
VΙ
Reset switching threshold VRADJ versus
junction temperature TJ
1.0
10
0.8
8
0.6
6
0.4
4
0.2
2
40
80
0
-40
120 ˚C 160
Tj
Datasheet
120 ˚C 160
AED03063
16
µA
IINH
14
12
0
80
Current consumption of inhibit IINH versus
junction temperature TJ
1.2
0
-40
40
Tj
AED01088
1.6
VRADJ V
1.4
0
VINH = 5 V
0
40
80
120 ˚C 160
Tj
11
Rev. 1.11
2019-10-21
OPTIREG™ Linear TLE4263-2ES
5 V low drop voltage regulator
Functional description
Charge current and discharge current ID,ch ; ID,dis
versus junction temperature TJ
Ι
Output voltage VQ versus
junction temperature TJ
AED03064
80
μA
70
VQ
60
50
Ι D, ch
5.1
V Ι = 13.5 V
V D = 1.5 V
5.0
40
AED01090
5.2
V
VI = 13.5 V
4.9
30
4.8
20
0
-40
Datasheet
4.7
Ι D, dis
10
0
40
80
4.6
-40
120 C 160
Tj
0
40
80
120 ˚C 160
Tj
12
Rev. 1.11
2019-10-21
OPTIREG™ Linear TLE4263-2ES
5 V low drop voltage regulator
Functional description
Undervoltage reset adjust threshold VRADJ versus
output voltage VQ
Pulse time TWI,tr versus
junction temperature TJ
AED01098_4263
1.6
V RADJ V
1.4
1.2
30
1.0
25
V Ι = 13.5 V
0.8
20
0.6
15
0.4
10
0.2
5
0
0
1
3
2
0
-40
4 V 5
VQ
Power supply ripple rejection PSRR versus
ripple frequency fr
[dB]
0
40
80
120 C 160
Tj
2_ESR-IQ.VSD
100
IQ = 1 mA
IQ = 10 mA
IQ = 100 mA
PSRR
V Ι = 13.5 V
C D = 100 nF
Output capacitor series resistor ESR CQ versus
output current IQ
1_PSRR_F.SVG
80
AED03065_4263
40
ms
TWI,tr 35
CQ = 22 µF
Tj = -40...150 °C
ESR CQ
[Ω]
10
60
1
50
Stable
Region
40
30
10
Vripple = 1 V
VI = 13.5 V
CQ = 22 μF tantalum
Tj = 25 °C
100
1k
0.1
10k
0.01
100k
f [Hz]
Datasheet
0
50
100
150
IQ [mA]
13
Rev. 1.11
2019-10-21
OPTIREG™ Linear TLE4263-2ES
5 V low drop voltage regulator
Application information
5
Application information
Note:
The following information is given as a hint for the implementation of the device only and shall not
be regarded as a description or warranty of a certain functionality condition or quality of the device.
ΙΙ
Ι
1000 μF
470 nF
ΙE
VΙ + Vr
VE
PSRR = 20 log
Q
22 μF
TLE4263-2 ES
INH
VC
ΙQ
RO
D
Ι D, ch
CD
GND
Ι GND
W
RADJ
VW
VRADJ
5.6 k Ω
Ι RD
VQ
VRO
100 nF
Vr
ΔVQ, r
AES03070_4263
Figure 3
Application circuit
Note:
This is a very simplified example of an application circuit. The function must be verified in the real
application.
Datasheet
14
Rev. 1.11
2019-10-21
OPTIREG™ Linear TLE4263-2ES
5 V low drop voltage regulator
Application information
5.1
Reset
VI
t
t < trr
VQ
VQ,rt
1V
t
trd
VD
VDU
VDRL
t
VRO
VRO,l
trd
trd
trr
trd
1V
t
Thermal
Shutdown
Input
V oltage Dip
Figure 4
Reset timing diagram
5.2
Power-on reset delay time
Undervoltage
Spike at
output
Overload
TimingDiagram_Reset.vsd
If the application needs a power-on reset delay time trd different from the value given in “Reset Generator”
on Page 9, the delay capacitor’s value can be derived from these specified values and the desired power-on
delay time:
(5.1)
with:
•
CD: capacitance of the delay capacitor to be chosen
•
trd,new: desired power-on reset delay time
•
trd: power-on reset delay time specified in this datasheet
For a precise calculation also take the delay capacitor’s tolerance into consideration.
Datasheet
15
Rev. 1.11
2019-10-21
OPTIREG™ Linear TLE4263-2ES
5 V low drop voltage regulator
Application information
5.3
Reset adjust function
The undervoltage reset switching threshold can be adjusted according to the application’s needs by
connecting an external voltage divider (RADJ1, RADJ2) at pin RADJ. For selecting the default threshold connect
pin RADJ to GND.
When dimensioning the voltage divider, take into consideration that there will be an additional current
constantly flowing through the resistors.
With a voltage divider connected, the reset switching threshold VRT,new is calculated as follows:
(5.2)
R ADJ, 1 + R ADJ, 2
V RT, new = ------------------------------------------ × V RADJ, th
R ADJ, 2
with
•
VRT,new: the desired new reset switching threshold
•
RADJ1, RADJ2: resistors of the external voltage divider
•
VRADJ,th: reset adjust switching threshold given in “Reset Generator” on Page 9
5.4
Watchdog
VW
VD
t
No positive
VW edge
TWI,tr
TWI,p
VDU
VDWL
t
TWD,L
TWD,L
VRO
VRO,l
Figure 5
Datasheet
TimingDiagram_Watchdog.vsd
t
Timing of the watchdog function reset
16
Rev. 1.11
2019-10-21
OPTIREG™ Linear TLE4263-2ES
5 V low drop voltage regulator
Application information
Watchdog timing
The period of the watchdog pulses has to be smaller than the minimum watchdog trigger time which is set by
the external reset delay capacitor CD. Use the following formula for dimensioning CD:
T
WI,tr,new
- × 100 nF
C D = -----------------------
(5.3)
T WI,tr
with
•
CD: capacitance of the delay capacitor to be chosen
•
TWI,tr,new: desired watchdog trigger time
•
TWI,tr: watchdog trigger time specified in this data sheet
Datasheet
17
Rev. 1.11
2019-10-21
OPTIREG™ Linear TLE4263-2ES
5 V low drop voltage regulator
Package information
6
Package information
0.35 x 45˚
1.27
0.41±0.09 2)
0.2
M
0.19 +0.06
0.08 C
Seating Plane
0.64 ±0.25
C A-B D 8x
D
0.2
6 ±0.2
8˚ MAX.
C
0.1 C D 2x
1.7 MAX.
Stand Off
(1.45)
0.1+0
-0.1
3.9 ±0.11)
M
D 8x
Bottom View
8
1
5
1
4
8
4
5
2.65 ±0.2
3 ±0.2
A
B
4.9 ±0.11)
0.1 C A-B 2x
GPS05094
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Dambar protrusion shall be maximum 0.1 mm total in excess of lead width
3) JEDEC reference MS-012 variation BA
Figure 6
PG-DSO-8 exposed pad (Plastic Dual Small Outline)
PG-DSO-8-27-PO V01
1)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant
with government regulations the device is available as a green product. Green products are RoHS-Compliant
(i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
Further information on packages
https://www.infineon.com/packages
1) Dimension in mm
Datasheet
18
Rev. 1.11
2019-10-21
OPTIREG™ Linear TLE4263-2ES
5 V low drop voltage regulator
Revision history
7
Revision history
Revision Date
Changes
1.11
2019-10-21 Editorial changes
1.1
2019-03-27 Updated layout and structure
Editorial changes
1.0
2008-04-21 Initial datasheet
Datasheet
19
Rev. 1.11
2019-10-21
Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
Edition 2019-10-21
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2007 Infineon Technologies AG.
All Rights Reserved.
Do you have a question about any
aspect of this document?
Email: erratum@infineon.com
Document reference
Z8F52231382
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