OPTIREG™ Linear TLE4263
5 V low drop fixed voltage regulator
Features
•
Output voltage tolerance ≤ ±2%
•
200 mA output current capability
•
Low-drop voltage
•
Very low standby current consumption
•
Overtemperature protection
•
Reverse polarity protection
•
Short-circuit proof
•
Adjustable reset threshold
•
Watchdog
•
Wide temperature range
•
Suitable for use in automotive electronics
•
Green Product (RoHS compliant)
Potential applications
General automotive applications.
Product validation
Qualified for automotive applications. Product validation according to AEC-Q100/101.
Description
The OPTIREG™ Linear TLE4263 is a 5 V low drop voltage regulator in a SMD package PG-DSO-14, PG-DSO-20, or
PG-DSO-8. The maximum input voltage is 45 V. The maximum output current is 200 mA. The IC is short-circuit
proof and incorporates temperature protection which turns off the IC at overtemperature.
Data Sheet
www.infineon.com/OPTIREG-Linear
1
Rev. 3.0
2018-10-04
OPTIREG™ Linear TLE4263
5 V low drop fixed voltage regulator
The IC regulates an input voltage VI in the range between 6 V and 45 V to an output voltage to VQ,nom = 5.0 V. A
reset signal is generated for an output voltage of VQ,rt < 4.5 V. This voltage threshold can be decreased to 3.5 V
by external connection of a voltage divider. The reset delay can be set externally by a capacitor. The integrated
watchdog logic supervises the connected microcontroller. The IC can be switched off via the inhibit input,
which causes the current consumption to drop from 900 µA to typical 0 µA.
Type
Package
Marking
TLE4263GS
PG-DSO-8
TLE4263
TLE4263GM
PG-DSO-14
TLE4263
TLE4263G
PG-DSO-20
TLE4263
Data Sheet
2
Rev. 3.0
2018-10-04
OPTIREG™ Linear TLE4263
5 V low drop fixed voltage regulator
Table of contents
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Potential applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Product validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
3.1
General product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4
4.1
4.2
4.3
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Choosing external components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5
5.1
5.2
5.3
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reset timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reset switching threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Watchdog timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Data Sheet
3
13
14
15
15
Rev. 3.0
2018-10-04
OPTIREG™ Linear TLE4263
5 V low drop fixed voltage regulator
Block diagram
1
Block diagram
W
Saturation
Control and
Protection
Circuit
Temperature
Sensor
Input
Watchdog
Ι
Q
Control
Amplifier
Buffer
Bandgap
Reference
Reset
Generator
Output
D Reset
Delay
RO Reset
Output
RADJ Reset
Threshold
Adjustment
INH
Inhibit
Figure 1
Data Sheet
GND
GND
AEB03068
Block diagram
4
Rev. 3.0
2018-10-04
OPTIREG™ Linear TLE4263
5 V low drop fixed voltage regulator
Pin configuration
2
Pin configuration
TLE 4263 G
N.C.
N.C.
RO
GND
GND
GND
GND
N.C.
D
RADJ
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
TLE 4263 GM
INH
N.C.
VI
GND
GND
GND
GND
N.C.
VQ
W
14
13
12
11
10
9
8
1
2
3
4
5
6
7
RO
N.C.
GND
GND
GND
D
RADJ
TLE 4263 GS
INH
I
GND
GND
GND
Q
W
I
INH
RO
GND
1
2
3
4
8
7
6
5
Q
W
RADJ
D
AEP01668_4263
AEP03067
AEP01099_4263
Figure 2
Pin configuration (top view)
Table 1
Pin definitions and functions
Pin
PG-DSO-14
Pin
PG-DSO-20
Pin
PG-DSO-8
Symbol
Function
1
3
3
RO
Reset output; open-collector output
connected to the output via a resistor of
30 kΩ.
2
1, 2, 19, 13
–
N.C.
Not connected.
3 - 5, 10 - 12
4-7, 14-17
4
GND
Ground.
6
9
5
D
Reset delay; connected to ground with a
capacitor.
7
10
6
RADJ
Reset threshold; to adjust the switching
threshold connect a voltage divider
(output to GND) to the pin. If this input is
connected to GND, reset is triggered at an
output voltage of 4.5 V.
8
11
7
W
Watchdog; rising edge triggered input for
monitoring a microcontroller.
9
12
8
Q
5 V output voltage; block to ground with a
capacitor, C ≥ 22 µF, ESR ≤ 3 Ω at 10 kHz.
13
18
1
I
Input voltage; block to ground directly at
the IC with a ceramic capacitor.
14
20
2
INH
Inhibit; TTL-compatible, low-active input.
Data Sheet
5
Rev. 3.0
2018-10-04
OPTIREG™ Linear TLE4263
5 V low drop fixed voltage regulator
General product characteristics
3
General product characteristics
3.1
Absolute maximum ratings
Table 2
Absolute maximum ratings
Parameter
Symbol
Values
Unit Note or Test Condition
Min.
Typ.
Max.
VI
II
-42
–
–
–
45
–
V
–
–
Internally limited
VR
IR
-0.3
–
–
–
42
–
V
–
–
Internally limited
VRADJ
-0.3
–
6
V
–
VD
ID
-0.3
–
–
–
42
–
V
–
–
Internally limited
VQ
IQ
-0.3
–
–
–
7
–
V
–
–
Internally limited
VINH
-42
–
45
V
–
VW
-0.3
–
6
V
–
IGND
-0.5
–
–
A
–
Tj
Tstg
–
-50
–
–
150
150
°C
°C
–
–
Input voltage
VI
–
–
45
V
–
Junction temperature
Tj
-40
–
150
°C
–
Input I
Input voltage
Input current
Reset output RO
Voltage
Current
Reset threshold RADJ
Voltage
Reset delay D
Voltage
Current
Output Q
Voltage
Current
Inhibit INH
Voltage
Watchdog W
Voltage
Ground GND
Current
Temperature
Junction temperature
Storage temperature
Operating range
Data Sheet
6
Rev. 3.0
2018-10-04
OPTIREG™ Linear TLE4263
5 V low drop fixed voltage regulator
General product characteristics
Table 2
Absolute maximum ratings (cont’d)
Parameter
Symbol
Values
Unit Note or Test Condition
Min.
Typ.
Max.
–
–
112
K/W
–
–
92
K/W
–
–
185
K/W
–
–
164
K/W
–
–
84
K/W
–
–
66
K/W
–
–
32
K/W
Thermal resistance
Junction-ambient
Junction-pin
Rthj-a
Rthj-p
PG-DSO-141);
Footprint only
PG-DSO-141);
300 mm2 Heat sink
PG-DSO-81);
Footprint only
PG-DSO-81);
300 mm2 Heat sink
PG-DSO-201);
Footprint only
PG-DSO-201);
300 mm2 Heat sink
PG-DSO-142)
3
1) Worst case; package mounted on PCB 80 × 80 × 1.5 mm ; 35 µm Cu; 5 µm Sn; zero airflow.
2) Measured to pin 4.
Data Sheet
7
Rev. 3.0
2018-10-04
OPTIREG™ Linear TLE4263
5 V low drop fixed voltage regulator
Functional description
4
Functional description
The control amplifier compares a reference voltage, which is kept highly accurate by resistance adjustment,
to a voltage that is proportional to the output voltage and drives the base of the series transistor via a buffer.
Saturation control as a function of the load current prevents any over-saturation of the power element. If the
externally scaled down output voltage at the reset threshold input drops below 1.35 V, the external reset delay
capacitor is discharged by the reset generator. When the voltage of the capacitor reaches the lower threshold
VDRL, a reset signal occurs at the reset output and is held until the upper threshold VDU is exceeded. If the reset
threshold input is connected to GND, reset is triggered at an output voltage of typ. 4.65 V. A connected
microcontroller will be monitored through the watchdog logic. In case of missing pulses at pin W, the reset
output is set to “low”. The pulse sequence time can be set in a wide range with the reset delay capacitor. The
IC can be switched at the TTL-compatible, low-active inhibit input. The IC also incorporates a number of
internal circuits for protection against:
•
Overload
•
Overtemperature
•
Reverse polarity
4.1
Choosing external components
The input capacitor CI is necessary for compensation of line influences. Using a resistor of approx. 1 Ω in series
with CI, the oscillating circuit consisting of input inductivity and input capacitance can be damped. The output
capacitor is necessary for the stability of the regulating circuit. Stability is ensured at values CQ ≥ 22 µF and an
ESR of ≤ 3 Ω within the operating temperature range. For small tolerances of the reset delay the spread of the
capacitance of the delay capacitor and its temperature coefficient should be noted.
4.2
Electrical characteristics
Table 3
Electrical characteristics
VI = 13.5 V; -40°C < Tj < 125°C; VINH > 3.5 V; (unless specified otherwise)
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note or Test Condition
Normal Operation
Output voltage
VQ
4.90
5.00
5.10
V
5 mA ≤ IQ ≤ 150 mA;
6 V ≤ VI ≤ 28 V
Output voltage
VQ
4.90
5.00
5.10
V
6 V ≤ VI ≤ 32 V;
IQ = 100 mA;
Tj = 100°C
Output current limitation
IQ,max
201
250
400
mA
VQ = 4.8V
Current consumption;
Iq = II - IQ
Iq
–
0
50
µA
VINH = 0
Iq
Iq
Iq
–
–
–
900
10
15
1300
18
23
µA
mA
mA
IQ = 0 mA
IQ = 150 mA
IQ = 150 mA; VI = 4.5 V
Drop voltage
Vdr
–
0.35
0.50
V
IQ = 150 mA1)
Load regulation
∆VQ,lo
–
–
25
mV
IQ = 5 mA to 150 mA
Line regulation
∆VQ.li
–
3
25
mV
VI = 6 V to 28 V;
IQ = 150 mA
Data Sheet
8
Rev. 3.0
2018-10-04
OPTIREG™ Linear TLE4263
5 V low drop fixed voltage regulator
Functional description
Table 3
Electrical characteristics (cont’d)
VI = 13.5 V; -40°C < Tj < 125°C; VINH > 3.5 V; (unless specified otherwise)
Parameter
Symbol
Values
Unit
Note or Test Condition
Min.
Typ.
Max.
PSRR
–
54
–
dB
fr = 100 Hz;
Vr = 0.5 Vpp
Switching threshold
VQ,rt
4.5
4.65
4.8
V
VRADJ = 0 V
Reset adjust threshold
VRADJ,th
1.26
1.35
1.44
V
VQ > 3.5 V
Reset low voltage
VRO,l
–
0.10
0.40
V
IRO = 1 mA
Saturation voltage
VD,sat
–
50
100
mV
VQ < VR,th
Upper timing threshold
VDU
1.45
1.70
2.05
V
–
Lower reset timing
threshold
VDRL
0.20
0.35
0.55
V
–
Charge current
ID,ch
40
60
85
µA
–
Reset delay time
trd
1.3
2.8
4.1
ms
CD = 100 nF
Reset reaction time
trr
0.5
1.2
4
µs
CD = 100 nF
Discharge current
ID,wd
4.40
6.25
9.10
µA
VD = 1.0 V
Upper timing threshold
VDU
1.45
1.70
2.05
V
–
Lower timing threshold
VDWL
0.20
0.35
0.55
V
–
Watchdog trigger time
TWI,tr
16
22.5
27
ms
CD = 100 nF
Switching voltage
VINH,ON
3.6
–
–
V
IC turned on
Turn-OFF voltage
VINH,OFF
–
–
0.8
V
IC turned off
Input current
IINH
5
10
25
µA
VINH = 5 V
Power supply ripple
rejection
Reset Generator
Watchdog
Inhibit
1) Drop voltage = Vi - VQ (measured when the output voltage has dropped 100 mV from the nominal value obtained at
6 V input).
Note:
Data Sheet
The reset output is “low” within the range VQ = 1 V to VQ,rt.
9
Rev. 3.0
2018-10-04
OPTIREG™ Linear TLE4263
5 V low drop fixed voltage regulator
Functional description
4.3
Typical performance characteristics
Timing threshold voltage VDU and VDRL versus
junction temperature
Reset switching threshold versus
output voltage
AED01098_4263
1.6
V RADJ V
1.4
AED03062
3.2
V
V
2.8
1.2
VI = 13.5 V
2.4
1.0
2.0
VDU
V Ι = 13.5 V
0.8
1.6
0.6
1.2
0.4
0.8
0.2
0.4
0
0
1
2
3
0
-40
4 V 5
VQ
Reset switching threshold versus
junction temperature
1.0
10
0.8
8
0.6
6
0.4
4
0.2
2
40
80
0
-40
120 ˚C 160
Tj
Data Sheet
80
120 ˚C 160
AED03063
16
µA
IINH
14
12
0
40
Current consumption of inhibit versus
junction temperature
1.2
0
-40
0
Tj
AED01088
1.6
VRADJ V
1.4
VDRL
VINH = 5 V
0
40
80
120 ˚C 160
Tj
10
Rev. 3.0
2018-10-04
OPTIREG™ Linear TLE4263
5 V low drop fixed voltage regulator
Functional description
Drop voltage versus
output current
Vdr
Current consumption versus
output current
AED03060_4263
800
mV
700
600
AED03061
32
Iq mA
28
24
T j = 125 ˚C
25 ˚C
500
20
VI = 13.5 V
400
16
300
12
200
8
100
4
0
0
50
100 150
200
mA
0
300
0
50
100 150
200
mA
IQ
Current consumption versus
input voltage
Output voltage versus
input voltage
AED01096
30
Ιq
Data Sheet
300
IQ
AED01097
12
mA
VQ
V
25
10
20
8
R L = 25 Ω
15
6
10
4
5
2
0
0
0
10
20
30
40 V 50
VΙ
R L = 25 Ω
0
2
4
6
8 V 10
VΙ
11
Rev. 3.0
2018-10-04
OPTIREG™ Linear TLE4263
5 V low drop fixed voltage regulator
Functional description
Charge current and discharge current versus
junction temperature
Ι
Output voltage versus
junction temperature
AED03064
80
μA
70
VQ
60
50
Ι D, ch
5.1
V Ι = 13.5 V
V D = 1.5 V
5.0
40
AED01090
5.2
V
VI = 13.5 V
4.9
30
4.8
20
0
-40
4.7
Ι D, dis
10
0
80
40
4.6
-40
120 C 160
Tj
Pulse time versus
junction temperature
0
40
80
120 ˚C 160
Tj
Output current versus
input voltage
AED03065_4263
40
ms
TWI,tr 35
AED01091
300
ΙQ
mA
T j = 25 C
250
30
200
V Ι = 13.5 V
C D = 100 nF
25
20
150
15
100
10
50
5
0
-40
Data Sheet
0
40
80
0
120 C 160
Tj
12
0
10
20
30
40 V 50
VΙ
Rev. 3.0
2018-10-04
OPTIREG™ Linear TLE4263
5 V low drop fixed voltage regulator
Application information
5
Application information
Ι
Input
Q
Output
470 nF
6 V...45 V
KL 15
INH
Reset
To MC
RO
D
TLE 4263G
100 k Ω
100 nF
22 μF
RADJ
GND
56 k Ω
W
Watchdog
from MC
Figure 3
AES03069
Application circuit
ΙΙ
Ι
1000 μF
470 nF
ΙE
VΙ + Vr
VE
PSRR = 20 log
Q
22 μF
TLE 4263G
INH
VC
ΙQ
RO
D
Ι D, ch
CD
GND
Ι GND
W
RADJ
VW
VRADJ
5.6 k Ω
Ι RD
VQ
VRO
100 nF
Vr
ΔVQ, r
AES03070_4263
Figure 4
Data Sheet
Test circuit
13
Rev. 3.0
2018-10-04
OPTIREG™ Linear TLE4263
5 V low drop fixed voltage regulator
Application information
5.1
Reset timing
The power-on reset delay time is defined by the charging time of an external capacitor CD which can be
calculated as follows:
CD = (trd × ID,ch)/∆V
(5.1)
Definitions:
•
CD = delay capacitor
•
trd = reset delay time
•
ID,ch = charge current, typical 60 µA
•
∆V = VDU, typical 1.70 V
•
VDU = upper delay switching threshold at CD for reset delay time
VI
< trr
t
VQ
VQ, rt
dV ID, ch
=
dt
CD
VD
t
VDU
VDRL
trd
trr
t
VRO
t
Power-ON
Reset
Figure 5
Data Sheet
Overtemperature
Voltage Drop
at Input
Undervoltage
Secondary Load
Bounce
Spike
AET03066
Time response, watchdog with high-frequency clock
14
Rev. 3.0
2018-10-04
OPTIREG™ Linear TLE4263
5 V low drop fixed voltage regulator
Application information
5.2
Reset switching threshold
The present default value is typ. 4.65 V. When using the TLE4263 the reset threshold can be set to
3.5 V < VQ,rt < 4.6 V by connecting an external voltage divider to pin RADJ. The calculation can be easily done
since the reset adjust input current can be neglected. If this feature is not needed, the pin must be connected
to GND.
VQ,rt = (1 + R1/R2) × VRADJ,th
(5.2)
Definitions:
•
VQ,rt = reset threshold
•
VRADJ,th = comparator reference voltage, typical 1.35 V
5.3
Watchdog timing
The frequency of the watchdog pulses must be higher than the minimum pulse sequence which is set by the
external reset delay capacitor CD. Calculation can be done according to the formula given in Figure 6.
VW
t
VΙ
VQ
T WD, p
VD
T WI, tr
t
t
VDU
VDWL
VRO
T WI, tr =
t WD, L
(VDU - VDWL )
Ι D, wd
t
t
CD
AED03099_4263
Figure 6
Data Sheet
Timing of the watchdog function reset
15
Rev. 3.0
2018-10-04
OPTIREG™ Linear TLE4263
5 V low drop fixed voltage regulator
Package information
6
Package information
1.27
0.1
0.41 +0.1
-0.06
0.19 +0.0
6
B
0.64 ±0.25
0.2 M A B 8x
8
5
Index
Marking 1
4
5 -0.21)
8° MAX.
4 -0.21)
1.75 MAX.
0.175 ±0.07
(1.45)
0.35 x 45°
6 ±0.2
A
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Lead width can be 0.61 max. in dambar area
GPS01229
Figure 7
PG-DSO-8 (Plastic Dual Small Outline)1)
Figure 8
PG-DSO-14 (Plastic Dual Small Outline)1)
1) Dimension in mm
Data Sheet
16
Rev. 3.0
2018-10-04
OPTIREG™ Linear TLE4263
5 V low drop fixed voltage regulator
1.27
0.35
7.6 -0.2 1)
8˚ MAX.
0.35 x 45˚
0.23 +0.09
2.65 MAX.
0.2 -0.1
2.45 -0.2
Package information
0.4 +0.8
0.1
+0.15 2)
0.2 20x
20
10.3 ±0.3
11
10
1
12.8 -0.2 1)
Index Marking
1)
2)
Does not include plastic or metal protrusion of 0.15 max. per side
Does not include dambar protrusion of 0.05 max. per side
GPS05094
Figure 9
PG-DSO-20 (Plastic Dual Small Outline)1)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant
with government regulations the device is available as a green product. Green products are RoHS-Compliant
(i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
Further information on packages
https://www.infineon.com/packages
Data Sheet
17
Rev. 3.0
2018-10-04
OPTIREG™ Linear TLE4263
5 V low drop fixed voltage regulator
Revision history
7
Revision history
Revision Date
Changes
3.0
2018-10-04 Updated layout and structure
Page 8: output current changed to output current limitation, add note VQ = 4.8V
Drop voltage: added footnote
Updated package drawing “PG-DSO-14”
Editorial changes
2.9
2013-11-25 Package version changed:
- PG-DSO-20-35 to PG-DSO-20
Package naming harmonized according to Infineon standards:
- PG-DSO-8-16 to PG-DSO-8
- PG-DSO-14-30 to PG-DSO-14
2.8
2007-03-20 Initial version of RoHS-compliant derivate of TLE4263
Page 1: AEC certified statement added
Page 1 and Page 16 ff: RoHS compliance statement and Green product feature added
Page 1 and Page 16 ff: Package changed to RoHS compliant version
Legal Disclaimer updated
Data Sheet
18
Rev. 3.0
2018-10-04
Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
Edition 2018-10-04
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2018 Infineon Technologies AG.
All Rights Reserved.
Do you have a question about any
aspect of this document?
Email: erratum@infineon.com
Document reference
Z8F52231383
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