TLE4268GSXUMA2

5-V Low Drop Fixed Voltage Regulator TLE 4268 Features • • • • • • • • • • • • Output voltage tolerance ≤ ±2% Very low current consumption Low-drop voltage Watchdog Settable reset threshold Overtemperature protection Reverse polarity protection Short-circuit proof Suitable for use in automotive electronics Wide temperature range Green Product (RoHS compliant) AEC Qualified P-DSO-8-3, -6, -7, -8, -9 Functional Description This device is a 5-V low-drop fixed-voltage regulator. The P/PG-DSO-20-1,-6,-7,-9,-14,maximum input voltage is 45 V. It can deliver an output current of at least 180 mA. The IC is short-circuit proof and features temperature protection that disables the circuit in the event of impermissibly high temperatures. The watchdog function is disabled as a function of the load, so that a controller is not interrupted during sleep mode by a watchdog reset. Application Description The IC regulates an input voltage VI in the range 5.5 V < VI < 45 V to VQ,nom = 5.0 V. In the event of an output voltage VQ < VRT, a reset signal is generated. The wiring of the reset switching threshold input enables the value of VRT to be reduced. The reset delay time can be adjusted using an external capacitor. The integrated watchdog monitors the connected active controller. If there is no rising edge at the watchdog input, the reset Type Package TLE 4268 GS PG-DSO-8 TLE 4268 G PG-DSO-20 Data Sheet 1 Rev. 1.6, 2013-11-25 TLE 4268 output is set to low. The reset delay capacitor provides a wide adjustment range for the pulse repetition time. The watchdog function is only activated if the load exceeds 8 mA. This ensures that a microcontroller is not activated during power-down and the current drain is not increased. The IC is protected against overload and overtemperature. PG-DSO-8 Ι N.C. RO GND 1 2 3 4 8 7 6 5 Q W RADJ D AEP01954 Figure 1 Pin Configuration (top view) Table 1 Pin Definitions and Functions Pin Symbol 1 I Input voltage 2 N.C. Not connected 3 RO Reset output 4 GND Ground 5 D Reset delay 6 RADJ Reset switching threshold 7 W Watchdog input 8 Q 5 V output voltage Data Sheet Function 2 Rev. 1.6, 2013-11-25 TLE 4268 PG-DSO-20 N.C. N.C. RO GND GND GND GND N.C. D RADJ 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 N.C. N.C. Ι GND GND GND GND N.C. Q W AEP01540 Figure 2 Pin Configuration (top view) Table 2 Pin Pin Definitions and Functions Symbol Function 1, 2, 8, 13, N.C. 19, 20 Not connected. 3 RO Reset output; the open collector output is connected to the 5-V output via an integrated resistor of 30 kΩ. 4 … 7, 14 … 17 GND Ground 9 D Reset delay; connect a capacitor to ground for delay time adjustment. 10 RADJ Reset switching threshold; for setting the switching threshold, output to ground with voltage divider. If this input is connected to ground, the reset is triggered at an output voltage of 4.5 V. 11 W Watchdog input; positive-edge-triggered input for monitoring a microcontroller. 12 Q 5-V output voltage; block to ground with 22 μF capacitor, ESR < 3 Ω. 18 I Input voltage; block to ground directly on the IC with ceramic capacitor. Data Sheet 3 Rev. 1.6, 2013-11-25 TLE 4268 Circuit Description The control amplifier compares a reference voltage, which is kept highly accurate by resistance adjustment, to a voltage that is proportional to the output voltage and drives the base of the series transistor via a buffer. Saturation control as a function of the load current prevents any over-saturation of the power element. If the externally scaled down output voltage at the reset threshold input drops below 1.35 V, the external reset delay capacitor is discharged by the reset generator. If the voltage on the capacitor reaches the lower threshold VDRL, a reset signal is generated on the reset output and not cancelled again until the upper threshold voltage is exceeded. If the reset threshold input is connected to GND, reset is triggered at an output voltage of 4.5 V. A connected microcontroller is monitored by the watchdog logic. If pulses are missing, the rest output is set to low. The pulse sequence time can be set within a wide range with the reset delay capacitor. The IC also incorporates internal circuits for protection against: • • • Overload Overtemperature Reverse polarity Input 12 Output 18 Temperature Sensor Protection Circuit 3 Reset Output Reset Generator Control Amplifier - + Adjustment Bandgap Reference Watchdog 4-7, 14-17 GND Figure 3 Data Sheet 11 Watchdog Input Reset 10 Switching Threshold 9 Reset Delay AEB01539 Block Diagram TLE 4268 G (PG-DSO-20) 4 Rev. 1.6, 2013-11-25 TLE 4268 Table 3 Absolute Maximum Ratings Parameter Symbol Limit Values Unit Notes 45 – V – – Internally limited -0.3 – 7 – V – – Internally limited VD ID -0.3 – 7 – V – – Internally limited VW -0.3 7 V – VRADJ -0.3 7 V – VQ IQ -0.3 – 7 – V – – Internally limited IGND -100 50 mA – Tj TS -40 -50 150 150 °C °C – – Min. Max. VI II -30 – VR IR Input I Input voltage Input current Reset Output RO Voltage Current Reset Delay D Voltage Current Watchdog W Watchdog input Reset Switching Threshold RADJ Reset threshold Output Q Output voltage Output current Ground GND Current Temperatures Junction temperature Storage temperature Data Sheet 5 Rev. 1.6, 2013-11-25 TLE 4268 Table 4 Operating Range Parameter Input voltage Junction temperature Symbol Limit Values Unit Notes 45 V – 150 °C – – – 185 100 K/W K/W PG-DSO-81) PG-DSO-201) – – 72 23 K/W K/W PG-DSO-82) PG-DSO-203) Min. Max. VI Tj – -40 Rthj-a Rthj-a Rthj-pin Rthj-pin Thermal Resistance Junction ambient (soldered) Junction pin 1) Package mounted on PCB 80 × 80 × 1.5 mm3; 35μ Cu; 5μ Sn; Footprint only; zero airflow. 2) Measured to pin 2. 3) Measured to pin 5. Optimum reliability and life time are guaranteed if the junction temperature does not exceed 125 °C in operating mode. Operation at up to the maximum junction temperature of 150 °C is possible in principle. Note, however, operation at the maximum permitted ratings could affect the reliability of the device. Data Sheet 6 Rev. 1.6, 2013-11-25 TLE 4268 Table 5 Characteristics VI = 13.5 V; -40 °C ≤ Tj ≤ 125 °C (unless otherwise specified) Parameter Output voltage Symbol Unit Test Condition 5.10 V 5 mA ≤ IQ ≤ 150 mA; 6 V ≤ VI ≤ 28 V 250 – mA – – 300 450 μA IQ = 0 mA Iq – 13 20 mA IQ = 150 mA VDR ΔVQ,Lo ΔVQ,Li – 0.25 0.50 V – 10 30 mV – 10 30 mV IQ = 150 mA1) IQ = 5 to 150 mA VI = 6 to 28 V IQ = 150 mA VQ,rt VRADJ 4.2 4.5 4.8 V – 1.28 1.35 1.45 V – VRO,l VD ID,c VDU – 0.2 0.5 V 1 mA external – 30 100 mV 5 12 18 μA VQ < VRT VD = 1.0 V 1.4 1.8 2.2 V – trd trr RRO VDRL 10 15 25 ms – 2 – μs CD = 100 nF CD = 100 nF 18 30 46 kΩ with resp. to VQ 0.2 0.4 0.55 V – Typ. Max. 4.90 5.00 180 Iq VQ Output current limiting IQ Current consumption Limit Values Min. Iq = II - IQ Current consumption Iq = II - IQ Drop voltage Load regulation Line regulation Reset Generator Reset threshold Reset adjust threshold Reset low voltage Saturation voltage Charging current Upper reset timing threshold Reset delay time Reset reaction time Pull-up Lower reset timing threshold Data Sheet 7 Rev. 1.6, 2013-11-25 TLE 4268 Table 5 Characteristics (cont’d) VI = 13.5 V; -40 °C ≤ Tj ≤ 125 °C (unless otherwise specified) Parameter Symbol Limit Values Unit Test Condition 5.2 μA 18 μA VD = 1.0 V VD = 1.0 V 2.2 V – 0.4 0.55 V – 30 55 75 ms 25 40 60 ms CD = 100 nF CD = 100 nF 2 8 15 mA Activates watchdog 5 – – V/μs from 20% up to 80% VQ2) Min. Typ. ID,d ID,c VDU 1.5 3.5 5 12 1.4 1.8 Lower timing threshold VDWL 0.2 Watchdog period TWP Watchdog trigger time TWT Max. Watchdog Discharge current Charging current Upper timing threshold Activating current Slew rate IQ dVW/dt 1) Drop voltage = VI - VQ (measured when the output voltage has dropped 100 mV from the nominal value obtained at 13.5 V input) 2) Watchdog pulse recognition tested with 10 kHz max. pulse frequency Note: The reset output is low in range from VQ = 1 V to VQ,rt. Data Sheet 8 Rev. 1.6, 2013-11-25 TLE 4268 ΙΙ 1000 μ F Ι Q ΙQ 22 μF 470 nF TLE 4268G VΙ W D GND RO RADJ Ι dis VW VD Ιd ΙR VQ VR ΙM VRES CD 100 nF AES01541 VDr = VΙ -VQ Outside the control range Figure 4 Data Sheet Test Circuit 9 Rev. 1.6, 2013-11-25 TLE 4268 Reset Timing The power-on reset delay time is defined by the charging time of an external capacitor CD which can be calculated as follows: CD = (Δtrd × ID,c)/ΔV (1) Definitions: • • • • • CD = delay capacitor Δtrd = delay time ID,c = charge current, typical 12 μA ΔV = VDU, typical 1.8 V VDU = upper delay switching threshold at CD for reset delay time The reset reaction time trr is the time it takes the voltage regulator to set the reset out LOW after the output voltage has dropped below the reset threshold. It is typically 1 μs for delay capacitor of 47 nF. For other values for CD the reaction time can be estimated using the following equation: trr ≈ 20 s/F × CD (2) VΙ t < t rr VQ V Q, rt d V Ι D,c = dt CD VD t V DU V DRL VRO t rr t rd t t Power-on-Reset Figure 5 Data Sheet Thermal Shutdown Voltage Dip at Input Undervoltage Secondary Spike Overload at Output AED03010 Timing (Watchdog disabled) 10 Rev. 1.6, 2013-11-25 TLE 4268 VW Ι t VΙ VQ t T WP VD T WT t t WD, L t VDU VDWL VWO T WT = (VDU - VDWL ) Ι D, d C D ; T WP = (VDU - VDWL ) (Ι D, c + Ι D, d ) Ι D, c x Ι D, d C D ; t WD, L = (VDU - VDWL ) Ι D, c t CD AED03011_68 Figure 6 Data Sheet Timing of the Watchdog Function 11 Rev. 1.6, 2013-11-25 TLE 4268 Drop Voltage VDR versus Output Current IQ Current Consumption Iq versus Output Current IQ AED01544 mV AED01545 16 I q mA V dr 700 14 600 12 500 10 400 VI = 13.5 V Tj = 25 ˚C 8 Tj = 125 C 300 6 Tj = 25 C 200 4 100 2 0 0 50 100 150 200 250 0 mA 0 50 100 150 mA 200 ΙQ IQ Current Consumption Iq versus Input Voltage VI Output Voltage versus Input Voltage VI AED01546 24 Iq mA AED01547 mA VQ Tj = 25 ˚C 20 10 16 8 R L= 33 Ω 12 6 8 4 R L= 33 Ω R L= 50 Ω 4 0 2 R L= 100 Ω 0 10 20 30 0 40 V 50 VI Data Sheet 0 2 4 6 8 V VΙ 12 Rev. 1.6, 2013-11-25 TLE 4268 Charge Current ID,c and Discharge Current ID,d versus Temperature Tj Ι Timing Threshold VDU, VDWL, VDRL versus Temperature Tj AED3100 16 μA VD VΙ = 13.5 V VD = 1.0 V 14 AED03101 V 2.8 V Ι = 13.5 V 12 2.4 Ι D, c 10 2.0 8 1.6 6 1.2 4 V DU 0.8 Ι D, d V DWL , V DRL 2 0 -40 0.4 0 40 80 120 0 -40 C 0 80 40 Output Voltage VQ versus Temperature Tj C Output Current IQ versus Input Voltage VI AED03102 V 120 Tj Tj AED01551 300 IQ mA VQ Tj = 25 ˚C 250 5.1 VΙ = 13.5 V 5.0 200 4.9 150 4.8 100 4.7 50 4.6 -40 0 40 80 120 0 V Tj Data Sheet 0 10 20 30 40 V 50 VI 13 Rev. 1.6, 2013-11-25 TLE 4268 Package Outlines 1.27 0.1 0.41 +0.1 -0.06 0.19 +0.06 B 0.64 ±0.25 0.2 M A B 8x 8 5 Index Marking 1 4 5 -0.21) 8° MAX. 4 -0.21) 1.75 MAX. 0.175 ±0.07 (1.45) 0.35 x 45° 6 ±0.2 A 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Lead width can be 0.61 max. in dambar area GPS01229 Figure 7 PG-DSO-8 (Plastic Dual Small Outline) Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. Dimensions in mm SMD = Surface Mounted Device Data Sheet 14 Rev. 1.6, 2013-11-25 2.65 MAX. 0.35 x 45˚ 1.27 0.35 0.1 20x +0.15 2) 0.2 20x 20 0.4 +0.8 0.23 +0.09 7.6 -0.2 1) 8˚ MAX. 0.2 -0.1 2.45 -0.2 TLE 4268 10.3 ±0.3 11 1 10 12.8 -0.2 1) Index Marking 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Does not include dambar protrusion of 0.05 max. per side Figure 8 GPS05094 PG-DSO-20 (Plastic Dual Small Outline) Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. Dimensions in mm SMD = Surface Mounted Device Data Sheet 15 Rev. 1.6, 2013-11-25 TLE 4268 Version Date Rev. 1.6 2013-11-25 Package version changed: - PG-DSO-20-35 to PG-DSO-20 Package naming harmonized according to Infineon standards: - PG-DSO-8-16 to PG-DSO-8 Rev. 1.5 2007-03-20 Initial version of RoHS-compliant derivate of TLE 4268 Page 1: AEC certified statement added Page 1 and Page 14 ff: RoHS compliance statement and Green product feature added Page 1 and Page 14 ff: Package changed to RoHS compliant version Legal Disclaimer updated Data Sheet Changes 16 Rev. 1.6, 2013-11-25 Edition 2013-11-25 Published by Infineon Technologies AG 81726 Munich, Germany © 2013 Infineon Technologies AG All Rights Reserved. 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