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TLE4269GL

TLE4269GL

  • 厂商:

    EUPEC(英飞凌)

  • 封装:

    DSO-20

  • 描述:

    TLE4269GL

  • 数据手册
  • 价格&库存
TLE4269GL 数据手册
OPTIREG™ Linear TLE4269 5 V low drop fixed voltage regulator Features • Output voltage tolerance ≤ ±2% • 150 mA current capability • Very low current consumption • Early warning • Reset output low down to VQ = 1 V • Overtemperature protection • Reverse polarity proof • Adjustable reset threshold • Very low drop voltage • Wide temperature range • Integrated pull-up resistor at logic outputs • Green Product (RoHS compliant) Potential applications General automotive applications. Product validation Qualified for automotive applications. Product validation according to AEC-Q100/101. Description The OPTIREG™ Linear TLE4269 is an automotive voltage regulator with a 5 V fixed output. The maximum operating voltage is 45 V. The output is able to drive 150 mA load. The device features short-circuit protection. The thermal shutdown feature switches the output off when the junction temperature exceeds 150°C to ensure the device is not damaged by overheating. A reset signal is generated when the output voltage drops below VQ < 4.65 V. The reset threshold voltage can be decreased by an external connection of a voltage divider. The reset delay time can be set by an external capacitor. Reset and sense output have integrated pull-up resistors. If the integrated resistors are not required, the TLE4279 can be used instead. It is also possible to supervise the input voltage by using an integrated comparator to give a low voltage warning. Type Package Marking TLE4269G PG-DSO-8 TLE 4269 TLE4269GM PG-DSO-14 TLE 4269 TLE4269GL PG-DSO-20 TLE 4269 Data Sheet www.infineon.com/OPTIREG-Linear 1 Rev. 2.6 2018-11-20 OPTIREG™ Linear TLE4269 5 V low drop fixed voltage regulator Table of contents Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Potential applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Product validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 3.1 3.2 General product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 5.1 5.2 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Data Sheet 2 Rev. 2.6 2018-11-20 OPTIREG™ Linear TLE4269 5 V low drop fixed voltage regulator Block diagram 1 Block diagram Ι Q Error Amplifier 20 kΩ 20 k Ω Current and Saturation Control Reference Trimming D RO & Reference SO RADJ SI AEB01669 Figure 1 Data Sheet Block diagram 3 Rev. 2.6 2018-11-20 OPTIREG™ Linear TLE4269 5 V low drop fixed voltage regulator Pin configuration 2 Pin configuration PG-DSO-8 Ι SΙ RADJ D 1 2 3 4 8 7 6 5 Q SO RO GND AEP01668 Figure 2 Pin configuration PG-DSO-8 (top view) Table 1 Pin definitions and functions (TLE4269G) Pin No. Symbol Function 1 I Input connected with a ceramic capacitor to GND directly at the IC. 2 SI Sense input if not needed connect to Q. 3 RADJ Reset threshold adjust if not needed connect to GND. 4 D Reset delay to select delay time, connect to GND via capacitor. 5 GND Ground 6 RO Reset output the open collector output is connected to the 5 V output via an integrated 20 kΩ pull-up resistor; leave open if the reset function is not needed 7 SO Sense output the open collector output is connected to the 5 V output via an integrated 20 kΩ pull-up resistor; leave open if the sense comparator is not needed. 8 Q 5 V output connect to GND with a 10 μF capacitor, ESR < 10 Ω Data Sheet 4 Rev. 2.6 2018-11-20 OPTIREG™ Linear TLE4269 5 V low drop fixed voltage regulator Pin configuration PG-DSO-14 RADJ D GND GND GND GND RO 1 2 3 4 5 6 7 14 13 12 11 10 9 8 SI Ι GND GND GND Q SO AEP02248 Figure 3 Pin configuration PG-DSO-14 (top view) Table 2 Pin definitions and functions (TLE4269GM) Pin No. Symbol Function 1 RADJ Reset threshold adjust if not needed connect to GND. 2 D Reset delay to select delay time; connect to GND via capacitor. 3, 4, 5, 6 GND Ground 7 RO Reset output the open collector output is connected to the 5 V output via an integrated 20 kΩ pull-up resistor; leave open if the reset function is not needed 8 SO Sense output the open collector output is connected to the 5 V output via an integrated 20 kΩ pull-up resistor; leave open if the sense comparator is not needed. 9 Q 5 V Output connect to GND with a 10 μF capacitor, ESR < 10 Ω. 10, 11, 12 GND Ground 13 I Input connected with a ceramic capacitor to GND directly at the IC. 14 SI Sense input if not needed connect to Q. Data Sheet 5 Rev. 2.6 2018-11-20 OPTIREG™ Linear TLE4269 5 V low drop fixed voltage regulator Pin configuration PG-DSO-20 RADJ D N.C. GND GND GND GND N.C. N.C. RO 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 SΙ Ι N.C. GND GND GND GND N.C. Q SO AEP01802 Figure 4 Pin configuration PG-DSO-20 (top view) Table 3 Pin definitions and functions (TLE4269GL) Pin No. Symbol Function 1 RADJ Reset threshold adjust if not needed connect to ground. 2 D Reset delay to select delay time, connect to GND via external capacitor. 4 - 7, 14 - 17 GND Ground 10 RO Reset output the open collector output is connected to the 5 V output via an integrated 20 kΩ pull-up resistor; leave open if the reset function is not needed 11 SO Sense output the open collector output is connected to the 5 V output via an integrated 20 kΩ pull-up resistor; leave open if the sense comparator is not needed. 12 Q Output connect to GND with a 10 μF capacitor, ESR < 10 Ω. 19 I Input connected with a ceramic capacitor to GND directly at the IC. 20 SI Sense input if not needed connect to Q. Data Sheet 6 Rev. 2.6 2018-11-20 OPTIREG™ Linear TLE4269 5 V low drop fixed voltage regulator General product characteristics 3 General product characteristics 3.1 Absolute maximum ratings Table 4 Absolute maximum ratings Tj = -40°C to 150°C Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Input Input voltage VI -40 – 45 V – Input current II – – – – Internal limited Input voltage VSI -40 – 45 V – Input current ISI 1 – 1 mA – Voltage VRADJ -0.3 – 7 V – Current IRADJ -10 – 10 mA – Voltage VD -0.3 – 7 V – Current ID – – – – Internal limited IGND 50 – – mA – Voltage VR -0.3 – 7 V – Current IR – – – – Internal limited Voltage VSO -0.3 – 7 V – Current ISO – – – – Internal limited Output voltage VQ -0.5 – 7 V – Output current IQ -10 – – mA – Junction temperature Tj – – 150 °C – Storage temperature TStg -50 – 150 °C – Input voltage VI – – 45 V – Junction temperature Tj -40 – 150 °C – Sense input Reset threshold Reset delay Ground Current Reset output Sense output 5 V output Temperature Operating range Data Sheet 7 Rev. 2.6 2018-11-20 OPTIREG™ Linear TLE4269 5 V low drop fixed voltage regulator General product characteristics Table 4 Absolute maximum ratings (cont’d) Tj = -40°C to 150°C Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Thermal data Junction-ambient Rthja – – – – 200 70 70 K/W K/W K/W PG-DSO-8 PG-DSO-14 PG-DSO-20 Junction-pin Rthjp – – – 30 30 30 K/W K/W K/W PG-DSO-81) PG-DSO-142) PG-DSO-202) 1) Measured to pin 5. 2) Measured to pin 4. Data Sheet 8 Rev. 2.6 2018-11-20 OPTIREG™ Linear TLE4269 5 V low drop fixed voltage regulator General product characteristics 3.2 Electrical characteristics Table 5 Electrical characteristics VI = 13.5 V; -40°C ≤ Tj ≤ 125°C Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Output voltage VQ 4.90 5.00 5.10 V 1 mA ≤ IQ ≤ 100 mA, 6 V ≤ VI ≤ 16 V Current limit IQ 150 200 500 mA – Current consumption; Iq = II - IQ Iq – 240 300 μA IQ ≤ 1 mA, Tj < 85°C Current consumption; Iq = II - IQ Iq – 250 700 μA IQ = 10 mA Current consumption; Iq = II - IQ Iq – 2 8 mA IQ = 50 mA Drop voltage Vdr – 0.25 0.5 V IQ = 100 mA1) Load regulation ∆VQ – 10 30 mV IQ = 5 mA to 100 mA Line regulation ∆VQ – 10 40 mV VI = 6 V to 26 V, IQ = 1 mA Switching threshold VRT 4.50 4.65 4.80 V – Reset adjust switching threshold VRADJ, TH 1.26 1.35 1.44 V VQ > 3.5 V Reset pull-up – 10 20 40 kΩ – Saturation voltage VRO, SAT – 0.1 0.4 V Rintern Upper delay switching threshold VUD 1.4 1.8 2.2 V – Lower delay switching threshold VLD 0.3 0.45 0.60 V – Saturation voltage delay capacitor VD, SAT – – 0.1 V VQ < VRT Charge current ID 3.0 6.5 9.5 μA VD = 1 V Delay time L → H td 17 28 – ms CD = 100 nF Delay time H → L tt – 1 – μs CD = 100 nF Sense threshold high VSI, high 1.24 1.31 1.38 V – Sense threshold low VSI, low 1.16 1.20 1.28 V – Sense output low voltage VSO, low – 0.1 0.4 V VSI < 1.20 V; VQ > 3 V, Rintern Sense pull-up – 10 20 40 kΩ – Sense input current ISI -1 0.1 1 μA – Reset generator Input voltage sense 1) Drop voltage = VI - VQ measured when the output voltage has dropped 100 mV from the nominal value obtained at 13.5 V input. Data Sheet 9 Rev. 2.6 2018-11-20 OPTIREG™ Linear TLE4269 5 V low drop fixed voltage regulator Functional description 4 Functional description The control amplifier compares a reference voltage, made highly accurate by resistance balancing, with a voltage proportional to the output voltage and drives the base of the series PNP transistor via a buffer. Saturation control as a function of the load current prevents any over-saturation of the power element. The reset output RO is in high-state if the voltage on the delay capacitor CD is greater or equal VUD. The delay capacitor CD is charged with the current ID for output voltages greater than the reset threshold VRT. If the output voltage gets lower than VRT (‘reset condition’) a fast discharge of the delay capacitor CD sets in and as soon as VD gets lower than VLD the reset output RO is set to low-level. The time gap for the delay capacitor discharge is the reset reaction time tRR. The reset threshold VRT can be decreased via an external voltage divider connected to the pin RADJ. In this case the reset condition is reached if VQ < VRT and VRADJ < VRAQDJ, TH. Dimensioning the voltage divider (Figure 5) according to: (4.1) V RAD ( J, TH ) × ( R ADJ1 + R ADJ2 ) V THRES = ---------------------------------------------------------------------------R ADJ2 the reset threshold can be decreased down to 3.5 V. If the reset-adjust-option is not needed the RADJ-pin should be connected to GND causing the reset threshold to go to its default value (typ. 4.65 V). A built in comparator compares the signal of the pin SI, normally fed by a voltage divider from the input voltage, with the reference and gives an early warning on the pin SO. It is also possible to superwise another voltage e.g. of a second regulator, or to build a watchdog circuit with few external components. Data Sheet 10 Rev. 2.6 2018-11-20 OPTIREG™ Linear TLE4269 5 V low drop fixed voltage regulator Application information 5 Application information The input capacitor CI is necessary for compensating line influences. Using a resistor of approx. 1 Ω in series with CI, the oscillating circuit consisting of input inductivity and input capacitance can be damped. The output capacitor CQ is necessary for the stability of the regulating circuit. Stability is guaranteed at values ≥ 10 μF and an ESR ≤ 10 Ω within the operating temperature range. For small tolerances of the reset delay the spread of the capacitance of the delay capacitor and its temperature coefficient should be noted. 5.1 Application diagram ΙΙ ΙQ Ι CΙ 470 nF 1000 μF Q TLE 4269 Ι SΙ VΙ SI D VSΙ GND ΙD CD 100 nF R Ι GND VR CQ 22 μF RADJ1 Ι RADJ VQ RADJ SO VSO VRADJ VD RADJ2 AES01670 Figure 5 Measuring circuit VI t VQ < t RR V RT dV I D = dt C D VD t V UD V LD V RO td t t RR VRO, SAT t Power-on-Reset Figure 6 Data Sheet Thermal Shutdown Voltage Dip at Input Undervoltage Secondary Spike Overload at Output AED01542 Reset timing diagram 11 Rev. 2.6 2018-11-20 OPTIREG™ Linear TLE4269 5 V low drop fixed voltage regulator Application information Sense Input Voltage VSI, High VSI, Low t Sense Output High Low t AED03049 Figure 7 Data Sheet Sense timing diagram 12 Rev. 2.6 2018-11-20 OPTIREG™ Linear TLE4269 5 V low drop fixed voltage regulator Application information 5.2 Typical performance characteristics Charge current ID versus junction temperature Tj ΙD Switching voltage VUD and VLD versus junction temperature Tj AED01803 16 μA 14 V Ι = 13.5 V V C = 1.0 V 12 AED01804 3.2 VD V 2.8 V Ι = 13.5 V 2.4 10 2.0 8 1.6 6 1.2 4 0.8 2 0.4 VUD VLD 0 -40 0 40 80 0 -40 120 C 160 0 40 80 Tj Tj Drop voltage Vdr versus output current IQ Reset adjust switching threshold VRADJ,TH versus junction temperature Tj AED01805 500 V dr 120 C 160 AED01806 1.7 V V RADJ, TH 1.6 mV 400 1.5 1.4 300 1.3 Tj = 125 C 200 1.2 Tj = 25 C 1.1 100 1.0 0 0 30 60 90 120 mA 0.9 -40 180 ΙQ Data Sheet 0 40 80 120 C 160 Tj 13 Rev. 2.6 2018-11-20 OPTIREG™ Linear TLE4269 5 V low drop fixed voltage regulator Application information Current consumption IQ versus input voltage VI Output voltage VQ versus input voltage VI AED01807 30 Ι q mA VQ V 25 10 20 8 RL = 33 Ω 15 6 10 RL = 50 Ω 4 RL = 50 Ω RL = 100 Ω 5 0 AED01808 12 2 RL = 200 Ω 0 10 20 30 0 40 V 50 0 2 4 6 VΙ Sense threshold VSI versus junction temperature Tj VΙ AED01809 AED01671 5.2 VQ V V Ι = 13.5 V 1.5 V 10 Output voltage VQ versus junction temperature Tj 1.6 V SI 8 V 5.1 V Ι = 13.5 V 1.4 5.0 Sense Output High 1.3 4.9 Sense Output Low 1.2 4.8 1.1 4.7 1.0 -40 0 40 80 4.6 -40 120 C 160 Tj Data Sheet 0 40 80 120 C 160 Tj 14 Rev. 2.6 2018-11-20 OPTIREG™ Linear TLE4269 5 V low drop fixed voltage regulator Application information Output current IQ versus input voltage VI Current consumption IQ versus output current IQ AED01810 350 AED01811 12 Ι Q mA Ι q mA 300 10 V Ι = 13.5 V Tj = 25 C 250 8 Tj = 25 C 200 6 150 Tj = 125 C 4 100 2 50 0 0 10 20 30 0 40 V 50 Current consumption Iq versus output current IQ Ιq 0 20 40 60 80 mA 120 ΙQ VΙ – AED01812 1.6 mA 1.4 V Ι = 13.5 V Tj = 25 C 1.2 1.0 0.8 0.6 0.4 0.2 0 0 10 20 30 40 mA 50 ΙQ Data Sheet 15 Rev. 2.6 2018-11-20 OPTIREG™ Linear TLE4269 5 V low drop fixed voltage regulator Package information 6 Package information 1.27 0.1 0.41 +0.1 -0.06 0.2 8 5 Index Marking 1 4 5 -0.21) M 0.19 +0.0 6 B 8° MAX. 4 -0.21) 1.75 MAX. 0.175 ±0.07 (1.45) 0.35 x 45° 0.64 ±0.25 A B 8x 6 ±0.2 A 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Lead width can be 0.61 max. in dambar area GPS01229 1) Figure 8 PG-DSO-8 Figure 9 PG-DSO-14 1) 1) Dimensions in mm Data Sheet 16 Rev. 2.6 2018-11-20 OPTIREG™ Linear TLE4269 5 V low drop fixed voltage regulator 2.65 MAX. 0.35 x 45˚ 1.27 0.35 0.1 20x +0.15 2) 0.2 20x 20 0.4 +0.8 0.23 +0.09 7.6 -0.2 1) 8˚ MAX. 2.45 -0.2 0.2 -0.1 Package information 10.3 ±0.3 11 1 10 12.8 -0.2 1) Index Marking 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Does not include dambar protrusion of 0.05 max. per side Figure 10 PG-DSO-20 GPS05094 1) Green product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). Further information on packages https://www.infineon.com/packages 1) Dimensions in mm Data Sheet 17 Rev. 2.6 2018-11-20 OPTIREG™ Linear TLE4269 5 V low drop fixed voltage regulator Revision history 7 Revision history Revision Date Changes 2.6 2018-11-20 Update layout and structure Updated packaged drawing “PG-DSO-14” Editorial changes 2.5 2013-11-25 Package version changed: - PG-DSO-20-35 to PG-DSO-20 Package naming harmonized according to Infineon standards: - PG-DSO-8-16 to PG-DSO-8 - PG-DSO-14-30 to PG-DSO-14 2.4 2007-03-20 Initial version of RoHS-compliant derivate of TLE4269 Page 1: AEC certified statement added Page 1 and Page 16 : RoHS compliance statement and Green product feature added Page 1 and Page 16 : Package changed to RoHS compliant version Legal Disclaimer updated 2.3 2004-01-01 Data Sheet 18 Rev. 2.6 2018-11-20 Trademarks All referenced product or service names and trademarks are the property of their respective owners. Edition 2018-11-20 Published by Infineon Technologies AG 81726 Munich, Germany © 2018 Infineon Technologies AG. All Rights Reserved. Do you have a question about any aspect of this document? Email: erratum@infineon.com Document reference Z8F52238104 IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ("Beschaffenheitsgarantie"). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer's compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer's products and any use of the product of Infineon Technologies in customer's applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer's technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.
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