D a t a S h e et , V 2 . 1 , F e b ru a r y 20 0 5
Differential Two-Wire Hall Effect
S e n s o r - I C f o r W h e el S p e e d A p p l i c a t i o n s
TLE4941
TLE4941C
Sensors
N e v e r
s t o p
t h i n k i n g .
Edition 2004-03-19
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
81669 München, Germany
© Infineon Technologies AG 2005.
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as a guarantee of
characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding
circuits, descriptions and charts stated herein.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
TLE4941 Series
Differential Two-Wire Hall Effect Sensor IC
TLE4941
TLE4941C
Features
•
•
•
•
•
•
•
•
•
•
Two-wire current interface
Dynamic self-calibration principle
Single chip solution
No external components needed
High sensitivity
South and north pole pre-induction possible
High resistance to piezo effects
Large operating air-gaps
Wide operating temperature range
TLE4941C: 1.8 nF overmolded capacitor
PG-SSO-2-1
PG-SSO-2-2
Type
Marking
Ordering Code
Package
TLE4941
4100R
Q62705-K714
PG-SSO-2-1
TLE4941C
41C0R
Q62705-K715
PG-SSO-2-2
The Hall Effect sensor IC TLE4941 is designed to provide information about rotational
speed to modern vehicle dynamics control systems and ABS. The output has been
designed as a two wire current interface. The sensor operates without external
components and combines a fast power-up time with a low cut-off frequency. Excellent
accuracy and sensitivity is specified for harsh automotive requirements as a wide
temperature range, high ESD and EMC robustness. State-of-the art BiCMOS technology
is used for monolithic integration of the active sensor areas and the signal conditioning
circuitry.
Finally, the optimized piezo compensation and the integrated dynamic offset
compensation enable easy manufacturing and elimination of magnet offsets.
The TLE4941C is additionally provided with an overmolded 1.8 nF capacitor for
improved EMI performance.
Data Sheet
3
V2.1, 2005-02
TLE4941
TLE4941C
Pin Configuration
(view on branded side of component)
B
2.67
2.5
A
S 0015
Marking
1
0.3 A
4100R
VCC
Center of
sensitive area
1.44
Data Code
0.3 B
GND
VCC
2
GND
AEP03200
Figure 1
"VCC"
Power Supply
Regulator
Main
Comp
"GND"
Oscillator
(syst clock)
PGA
Hall
Probes
Speed
ADC
Offset
DAC
Gain Range
Digital
Circuit
AEB03201
Figure 2
Data Sheet
Block Diagram
4
V2.1, 2005-02
TLE4941
TLE4941C
Functional Description
The differential hall sensor IC detects the motion of ferromagnetic and permanent
magnet structures by measuring the differential flux density of the magnetic field. To
detect the motion of ferromagnetic objects the magnetic field must be provided by a back
biasing permanent magnet. Either south or north pole of the magnet can be attached to
the rear unmarked side of the IC package.
Magnetic offsets of up to ± 20 mT and device offsets are cancelled by a self-calibration
algorithm. Only a few transitions are necessary for self-calibration. After the initial
calibration sequence switching occurs when the input signal is crossing the arithmetic
mean of its max. and min. value (e.g. zero-crossing for sinusoidal signals).
The ON and OFF state of the IC are indicated by High and Low current consumption.
Circuit Description
The circuit is supplied internally by a 3 V voltage regulator. An on-chip oscillator serves
as clock generator for the digital part of the circuit.
TLE4941 signal path is comprised of a pair of hall probes, spaced at 2.5 mm, a
differential amplifier including a noise-limiting low-pass filter and a comparator feeding a
switched current output stage. In addition an offset cancellation feedback loop is
provided by a signal-tracking A/D converter, a digital signal processor (DSP) and an
offset cancellation D/A converter.
During the startup phase (un-calibrated mode) the output is disabled (I = ILOW).
The differential input signal is digitized in the speed A/D converter and fed into the DSP.
The minimum and maximum values of the input signal are extracted and their
corresponding arithmetic mean value is calculated. The offset of this mean value is
determined and fed into the offset cancellation DAC.
After successful correction of the offset, the output switching is enabled.
In running mode (calibrated mode) the offset correction algorithm of the DSP is switched
into a low-jitter mode, avoiding oscillation of the offset DAC LSB. Switching occurs at
zero-crossing. It is only affected by the (small) remaining offset of the comparator and by
the remaining propagation delay time of the signal path, mainly determined by the noiselimiting filter. Signals below a defined threshold ∆BLimit are not detected to avoid
unwanted parasitic switching.
Package Information
Pure tin covering (green lead plating) is used. Leadframe material is Wieland K62 (UNS:
C18090) and contains CuSn1CrNiTi. Product is RoHS (restriction of hazardous
substances) compliant when marked with letter G in front or after the data code marking
and may contain a data matrix code on the rear side of the package (see also information
note 136/03). Please refer to your Key account team or regional sales if you need further
information.
Data Sheet
5
V2.1, 2005-02
TLE4941
TLE4941C
Table 1
Absolute Maximum Ratings
Tj = – 40°C to 150°C, 4.5 V ≤ Vcc ≤ 16.5 V
Parameter
Supply voltage
Symbol
VCC
Limit Values
min.
max.
– 0.3
–
–
16.5
–
20
–
22
–
24
–
27
Unit
Remarks
V
Tj < 80°C
Tj = 170°C
Tj = 150°C
t = 10 × 5 min.
t = 10 × 5 min.,
RM ≥ 75 Ω
included in VCC
t = 400 ms, RM ≥ 75 Ω
included in VCC
Reverse polarity current
Irev
–
200
mA
External current
limitation required,
t< 4 h
Junction temperature
Tj
–
150
°C
5000 h, VCC < 16.5 V
–
160
2500 h, VCC < 16.5 V
(not additive)
–
170
500 h, VCC < 16.5 V
(not additive)
–
190
4 h, VCC < 16.5 V
10000
–
h
– 40
150
°C
–
190
K/W
Active lifetime
Storage temperature
Thermal resistance
PG-SSO-2-1
tB,active
TS
RthJA
1)
1) Can be improved significantly by further processing like overmolding
Note: Stresses in excess of those listed here may cause permanent damage to the
device. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
Data Sheet
6
V2.1, 2005-02
TLE4941
TLE4941C
Table 2
ESD Protection
Human Body Model (HBM) tests according to:
Standard EIA/JESD22-A114-B HBM (covers MIL STD 883D)
Parameter
Symbol
ESD-Protection
TLE4941
TLE4941C
Table 3
VESD
Limit Values
min.
max.
–
–
± 12
± 12
Unit
Notes
kV
R = 1.5 kΩ,
C = 100 pF
Unit
Remarks
Operating Range
Parameter
Symbol
Limit Values
min.
max.
Supply voltage
VCC
4.5
20
V
Directly on IC
leads includes
not the RM
voltage drop
Supply voltage ripple
VAC
–
6
Vpp
VCC = 13 V
0 < f < 50 kHz
Junction temperature
Tj
– 40
150
°C
–
170
B0
∆Bstat., l/r
– 500
+ 500
mT
– 20
+ 20
mT
∆B
– 120
+ 120
mT
Pre-induction
Pre-induction offset
between outer probes
Differential Induction
500 h,
VCC ≤ 16.5 V,
increased jitter
permissible
Note: Within the operating range the functions given in the circuit description are fulfilled.
Data Sheet
7
V2.1, 2005-02
TLE4941
TLE4941C
Table 4
Electrical Characteristics
All values specified at constant amplitude and offset of input signal, over
operating range, unless otherwise specified.
Typical values correspond to VCC = 12 V and TA = 25°C
Parameter
Supply current
Supply current
Supply current ratio
Output rise/fall slew rate
TLE4941
Output rise/fall slew rate
TLE4941C
Symbol
ILOW
IHIGH
IHIGH / ILOW
t r, t f
t r, t f
Limit Values
Unit
min.
typ.
max.
5.9
7
8.4
mA
11.8
14
16.8
mA
1.9
–
–
12
7.5
–
–
26
24
8
8
–
–
22
26
Remarks
mA/µs RM ≤ 150 Ω
RM ≤ 750 Ω
See Figure 4
RM = 75 Ω
mA/µs T < 125°C
T < 170°C
See Figure 4
Current ripple dIX/dVCC
IX
∆BLimit
–
0.35
–
0.8
–
1.5
1.7
Initial calibration
delay time
td,input
–
–
300
Magnetic edges required
for initial calibration 2)
nstart
–
3
6 3)
Frequency
f
1
2500
–
–
2500 Hz
10000
Frequency changes
df/dt
–
–
± 100 Hz/ms
Duty cycle
duty
40
50
60
%
6)
Jitter, Tj < 150°C
Tj < 170°C
1 Hz < f < 2500 Hz
SJit-close
–
–
–
–
±2
±3
%
7)
Jitter, Tj < 150°C
Tj < 170°C
2500 Hz < f < 10000 Hz
SJit-close
–
–
–
–
±3
± 4.5
%
7)
Limit threshold
1 Hz < f < 2500 Hz
2500 Hz < f < 10000 Hz
Data Sheet
–
90
µA/V
mT
1)
µs
Additional to
nstart
8
magn. 7th edge correct
edges 4)
5)
Measured
@∆B = 2 mT
sine wave Def.
See Figure 4
1σ value
VCC = 12 V
∆B ≥ 2 mT
1σ value
VCC = 12 V
∆B ≥ 2 mT
V2.1, 2005-02
TLE4941
TLE4941C
Table 4
Electrical Characteristics (cont’d)
All values specified at constant amplitude and offset of input signal, over
operating range, unless otherwise specified.
Typical values correspond to VCC = 12 V and TA = 25°C
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit
Remarks
Jitter, Tj < 150°C
Tj < 170°C
1 Hz < f < 2500 Hz
SJit-far
–
–
–
–
±4
±6
%
7)
Jitter, Tj < 150°C
Tj < 170°C
2500 Hz < f < 10000 Hz
SJit-far
–
–
–
–
±6
±9
%
7)
Jitter at board net ripple
SJit-AC
–
–
±2
%
7)
1σ value
VCC = 12 V
2 mT ≥ ∆B > ∆BLimit
1σ value
VCC = 12 V
2 mT ≥ ∆B > ∆BLimit
VCC = 13 V ± 6 Vpp
0 < f < 50 kHz
∆B = 15 mT
1) Magnetic amplitude values, sine magnetic field, limits refer to the 50% critera. 50% of edges are missing
2) The sensor requires up to nstart magnetic switching edges for valid speed information after power-up or after a
stand still condition. During that phase the output is disabled.
3) See “Appendix B”
4) One magnetic edge is defined as a montonic signal change of more than 3.3 mT
5) High frequency behavior not subject to production test - verified by design/characterization. Frequency above
2500 Hz may have influence on jitter performance and magnetic thresholds.
6) During fast offset alterations, due to the calibration algorithm, exceeding the specified duty cycle is permitted
for short time periods
7) Not subject to production test verified by design/characterization
Data Sheet
9
V2.1, 2005-02
TLE4941
TLE4941C
Output Description
Under ideal conditions, the output shows a duty cycle of 50%. Under real conditions, the
duty cycle is determined by the mechanical dimensions of the target wheel and its
tolerances (40% to 60% might be exceeded for pitch >> 5 mm due to the zero-crossing
principle).
Speed Signal
Sensor Internal
Transferred
Speed Signal
AET03202
Figure 3
Speed Signal (half a period = 0.5 x 1/fspeed)
I
tr
tf
IHIGH
90%
50%
ILOW
10%
t1
T
t
AET03203
Figure 4
Data Sheet
Definition of Rise and Fall Time, Duty = t1/T x 100%
10
V2.1, 2005-02
TLE4941
TLE4941C
Table 5
Electro Magnetic Compatibility (values depend on RM!)
Ref. ISO 7637-1; test circuit 1;
∆B = 2 mT (amplitude of sinus signal); VCC = 13.5 V, fB = 100 Hz; T = 25°C; RM ≥ 75 Ω
Parameter
Symbol
Level/Typ
Status
Testpulse 1
Testpulse 2
Testpulse 3a
Testpulse 3b
Testpulse 4
Testpulse 5
VEMC
IV / – 100 V
IV / 100 V
IV / – 150 V
IV / 100 V
IV / – 7 V
IV / 86.5 3) V
C 1)
C 1)
A
A
B 2)
C
1) According to 7637-1 the supply switched “OFF” for t = 200 ms
2) According to 7637-1 for test pulse 4 the test voltage shall be 12 V ± 0.2 V. Measured with RM = 75 Ω only.
Mainly the current consumption will decrease. Status C with test circuit 1.
3) Applying in the board net a suppressor diode with sufficient energy absorption capability
Note: Values are valid for all TLE4941/42 types!
Ref. ISO 7637-3; test circuit 1;
∆B = 2 mT (amplitude of sinus signal); VCC = 13.5 V, fB = 100 Hz; T = 25°C; RM ≥ 75 Ω
Parameter
Symbol
Level/Typ
Status
Testpulse 1
Testpulse 2
Testpulse 3a
Testpulse 3b
VEMC
IV / – 30 V
IV / 30 V
IV / – 60 V
IV / 40 V
A
A
A
A
Note: Values are valid for all TLE4941/42 types!
Ref. ISO 11452-3; test circuit 1; measured in TEM-cell
∆B = 2 mT; VCC = 13.5 V, fB = 100 Hz; T = 25°C
Parameter
Symbol
Level/Typ
Remarks
EMC field strength
ETEM-Cell
IV / 200 V/m
AM = 80%, f = 1 kHz
Note: Only valid for non C- types!
Ref. ISO 11452-3; test circuit 1; measured in TEM-cell
∆B = 2 mT; VCC = 13.5 V, fB = 100 Hz; T = 25°C
Parameter
Symbol
Level/Typ
Remarks
EMC field strength
ETEM-Cell
IV / 250 V/m
AM = 80%,f = 1 kHz
Note: Only valid for C-types!
Data Sheet
11
V2.1, 2005-02
TLE4941
TLE4941C
EMC-Generator
Mainframe
D1
VCC
Sensor
GND
VEMC
C1
D2
RM
C2
AES03199
Components: D1:
D2:
C1:
C2:
RM:
Figure 5
1N4007
T 5Z27 1J
10 µF / 35 V
1 nF / 1000 V
75 Ω / 5 W
Test Circuit 1
d
Branded Side
Hall-Probe
d : Distance chip to branded side of IC
PG-SSO-2-1/2 : 0.3 ±0.08 mm
AEA02961
Figure 6
Data Sheet
Distance Chip to Upper Side of IC
12
V2.1, 2005-02
TLE4941
TLE4941C
Package Outlines
PG-SSO-2-1
(Plastic Single Small Outline Package)
5.34 ±0.05
2 A
0.2
7˚
CODE
0.87 ±0.05
2
9 -0.5
2.54
4 ±0.3
6.35 ±0.4
12.7 ±0.3
Total tolerance at 10 pitches ±1
1 -1
1
6 ±0.5
2x
0.2 +0.1
18 ±0.5
2x
0.5
38 MAX.
0.1
1.67 ±0.05
23.8 ±0.5
1.9 MAX.
0.25 ±0.05
+0.75
(14.8)
(Useable Length)
CODE
1 MAX.1)
(0.25)
3.38 ±0.06
3.71 ±0.08
CODE
1 x 45˚±1˚
1.2 ±0.1
1.9 MAX.
1 -0.1
7˚
12.7 ±1
0.1 MAX.
5.16 ±0.08
A
Adhesive
Tape
Tape
0.25 -0.15
0.39 ±0.1
GPO09296
1) No solder function area
Figure 7
Data Sheet
13
V2.1, 2005-02
TLE4941
TLE4941C
PG-SSO-2-2
(Plastic Single Small Outline Package)
3.01
5.16 ±0.08
1.81±0.05
1 -1
0.25 ±0.05
2.2 ±0.05
7˚
7˚
0.2 2x
9 -0.5
0.2 B
1
0.5 2x
1.2 ±0.05
2
6 ±0.5
1.9 MAX.
0.1
0.2 +0.1
1.5 ±0.05
38 MAX.
A
0.87 ±0.05
1.67 ±0.05
2x
(14.8)
(Useable Length)
23.8 ±0.5
A
CODE
+0.75
2.54
CODE
0.25 ±0.05
18 ±0.5
1 x 45˚±1˚
1.9 MAX.
1-0.1
0.1 MAX.
B
12.7 ±1
7.07±0.1
(8.17)
2 A
5.16 ±0.08
CODE
10.2 ±0.1
0.2
1.2 ±0.1
1)
0.65 ±0.1
(0.25)
3.38 ±0.06
3.71±0.08
5.34 ±0.05
A
Adhesive
Tape
A-A
(1.3)
Tape
12.7 ±0.3
Total tolerance at 10 pitches ±1
(2.4)
(2.7)
4 ±0.3
6.35 ±0.4
0.25 -0.15
0.39 ±0.1
Capacitor
GPO09448
5.34 ±0.05
1) No solder function area
Figure 8
You can find all of our packages, sorts of packing and others in our
Infineon Internet Page “Products”: http://www.infineon.com/products.
Data Sheet
14
Dimensions in mm
V2.1, 2005-02
TLE4941
TLE4941C
Appendix A
Typical Diagrams (measured performance)
Tc = Tcase, IC = approx. Tj - 5°C
Supply Current Ratio IHIGH / ILOW
Supply Current
AED03215
18
mA
AED03216
2.4
IHIGH , ILOW
IHIGH / ILOW
16
2.3
IHIGH
14
2.2
12
2.1
10
2.0
8
1.9
ILOW
6
-40
0
40
80
120
1.8
-40
˚C 200
0
40
80
120
TC
˚C 200
TC
Supply Current = f(Vcc)
Supply Current Ratio IHIGH/ILOW = f(Vcc)
AED03217
20
mA
AED03218
2.4
IHIGH , ILOW
IHIGH / ILOW
2.2
16
IHIGH
IHIGH / ILOW
14
2.0
12
10
1.8
8
6
ILOW
0
5
10
15
20
1.6
25 V 30
VCC
Data Sheet
0
5
10
15
20
25 V 30
VCC
15
V2.1, 2005-02
TLE4941
TLE4941C
Slew Rate without C, RM = 75 Ω
Slew Rate with C = 1.8 nF, RM = 75 Ω
AED03219
26
mA/µs
24
AED03220
26
mA/µs
24
Fall
Slew Rate
Slew Rate
22
22
20
20
18
Rise
16
18
Fall
14
16
Rise
12
14
10
12
-40
0
40
80
120
8
-40
˚C 200
0
40
80
120
TC
TC
Slew Rate without C = f(RM)
AED03222
22
mA/µs
18
Fall
Slew Rate
20
Slew Rate
Slew Rate with C = 1.8 nF = f(RM)
AED03221
22
mA/µs
21
˚C 200
19
18
Fall
Rise
16
14
12
17
10
Rise
16
8
15
6
14
4
13
2
12
0
200
400
600
0
800 Ω 1000
RM
Data Sheet
0
200
400
600
800 Ω 1000
RM
16
V2.1, 2005-02
TLE4941
TLE4941C
Magnetic Threshold
∆BLimit at f = 1 kHz
∆B
Magnetic Threshold
∆BLimit = f(f)
AED03223
1.0
mT
AED03224
1.0
mT
BLimit
0.9
0.9
BLimit
0.8
0.8
0.7
0.7
0.6
0.6
0.5
-40
0
40
80
120
0.5 0
10
˚C 200
BLimit
101
102
103 Hz 104
TC
f
Jitter 1σ at ∆B = 2 mT, 1 kHz
Delaytime td1)
AED03225
0.9
%
0.8
AED03226
12
td µs
10
Jitter
0.7
0.6
8
td @ 2.5 kHz
0.5
6
0.4
4
0.3
0.2
2
0.1
0
-40
0
40
80
120
0
-40
˚C 200
TC
0
40
80
120
˚C 180
TC
1) td is the time between the zero crossing of
∆B = 2 mT sinusoidal input signal and the rising
edge (50%) of the signal current.
Data Sheet
17
V2.1, 2005-02
TLE4941
TLE4941C
Appendix B
Release 1.0
Occurrence of Initial Calibration Delay Time td,input
If there is no input signal (standstill), a new initial calibration is triggered each 0.7 s. This
calibration has a duration td,input of max. 300 µs. No input signal change is detected during
that initial calibration time.
In normal operation (signal startup) the probability of td,input to come into effect is:
td,input / time frame for new calibration 300 µs/700 ms = 0.05%.
After IC resets (e.g. after a significant undervoltage) td,input will always come into effect.
Magnetic Input Signal Extremely Close to a Switching Threshold of PGA at Signal
Startup
After signal startup generally all PGA switching into the appropriate gain state happens
within less than one signal period. This is included in the calculation for nDZ-Start. For the
very rare case that the signal amplitude is extremely close to a PGA switching threshold
and the full range of following speed ADC respectively, a slight change of the signal
amplitude can cause one further PGA switching. It can be caused by non-perfect
magnetic signal (e.g. amplitude modulation due to tolerances of pole-wheel, tooth wheel
or air gap variation). This additional PGA switching can result in a further delay of the
output signal (nDZ-Start) up to three magnetic edges leading to a worst case of nDZ-Start = 9.
Due to the low probability of this case it is not defined as max. value in the data sheet.
(For a more detailed explanation please refer to the document “TLE4941/42 - Frequently
Asked Questions”).
Data Sheet
18
V2.1, 2005-02
TLE4941
TLE4941C
Revision History:2005-02, V2.1
Previous Version: 2004-01, V2.0
Page
Subjects (major changes since last revision)
3,13,14
Package name changed from P-... to PG-...
13,14
Figure 7,8: Package Outline PG-SSO-2-1, PG-SSO-2-2
- Tape thickness changed from 0.50±0.1mm to 0.39±0.1 mm
- Package mold dimension changed from 5.38±0.05 mm to 5.34±0.05 mm
(Note: only the dimensions in the drawing changed, but not the package
dimensions)
15-17
Appendix A inserted
18
Appendix B inserted
-
New format of data sheet
For questions on technology, delivery and prices please contact the Infineon
Technologies offices in Germany or the Infineon Technologies Companies and
Representatives worldwide: see our webpage at http://www.infineon.com
We Listen to Your Comments
Any information within this document that you feel is wrong, unclear or missing at all?
Your feedback will help us to continuously improve the quality of this document.
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Data Sheet
19
V2.1, 2005-02
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