Unipolar Hall Switch
High Precision Automotive Unipolar Hall Effect Switch
TLE4964-2K
SP000847996
TLE4964-2K
Data Sheet
Revision 1.2, 2019-12-20
Sense & Control
TLE4964-2K
Table of contents
Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
List of tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
List of figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1
1.1
1.2
1.3
1.4
Product description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Target applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Product validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
2.1
2.2
2.3
2.4
2.5
2.6
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pin configuration (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Functional block description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Default start-up behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3
3.1
3.2
3.3
3.4
3.5
Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical and magnetic characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electro magnetic compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
11
12
13
14
16
4
4.1
4.2
4.3
4.4
4.5
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package outline PG-SC59-3-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Packing information PG-SC59-3-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Footprint PG-SC59-3-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PG-SC59-3-5 distance between chip and package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18
18
18
19
19
19
5
Graphs of the magnetic parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6
Graphs of the electrical parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Data Sheet
2
5
5
5
6
6
Revision 1.2, 2019-12-20
TLE4964-2K
List of tables
Table 1
Table 2
Table 3
Table 4
Table 5
Table 6
Table 7
Table 8
Table 9
Data Sheet
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin description PG-SC59-3-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Absolute maximum rating parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
ESD protection (TA = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Operating conditions parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
General electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Magnetic characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Magnetic compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Electro magnetic compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3
Revision 1.2, 2019-12-20
TLE4964-2K
List of figures
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7
Figure 8
Figure 9
Figure 10
Figure 11
Figure 12
Figure 13
Figure 14
Figure 15
Figure 16
Figure 17
Figure 18
Figure 19
Figure 20
Figure 21
Figure 22
Figure 23
Figure 24
Figure 25
Figure 26
Figure 27
Figure 28
Figure 29
Figure 30
Figure 31
Figure 32
Figure 33
Data Sheet
TLE4964-2K in the PG-SC59-3-5 package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin configuration and center of sensitive area. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Functional block diagram TLE4964-2K. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Timing diagram TLE4964-2K. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Output signal TLE4964-2K. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Start-up behavior of the TLE4964-2K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Application circuit 1: with external resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Application circuit 2: without external resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Definition of magnetic field direction PG-SC59-3-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
EMC test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
PG-SC59-3-5 package outline (all dimensions in mm) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Packing of the PG-SC59-3-5 in a tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Footprint PG-SC59-3-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Distance between chip and package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Marking of TLE4964-2K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Operating point (BOP) of the TLE4964-2K over temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Release point (BRP) of the TLE4964-2K over temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Hysteresis (BHys) of the TLE4964-2K over temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Power on time tPON of the TLE4964-2K over temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Signal delay time of the TLE4964-2K over temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Supply current of the TLE4964-2K over temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Supply current of the TLE4964-2K over supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Output current limit of the TLE4964-2K over temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Output current limit of the TLE4964-2K over applied pull-up voltage . . . . . . . . . . . . . . . . . . . . . . . 22
Output fall time of the TLE4964-2K over temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Output fall time of the TLE4964-2K over applied pull-up voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Output rise time of the TLE4964-2K over temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Output rise time of the TLE4964-2K over applied pull-up voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Output leakage current of the TLE4964-2K over temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Saturation voltage of the TLE4964-2K over temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Saturation voltage of the TLE4964-2K over output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Effective noise of the TLE4964-2K thresholds over temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Output signal jitter of the TLE4964-2K over temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4
Revision 1.2, 2019-12-20
TLE4964-2K
Product description
1
Product description
1.1
Overview
Characteristic
Supply Voltage
Supply Current
Sensitivity
Interface
Temperature
Unipolar Hall
Effect Switch
3.0 V ~ 32 V
1.6 mA
Low
BOP: 28 mT
BRP: 22.5 mT
Open Drain
Output
-40°C to 170°C
Figure 1
TLE4964-2K in the PG-SC59-3-5 package
1.2
Features
•
3.0 V to 32 V operating supply voltage
•
Operation from unregulated power supply
•
Reverse polarity protection (-18 V)
•
Overvoltage capability up to 42 V without external resistor
•
Output overcurrent and overtemperature protection
•
Active error compensation
•
High stability of magnetic thresholds
•
Low jitter (typ. 0.35 μs)
•
High ESD performance
•
SOT23 like SMD package PG-SC59-3-5
Table 1
Ordering information
Product name
Product type
Ordering code
Package
TLE4964-2K
Unipolar Hall Switch
SP000847996
PG-SC59-3-5
Data Sheet
5
Revision 1.2, 2019-12-20
TLE4964-2K
Product description
1.3
Target applications
Target applications for the TLE496x Hall Switch family are all applications which require a high precision
Hall Switch with an operating temperature range from -40°C to 170°C. Its superior supply voltage range from
3.0 V to 32 V with overvoltage capability (e.g. load-dump) up to 42 V without external resistor makes it ideally
suited for automotive and industrial applications.
The TLE4964-2K is a unipolar switch with a typical operating point BOP = 28 mT and a hysteresis of
BHYS = 5.5 mT. It is ideally suited for various position detection applications.
1.4
Product validation
Qualified for automotive applications. Product validation according to AEC-Q100.
Data Sheet
6
Revision 1.2, 2019-12-20
TLE4964-2K
Functional description
2
Functional description
2.1
General
The TLE4964-2K is an integrated Hall effect switch designed specifically for highly accurate applications with
superior supply voltage capability, operating temperature range and temperature stability of the magnetic
thresholds.
2.2
Pin configuration (top view)
Center of
Sensitive Area
3
0.8±0.1
1
2
1.5±0.1
SC59
Figure 2
Pin configuration and center of sensitive area
2.3
Pin description
Table 2
Pin description PG-SC59-3-5
Pin no.
Symbol
Function
1
VDD
Supply voltage
2
Q
Output
3
GND
Ground
Data Sheet
7
Revision 1.2, 2019-12-20
TLE4964-2K
Functional description
2.4
Block diagram
VDD
To All Subcircuits
Voltage
Regulator
Oscillator and
Sequencer
Bias and
Compensation
Circuits
Spinning Hall
Probe
Amplifier
Demodulator
Chopper
Multiplexer
Reference
Q
Control
Low Pass
Filter
Comparator
with
Hysteresis
Overtemperature
& overcurrent
protection
GND
Figure 3
Data Sheet
Functional block diagram TLE4964-2K
8
Revision 1.2, 2019-12-20
TLE4964-2K
Functional description
2.5
Functional block description
The chopped Hall IC switch comprises a Hall probe, bias generator, compensation circuits, oscillator and
output transistor.
The bias generator provides currents for the Hall probe and the active circuits. Compensation circuits stabilize
the temperature behavior and reduce influence of technology variations.
The active error compensation (chopping technique) rejects offsets in the signal path and the influence of
mechanical stress to the Hall probe caused by molding and soldering processes and other thermal stress in
the package. The chopped measurement principle together with the threshold generator and the comparator
ensures highly accurate and temperature stable magnetic thresholds.
The output transistor has an integrated overcurrent and overtemperature protection.
B OP
Applied
Magnetic
Field
BR P
td
td
tf
tr
VQ
90%
10%
Figure 4
Timing diagram TLE4964-2K
VQ
B
0 BRP
Figure 5
Data Sheet
BOP
Output signal TLE4964-2K
9
Revision 1.2, 2019-12-20
TLE4964-2K
Functional description
2.6
Default start-up behavior
The magnetic thresholds exhibit a hysteresis BHYS = BOP - BRP. In case of a power-on with a magnetic field B
within hysteresis (BOP > B > BRP) the output of the sensor is set to the pull up voltage level (VQ) per default. After
the first crossing of BOP or BRP of the magnetic field the internal decision logic is set to the corresponding
magnetic input value.
VDDA is the internal supply voltage which is following the external supply voltage VDD.
This means for B > BOP the output is switching, for B < BRP and BOP > B > BRP the output stays at VQ.
VDDA
tPon
3V
The device always applies
VQ level at start -up
Power on ramp
VQ
t
independent from the
applied magnetic field !
Magnetic field above threshold
B > BOP
t
VQ
Magnetic field below threshold
B < BRP
t
VQ
Magnetic field in hysteresis
BOP > B > BRP
t
Figure 6
Data Sheet
Start-up behavior of the TLE4964-2K
10
Revision 1.2, 2019-12-20
TLE4964-2K
Specification
3
Specification
3.1
Application circuit
The following Figure 7 shows one option of an application circuit. As explained above the resistor RS can be
left out (see Figure 8). The resistor RQ has to be in a dimension to match the applied VS to keep IQ limited to the
operating range of maximum 25 mA.
e.g.: VS = 12 V; IQ = 12 V/1200 Ω = 10 mA
Vs
RS = 100Ω
CDD = 47nF
TLE496x
VDD
RQ = 1.2kΩ
Q
TVS diode
e.g. ESD24VS2U
GND
Figure 7
Application circuit 1: with external resistor
Vs
CDD = 47nF
TLE496x
VDD
RQ = 1.2kΩ
Q
TVS diode
e.g. ESD24VS2U
GND
Figure 8
Data Sheet
Application circuit 2: without external resistor
11
Revision 1.2, 2019-12-20
TLE4964-2K
Specification
3.2
Absolute maximum ratings
Table 3
Absolute maximum rating parameters
Parameter
Symbol
1)
Values
Min.
Typ.
Max.
Unit
Note or Test Condition
Supply voltage
VDD
-18
–
32
42
V
–
10h, no external resistor required
Output voltage
VQ
-0.5
–
32
V
–
Reverse output current
IQ
-70
–
–
mA
–
1)
Junction temperature
TJ
-40
–
155
165
175
195
°C
for 2000h (not additive)
for 1000h (not additive)
for 168h (not additive)
for 3 x 1h (additive)
Storage temperature
TS
-40
–
150
°C
–
Thermal resistance
Junction ambient
RthJA
–
–
300
K/W
for PG-SC59-3-5 (2s2p)
Thermal resistance
Junction lead
RthJL
–
–
100
K/W
for PG-SC59-3-5
1) This lifetime statement is an anticipation based on an extrapolation of Infineon’s qualification test results. The actual
lifetime of a component depends on its form of application and type of use etc. and may deviate from such statement.
The lifetime statement shall in no event extend the agreed warranty period.
Attention: Stresses above the max. values listed here may cause permanent damage to the device.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability. Maximum ratings are absolute ratings; exceeding only one of these values may
cause irreversible damage to the integrated circuit.
Calculation of the dissipated power PDIS and junction temperature TJ of the chip (SC59 example):
e.g. for: VDD = 12 V, IS = 2.5 mA, VQSAT = 0.5 V, IQ = 20 mA
Power dissipation: PDIS = 12 V x 2.5 mA + 0.5 V x 20 mA = 30 mW + 10 mW = 40 mW
Temperature ∆T = RthJA x PDIS = 300 K/W x 40 mW = 12 K
For TA = 150°C: TJ = TA + ∆T = 150°C + 12 K = 162°C
Data Sheet
12
Revision 1.2, 2019-12-20
TLE4964-2K
Specification
Table 4
ESD protection1) (TA = 25°C)
Parameter
Symbol
2)
3)
ESD voltage (HBM)
ESD voltage (CDM)
Unit
Note or Test Condition
Min.
Typ.
Max.
VESD
-7
–
7
kV
R = 1.5 kΩ, C = 100 pF
VESD
-1
–
1
kV
–
-15
–
15
kV
with circuit shown in Figure 7 and
Figure 8
ESD voltage (system level)4) VESD
1)
2)
3)
4)
Values
Characterization of ESD is carried out on a sample basis, not subject to production test.
Human Body Model (HBM) tests according to ANSI/ESDA/JEDEC JS-001.
Charge device model (CDM) tests according to JESD22-C101.
Gun test (2 kΩ / 330 pF or 330 Ω / 150 pF) according to ISO 10605-2008.
3.3
Operating range
The following operating conditions must not be exceeded in order to ensure correct operation of
the TLE4964-2K.
All parameters specified in the following sections refer to these operating conditions unless otherwise
mentioned.
The maximum tested magnetic field is 600 mT.
Table 5
Operating conditions parameters
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note or
Test Condition
Supply voltage
VDD
3.0
–
321)
V
–
Output voltage
VQ
-0.3
–
32
V
–
Junction temperature
TJ
-40
–
170
°C
–
Output current
IQ
0
–
25
mA
–
Magnetic signal input frequency2)
fSW
0
–
10
kHz
–
1) Latch-up test with factor 1.5 is not covered. Please see max ratings also.
2) For operation at the maximum switching frequency the magnetic input signal must be 1.4 times higher than for static
fields.This is due to the -3 dB corner frequency of the internal low-pass filter in the signal path.
Data Sheet
13
Revision 1.2, 2019-12-20
TLE4964-2K
Specification
3.4
Electrical and magnetic characteristics
Product characteristics involve the spread of values guaranteed within the specified voltage and ambient
temperature range. Typical characteristics are the median of the production and correspond to VDD = 12 V and
TA = 25°C. The below listed specification is valid in combination with the application circuit shown in Figure 7
and Figure 8.
Table 6
General electrical characteristics
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note or Test Condition
Supply current
IS
1.1
1.6
2.5
mA
–
Reverse current
ISR
–
0.05
1
mA
for VDD = -18 V
–
0.2
0.5
V
IQ = 20 mA
–
0.24
0.6
V
IQ = 25 mA
Output saturation voltage VQSAT
Output leakage current
IQLEAK
–
–
10
μA
–
Output current limitation
IQLIMIT
30
56
70
mA
internally limited and thermal
shutdown
Output fall time1)
tf
0.17
0.4
1
μs
1.2 kΩ / 50 pF, see Figure 4
1)
tr
0.4
0.5
1
μs
1.2 kΩ / 50 pF, see Figure 4
tQJ
–
0.35
1
μs
for square wave signal with 1 kHz
td
12
15
30
μs
see Figure 4
Power-on time1)4)
tPON
–
80
150
μs
VDD = 3 V, B ≤ BRP - 0.5 mT or
B ≥ BOP + 0.5 mT
Chopper frequency1)
fOSC
–
350
kHz
–
Output rise time
1)2)
Output jitter
Delay time
1)
2)
3)
4)
1)3)
Not subject to production test, verified by design/characterization.
Output jitter is the 1 σ value of the output switching distribution.
Systematic delay between magnetic threshold reached and output switching.
Time from applying VDD = 3.0 V to the sensor until the output is valid.
Data Sheet
14
Revision 1.2, 2019-12-20
TLE4964-2K
Specification
Table 7
Magnetic characteristics
Parameter
Symbol
Operating point
Release point
Hysteresis
BOP
BRP
BHYS
Effective noise value of the
magnetic switching points1)
BNeff
Temperature compensation of TC
magnetic thresholds2)
T (°C)
Values
Unit
Note / Test
Condition
mT
–
mT
–
mT
–
–
Min.
Typ.
Max.
-40
21.6
30.2
38.8
25
20.0
28.0
36.0
170
16.3
23.1
29.9
-40
17.1
24.2
31.2
25
15.9
22.5
29.1
170
12.9
18.6
24.3
-40
4.4
5.9
8.0
25
4.1
5.5
7.5
170
3.4
4.6
6.3
25
–
62
–
μT
–
–
-1200
–
ppm/K –
1) The magnetic noise is normal distributed and can be assumed as nearly independent to frequency without sampling
noise or digital noise effects. The typical value represents the rms-value and corresponds therefore to a 1 σ
probability of normal distribution. Consequently a 3 σ value corresponds to 99.7% probability of appearance.
2) Not subject to production test, verified by design/characterization.
Field direction definition
Positive magnetic fields are defined with the south pole of the magnet to the branded side of package.
N
S
Figure 9
Data Sheet
Branded Side
Definition of magnetic field direction PG-SC59-3-5
15
Revision 1.2, 2019-12-20
TLE4964-2K
Specification
3.5
Electro magnetic compatibility
Characterization of electro magnetic compatibility is carried out on a sample basis from one qualification lot.
Not all specification parameters have been monitored during EMC exposure.
+5V
Vs
Rs
R Q = 1.2kΩ
CDD = 10nF
TLE496x
VDD
Q
CQ = 10nF
GND
Figure 10
EMC test circuit
Ref: ISO 7637-2 (Version 2004), test circuit Figure 10 (with external resistor, RS = 100 Ω)
Table 8
Magnetic compatibility
Parameter
Symbol
Level / Type
Status
Testpulse 1
Testpulse 2a1)
Testpulse 2b
Testpulse 3a
Testpulse 3b
Testpulse 42)
Testpulse 5b3)
VEMC
-100 V
60 V/110 V
10 V
-150 V
100 V
-7 V / -5.5 V
US = 86.5 V / US* = 28.5 V
C
A/C
C
A
A
A
A
1) ISO 7637-2 (2004) describes internal resistance = 2 Ω (former 10 Ω).
2) According to 7637-2 for test pulse 4 the test voltage shall be 12 V ±0.2 V.
3) A central load dump protection of 42 V is used. Us* = 42 V - 13.5 V.
Data Sheet
16
Revision 1.2, 2019-12-20
TLE4964-2K
Specification
Ref: ISO 7637-2 (Version 2004), test circuit Figure 10 (without external resistor, RS = 0 Ω)
Table 9
Electro magnetic compatibility
Parameter
Symbol
Level / Type
Status
Testpulse 1
Testpulse 2a1)
Testpulse 2b
Testpulse 3a
Testpulse 3b
Testpulse 42)
Testpulse 5b3)
VEMC
-50 V
50 V
10 V
-150 V
100 V
-7 V / 5.5 V
US = 86.5 V / US* = 28.5 V
C
A
C
A
A
A
A
1) ISO 7637-2 (2004) describes internal resistance = 2 Ω (former 10 Ω).
2) According to 7637-2 for test pulse 4 the test voltage shall be 12 V ±0.2 V.
3) A central load dump protection of 42 V is used. Us* = 42 V - 13.5 V.
Data Sheet
17
Revision 1.2, 2019-12-20
TLE4964-2K
Package information
4
Package information
The TLE4964-2K is available in the halogen-free SMD package PG-SC59-3-5 with a SOT23 like pinout and
footprint.
4.1
Package outline PG-SC59-3-5
1.1 ±0.1
3 ±0.1
0.1
2.8 +0.2
-0.1
3
1
+0.1
1.6 +0.15
-0.3
0.1
0.2
M
0.45 ±0.15
3x0.4 +0.05
-0.1
0.15 MAX.
2
M
0.95
0.1
0.95
+0.1
0.15 -0.
05
(0.55)
0˚...8˚ MAX.
GPS09473
Figure 11
PG-SC59-3-5 package outline (all dimensions in mm)
4.2
Packing information PG-SC59-3-5
0.2
Pin 1
3.18
8
3.28
4
1.32
SC59-TP V04
Figure 12
Data Sheet
Packing of the PG-SC59-3-5 in a tape
18
Revision 1.2, 2019-12-20
TLE4964-2K
Package information
4.3
Footprint PG-SC59-3-5
0.8
1.4 min
0.9
1.6
1.3
0.9
1.4 min
0.8
1.2
0.8
1.2
0.8
Reflow Soldering
Wave Soldering
Footprint PG-SC59-3-5
4.4
PG-SC59-3-5 distance between chip and package
Figure 14
Distance between chip and package
4.5
Package marking
H42
Figure 15
Data Sheet
ym
Figure 13
Year (y) = 0...9
Month (m) = 1...9,
o - October
n - November
d - December
Marking of TLE4964-2K
19
Revision 1.2, 2019-12-20
TLE4964-2K
Graphs of the magnetic parameters
5
Graphs of the magnetic parameters
45
40
35
BOP[mT]
30
25
Typ
20
Min
15
Max
10
5
0
50,00
0,00
50,00
100,00
150,00
TA[°C]
Figure 16
Operating point (BOP) of the TLE4964-2K over temperature
35
30
BRP[mT]
25
20
Typ
15
Min
10
Max
5
0
50,00
0,00
50,00
100,00
150,00
TA[°C]
Figure 17
Release point (BRP) of the TLE4964-2K over temperature
9
8
7
BHys[mT]
6
5
Typ
4
Min
3
Max
2
1
0
50,00
0,00
50,00
100,00
150,00
TA[°C]
Figure 18
Data Sheet
Hysteresis (BHys) of the TLE4964-2K over temperature
20
Revision 1.2, 2019-12-20
TLE4964-2K
Graphs of the electrical parameters
6
Graphs of the electrical parameters
80
75
tPON_max [μs]
70
65
3V
60
55
50
50
30
10
10
30
50
70
90
110
130
150
T[°C]
Figure 19
Power on time tPON of the TLE4964-2K over temperature
15,5
15
tD [µs]
14,5
14
3V
12V
13,5
13
12,5
-50
-30
-10
10
30
50
70
90
110
130
150
T [°C]
Figure 20
Signal delay time of the TLE4964-2K over temperature
2
1,9
1,8
Vs=3V
1,7
IS [mA]
1,6
Vs=12V
1,5
Vs=32V
1,4
1,3
Vs=42V
1,2
1,1
1
-50
-30
-10
10
30
50
70
90
110
130
150
T [°C]
Figure 21
Data Sheet
Supply current of the TLE4964-2K over temperature
21
Revision 1.2, 2019-12-20
TLE4964-2K
Graphs of the electrical parameters
2
1,9
1,8
IS [mA]
1,7
1,6
-40°C
1,5
25°C
1,4
150°C
1,3
1,2
1,1
1
0
5
10
15
20
25
30
35
40
45
VS [V]
Figure 22
Supply current of the TLE4964-2K over supply voltage
63,0
62,0
IQLIMIT [mA]
61,0
60,0
5V
59,0
12V
58,0
32V
57,0
56,0
55,0
54,0
50
30
10
10
30
50
70
90
110
130
150
T[°C]
Figure 23
Output current limit of the TLE4964-2K over temperature
63,0
62,0
IQLIMIT [mA]
61,0
60,0
40°C
59,0
25°C
58,0
150°C
57,0
56,0
55,0
54,0
0
5
10
15
20
25
30
35
VQ [V]
Figure 24
Data Sheet
Output current limit of the TLE4964-2K over applied pull-up voltage
22
Revision 1.2, 2019-12-20
TLE4964-2K
Graphs of the electrical parameters
700
600
tf [ns]
500
3V
12V
400
32V
300
200
100
-50
-30
-10
10
30
50
70
90
110
130
150
T [°C]
Figure 25
Output fall time of the TLE4964-2K over temperature
700
600
tf [ns]
500
-40°C
25°C
400
150°C
300
200
100
0
5
10
15
20
25
30
35
VQ [V]
Figure 26
Output fall time of the TLE4964-2K over applied pull-up voltage
700
600
tr [ns]
3V
12V
500
32V
400
300
-50
-30
-10
10
30
50
70
90
110
130
150
T [°C]
Figure 27
Data Sheet
Output rise time of the TLE4964-2K over temperature
23
Revision 1.2, 2019-12-20
TLE4964-2K
Graphs of the electrical parameters
700
600
tf [ns]
500
-40°C
25°C
400
150°C
300
200
100
0
5
10
15
20
25
30
35
VQ [V]
Figure 28
Output rise time of the TLE4964-2K over applied pull-up voltage
10
IQLEAK [µA]
1
32V
0,1
0,01
0,001
80
90
100
110
120
130
140
150
160
170
180
T [°C]
Figure 29
Output leakage current of the TLE4964-2K over temperature
400
350
300
VQSAT [mV]
10mA
250
15mA
200
20mA
150
25mA
100
50
0
-50
-30
-10
10
30
50
70
90
110
130
150
T [°C]
Figure 30
Data Sheet
Saturation voltage of the TLE4964-2K over temperature
24
Revision 1.2, 2019-12-20
TLE4964-2K
Graphs of the electrical parameters
400
350
VQSAT [mV]
300
250
-40°C
200
25°C
150°C
150
100
50
0
8
10
12
14
16
18
20
22
24
26
IQ [mA]
Figure 31
Saturation voltage of the TLE4964-2K over output current
120
110
100
BNNeff [µT(rms)]
90
80
70
12V
60
50
40
30
20
-50
-30
-10
10
30
50
70
90
110
130
150
T [°C]
Figure 32
Effective noise of the TLE4964-2K thresholds over temperature
0,8
0,7
tQJ [µs(rms)]
0,6
0,5
0,4
12V
03
0,3
0,2
0,1
0
-50
-30
-10
10
30
50
70
90
110
130
150
T [°C]
Figure 33
Data Sheet
Output signal jitter of the TLE4964-2K over temperature
25
Revision 1.2, 2019-12-20
TLE4964-2K
Revision history
7
Revision history
Revision
Date
Changes
Revision 1.2
2019-12-20
Updated text and figure in Chapter 2.6
Updated standards in Table 4
Added maximum tested magnetic field in Chapter 3.3
Updated Figure 14
Editorial changes
Revision 1.0
2012-05-15
Initial release
Data Sheet
26
Revision 1.2 2019-12-20
Trademarks
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www.infineon.com
Edition 2019-12-20
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2019 Infineon Technologies AG.
All Rights Reserved.
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