Data Sheet, 2.2, Jan. 2016
TLE7183F
Automotive Power
TLE7183F
Table of Contents
Table of Contents
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
3.1
3.2
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin Assignment TLE7183F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4
4.1
4.2
4.3
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Default State of Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5
5.1
5.1.1
5.1.2
5.1.3
5.1.4
5.2
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
5.2.6
5.2.7
5.2.8
5.3
5.3.1
5.4
5.4.1
Description and Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MOSFET Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operation at Vs70Ω;
200ms, 5x
4.1.16
Voltage range at CL1
VCL1
-0.3
25
V
–
4.1.17
Voltage range at CH1, CB1
VCH1
-0.3
25
V
–
4.1.18
Voltage difference CH1-CL1
VDC1
-0.3
25
V
–
4.1.19
Voltage range at CL2
VCL2
-0.3
25
V
–
4.1.20
Voltage range at CH2, CB2
VCH2
-0.3
45
V
–
4.1.21
Voltage difference CH2-CL2
VCP2
-0.3
25
V
–
4.1.22
Voltage range at ISP, ISN
VISI
-5
5
V
–
4.1.23
Output current range at VO
IVO
-20
20
mA
–
4.1.24
Gate resistor
RGate
2
–
Ω
–
Temperatures
4.1.25
Junction temperature
Tj
-40
150
°C
–
4.1.26
Storage temperature
Tstg
-55
150
°C
–
4.1.27
Lead soldering temperature
(1/16’’ from body)
Tsol
–
260
°C
–
Data Sheet
8
2.2, 2016-01-27
TLE7183F
General Product Characteristics
Absolute Maximum Ratings (cont’d)1)
40 °C ≤ Tj ≤ 150 °C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Pos.
4.1.28
Parameter
Symbol
2)
Peak reflow soldering temperature
Limit Values
Unit
Conditions
Min.
Max.
Tref
–
260
°C
–
RthjC
–
5
K/W
–
Ptot
–
2
W
–
VESD
–
2
kV
VESD
–
750
V
Thermal Resistance
4.1.29
Junction to case
Power Dissipation
4.1.30
Power Dissipation (DC) @
TCASE=125°C
ESD Susceptibility
4.1.31
4.1.32
1)
2)
3)
4)
ESD Resistivity3)
4)
ESD Resistivity (charge device model)
Not subject to production test, specified by design.
Reflow profile IPC/JEDEC J-STD-020C
ESD susceptibility HBM according to EIA/JESD 22-A 114B
ESD susceptibility CDM according to EIA/JESD 22-C 101
Attention: Stresses above the ones listed here may cause permanent damage to the device. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Attention: Integrated protection functions are designed to prevent IC destruction under fault conditions
described in the data sheet. Fault conditions are considered as “outside” normal operating
range. Protection functions are not designed for continuous repetitive operation.
4.2
Pos.
Functional Range
Parameter
Symbol
1)2)
Limit Values
Unit
Conditions
Min.
Max.
VS
5.5
5.5
20
28
V
DC
t= 5;
RL=1kΩ; CL=100pF
dV/dt
2)
Limit Values
62
43
33
5.3.27
Phase margin
5.3.28
Gain margin 2)
AM
–
12
–
db
RL=1kΩ; CL=100pF
5.3.29
Bandwidth
BWG
1.6
–
–
MHz
Gain=15;
RL=1kΩ;
CL=500pF;
Rs=500Ω
5.3.30
Output settle time to 98% 1)
tset
–
1
1.8
µs
Gain=15;
RL=1kΩ;
CL=500pF;
0.3
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