Data Sheet, Rev. 1.0, June 2009
TLE7276-2
5-V Low Dropout Voltage Regulator
Automotive Power
5-V Low Dropout Voltage Regulator
1
TLE7276-2
Overview
Features
•
•
•
•
•
•
•
•
•
•
Ultra Low Current Consumption 20 µA
Output Voltage 5 V ±2%
Output Current up to 300 mA
Enable Input
Very Low Dropout Voltage
Output Current Limitation
Overtemperature Shutdown
Wide Temperature Range From -40 °C up to 150 °C
Green Product (RoHS compliant)
AEC Qualified
PG-SSOP-14 Exposed Pad
Description
The TLE7276-2 is a monolithic integrated low dropout voltage regulator
for load currents up to 300 mA. An input voltage up to 42 V is regulated
to VQ,nom = 5.0 V with a precision of ±2%. The sophisticated design allows
to achieve stable operation even with ceramic output capacitors down to
470 nF. The device is designed for the harsh environment of automotive
applications. Therefore it is protected against overload, short circuit and
overtemperature conditions by the implemented output current limitation
and the overtemperature shutdown circuit. The TLE7276-2 can be also
used in all other applications requiring a stabilized 5 V voltage.
PG-TO252-5
Due to its ultra low quiescent current of typically 20 µA the TLE7276-2 is dedicated for use in applications
permanently connected to VBAT. In addition the device can be switched off via the Enable input reducing the current
consumption to typically 5 µA. An integrated output sink current circuitry keeps the voltage at the Output pin Q
below 5.5 V even in case of occuring reverse currents. Thus connected devices are protected from overvoltage
damage. For applications requiring extremely low noise levels the Infineon voltage regulator family TLE 42XX and
TLE 44XX is more suited than the TLE7276-2. A mV-range output noise on the TLE7276-2 caused by the charge
pump operation is unavoidable due to the ultra low quiescent current concept.
Type
Package
Marking
TLE7276-2E
PG-SSOP-14 Exposed Pad
7276-2E
TLE7276-2D
PG-TO252-5
7276-2D
Data Sheet
2
Rev. 1.0, 2009-06-01
TLE7276-2
Block Diagram
2
Block Diagram
TLE7276- 2
I
Q
Overtemperature
Shutdown
Bandgap
Reference
EN
1
Enable
Charge
Pump
GND
Figure 1
Data Sheet
AEB 03609. VSD
Block Diagram
3
Rev. 1.0, 2009-06-01
TLE7276-2
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment PG-SSOP-14 Exposed Pad
QF
QF
QF
,
QF
QF
*1'
QF
QF
QF
(1
4
QF
QF
7/(B3,1&21),*B6623
69*
Figure 2
Pin Configuration (top view)
3.2
Pin Definitions and Functions PG-SSOP-14 Exposed Pad
Pin No.
Symbol Function
1,2,3,5,7
n.c.
non connected
can be open or connected to GND
4
GND
Ground
6
EN
Enable Input
high level input signal enables the IC;
low level input signal disables the IC;
integrated pull-down resistor
8,10,11,12,14
n.c.
non connected
can be open or connected to GND
9
Q
Output
block to ground with a capacitor close to the IC terminals, respecting the values given
for its capacitance and ESR in “Functional Range” on Page 6
13
I
Input
block to ground directly at the IC with a ceramic capacitor
Pad
–
Exposed Pad
connect to GND and heatsink area
Data Sheet
4
Rev. 1.0, 2009-06-01
TLE7276-2
Pin Configuration
3.3
Pin Assignment PG-TO252-5
GND
I n.c.
EN Q
Figure 3
Pin Configuration (top view)
3.4
Pin Definitions and Functions PG-TO252-5
Pin No.
Symbol Function
1
I
Input
block to ground directly at the IC with a ceramic capacitor
2
n.c.
non connected
can be open or connected to GND
3
GND
Ground
internally connected to heat slug
4
EN
Enable Input
high level input signal enables the IC;
low level input signal disables the IC;
integrated pull-down resistor
5
Q
Output
block to ground with a capacitor close to the IC terminals, respecting the values given
for its capacitance and ESR in “Functional Range” on Page 6
Heat Slug
–
Heat Slug
internally connected to GND;
connect to GND and heatsink area
Data Sheet
5
Rev. 1.0, 2009-06-01
TLE7276-2
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Absolute Maximum Ratings1)
Tj = -40 °C to 150 °C; all voltages with respect to ground, (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Max.
Unit
Test Condition
Input I
Voltage
VI
-0.3
45
V
–
4.1.2
Voltage
-0.3
6
V
–
4.1.3
Voltage
VQ
VQ
-0.3
6.2
V
t < 10 s2)
VEN
-0.3
45
V
–
Tj
Tstg
-40
150
°C
–
-50
150
°C
–
Voltage
-
3
kV
–
Voltage
-
1.5
kV
–
4.1.1
Output Q
Enable Input EN
4.1.4
Voltage
Temperature
4.1.5
Junction temperature
4.1.6
Storage temperature
ESD Susceptibility
4.1.7
4.1.8
1)
2)
3)
4)
Human Body Model (HBM)3)
Charged Device Model (CDM)
4)
not subject to production test, specified by design
exposure to these absolute maximum ratings for extended periods (t > 10 s) may affect device reliability
ESD susceptibility Human Body Model “HBM” according to AEC-Q100-002 - JESD22-A114
ESD susceptibility Charged Device Model “CDM” according to ESDA STM5.3.1
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
4.2
Functional Range
Pos.
Parameter
Symbol
4.2.1
Input voltage
4.2.2
4.2.3
Output Capacitor’s
Requirements
4.2.4
Junction temperature
VI
CQ
ESR(CQ)
Tj
Limit Values
Unit
Remarks
Min.
Max.
5.5
42
V
–
470
–
nF
1)
–
10
Ω
2)
-40
150
°C
–
1) the minimum output capacitance requirement is applicable for a worst case capacitance tolerance of 30%
2) relevant ESR value at f = 10 kHz
Note: Within the functional or operating range, the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the Electrical Characteristics table.
Data Sheet
6
Rev. 1.0, 2009-06-01
TLE7276-2
General Product Characteristics
4.3
Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go
to www.jedec.org.
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit
Conditions
TLE7276-2E (PG-SSOP-14 Exposed Pad)
4.3.1
Junction to Case1)
RthJC
–
14
–
K/W
measured to
exposed pad
4.3.2
Junction to Ambient1)
–
47
–
K/W
2)
–
141
–
K/W
footprint only3)
4.3.4
RthJA
RthJA
RthJA
–
66
–
K/W
300 mm² heatsink
area3)
4.3.5
RthJA
–
56
–
K/W
600 mm² heatsink
area3)
–
6
–
K/W
measured to tab
–
32
–
K/W
2)
–
115
–
K/W
footprint only3)
4.3.4
RthJC
RthJA
RthJA
RthJA
–
62
–
K/W
300 mm² heatsink
area3)
4.3.5
RthJA
–
47
–
K/W
600 mm² heatsink
area3)
4.3.3
TLE7276-2D (PG-TO252-5)
4.3.1
Junction to Case1)
4.3.2
Junction to Ambient1)
4.3.3
1) Not subject to production test, specified by design.
2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu).
Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
3) Specified RthJA value is according to Jedec JESD 51-3 at natural convection on FR4 1s0p board; The Product
(Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 x 70µm Cu).
Data Sheet
7
Rev. 1.0, 2009-06-01
TLE7276-2
Electrical Characteristics
5
Electrical Characteristics
5.1
Electrical Characteristics Voltage Regulator
Electrical Characteristics
VI =13.5 V; Tj = -40 °C to 150 °C; all voltages with respect to ground (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit
Measuring Condition
Output Q
5.1.1
Output Voltage
VQ
4.9
5.0
5.1
V
0.1 mA < IQ
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