TLE9832
Microcontroller with LIN and Power Switches for Automotive Applications
Data Sheet
Rev. 1.1, 2012-03-08
Automotive Power
Edition 2012-03-08
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2012 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
TLE9832
Table of Contents
Table of Contents
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1
1.1
1.2
Summary of Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Device Types / Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2
2.1
2.2
General Device Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3
3.1
3.1.1
3.1.2
3.1.3
3.2
3.2.1
3.2.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
3.11
3.12
3.13
3.14
3.15
3.16
3.17
3.18
3.19
3.20
3.21
3.22
3.23
3.24
3.25
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Management Unit (PMU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage Regulator 5.0V (VDDP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage Regulator 1.5V (VDDC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
External Voltage Regulator 5.0V (VDDEXT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
System Control Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
System Control Unit - Power Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
System Control Unit - Digital Part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
XC800 Core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Memory Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Watchdog Timer 1 (WDT1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Watchdog Timer (WDT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interrupt System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Multiplication/Division Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Parallel Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timer 0 and Timer 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timer 2 and Timer 21 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timer 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Capture/Compare Unit 6 (CCU6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LIN Transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
High-Speed Synchronous Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Measurement Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Measurement Core Module (incl. ADC2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Analog Digital Converter (ADC1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
High Voltage Monitor Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
High Side Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Low Side Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PWM Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Debug System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14
19
22
23
24
25
25
26
26
28
29
29
31
32
38
38
41
42
43
44
46
47
47
49
51
52
53
54
55
56
57
4
4.1
4.2
4.3
4.4
4.5
4.6
4.7
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electric Drive Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Connection of N.C. Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Connection of ADCGND Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Connection of Exposed Pad . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage Regulators-Blocking Capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Additional External Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD Tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
58
58
59
59
59
59
59
60
5
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Data Sheet
3
Rev. 1.1, 2012-03-08
TLE9832
Table of Contents
5.1
5.1.1
5.1.2
5.1.3
5.1.4
5.1.5
5.2
5.2.1
5.2.2
5.2.3
5.3
5.3.1
5.3.2
5.4
5.5
5.5.1
5.5.2
5.6
5.6.1
5.7
5.8
5.8.1
5.8.2
5.8.3
5.8.4
5.9
5.9.1
5.9.1.1
5.9.1.2
5.9.2
5.10
5.11
5.11.1
5.11.2
5.12
5.12.1
5.12.2
General Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Management Unit (PMU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PMU I/O Supply Parameters VDDP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PMU Core Supply Parameters VDDC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VDDEXT Voltage Regulator 5.0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
System Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Oscillators and PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
External Clock Parameters XTAL1, XTAL2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Flash Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Parallel Ports (GPIO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LIN Transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
High-Speed Synchronous Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Measurement Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Analog Digital Converter 8-Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Measurement Unit (VBAT_SENSE - Supply Voltage Attenuator) . . . . . . . . . . . . . . . . . . . . . . . . . .
Measurement Functions Monitoring Input Voltage Attenuator . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Temperature Sensor Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ADC - 10-Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VAREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Analog/Digital Converter Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
High-Voltage Monitor Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
High Side Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Low Side Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
7
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Data Sheet
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61
61
62
63
63
64
65
65
66
67
68
68
69
70
71
71
71
74
74
78
79
79
79
80
81
82
82
82
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83
85
86
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86
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Rev. 1.1, 2012-03-08
TLE9832
Summary of Features
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Summary of Features
High performance XC800 core
– compatible to standard 8051 core
– up to 40 MHz clock frequency
– two clocks per machine cycle architecture
– two data pointers
On-chip memory
– 32 kByte + 4 kByte Flash for program code and data (4 kByte EEPROM emulation built-in)
– 512 Byte One Time Programmable Memory (OTP)
– 512 Byte 100 Time Programmable Memory (100TP)
– 256 Byte RAM, 3 kByte XRAM
– BootROM for startup firmware and Flash routines
Core logic supply at 1.5 V
On-chip OSC and PLL for clock generation
– Loss of clock detection with fail safe mode for power switches
Watchdog timer (WDT) with programmable window feature for refresh operation and warning prior to overflow
General-purpose I/O Port (GPIO) with wake-up capability
Multiplication/division unit (MDU) for arithmetic calculation
Software libraries to support floating point and MDU calculations
Five 16-Bit timers - Timer 0, Timer 1, Timer 2, Timer 21 and Timer 3
Capture/compare unit for PWM signal generation (CCU6) with Timer 12 and Timer 13
Full duplex serial interface (UART) with LIN support
Synchronous serial channel (SSC)
On-chip debug support via 2-wire Device Access Port (DAP)
LIN Bootstrap loader (LIN BSL)
LIN transceiver compliant to LIN 1.3, LIN 2.0 and LIN 2.1
2 x Low Side Switches with clamping capability incl. PWM functionality, e.g. as relay driver
1x High Side Switch with cyclic sense option and PWM functionality, e.g. for LED or powering of switches
5 x High Voltage Monitor Input pins for wake-up and with cyclic sense and analog measurement option
Measurement unit with 10 channels, 8-Bit A/D Converter (ADC2) and data post processing
8 channels, 10-Bit A/D Converter (including battery voltage and supply voltage measurement) (ADC1)
Single power supply from 3.0 V to 27 V
Low-dropout voltage regulators (LDO)
Dedicated 5 V voltage regulator for external loads (e.g. hall sensor)
Programmable window watchdog (WDT1) with independent on-chip clock source
Power saving modes
– MCU slow-down mode
– Stop Mode
– Sleep Mode
– Cyclic wake-up and cyclic sense during Stop Mode and Sleep Mode
Power-on and undervoltage/brownout reset generator
Overtemperature protection
Overcurrent protection with shutdown
Supported by a full range of development tools including C compilers, macro assembler packages, emulators,
evaluation boards, HLL debugger, programming tools, software packages
Temperature Range TJ: -40 °C up to 150 °C
Packages TLE9832QV: VQFN-48-22 and TLE9832QX: VQFN-48-29
Green package (RoHS compliant)
Data Sheet
5
Rev. 1.1, 2012-03-08
TLE9832
Summary of Features
1.1
Device Types / Ordering Information
The TLE983x product family features devices with different peripheral modules, configurations and program
memory sizes to offer cost-effective solutions for different application requirements. Table 1 describes the
TLE9832 device configuration.
Table 1
Device Configuration
Device Name
Max Clock
Frequency
High Side
Switches
High Voltage Flash Size
Monitor
Inputs
Bidirectional
Parallel Port
I/O´s
Operational
Amplifier
TLE9832QV
40 MHz
1
5
36 kByte
11
no
TLE9832QX
40 MHz
1
5
36 kByte
11
no
Data Sheet
6
Rev. 1.1, 2012-03-08
TLE9832
Summary of Features
1.2
Abbreviations
The following acronyms and terms are used within this document. List see in Table 2.
Table 2
Acronyms
Acronyms
Name
ALU
Arithmetic Logic Unit
CCU6
Capture Compare Unit 6
CGU
Clock Generation Unit
CMU
Cyclic Management Unit
DAP
Device Access Port
DPP
Data Post Processing
ECC
Error Correction Code
EEPROM
Electrically Erasable Programmable Read Only Memory
GPIO
General Purpose Input Output
FSR
Full Scale Range
ICU
Interrupt Control Unit
IRAM
Internal Random Access Memory - Internal Data Memory
LDO
Low DropOut voltage regulator
LIN
Local Interconnect Network
LSB
Least Significant Bit
MCU
Micro Controller Unit
MDU
Multiplication Division Unit
MMC
Monitor Mode Control
MSB
Most Significant Bit
NMI
Non Maskable Interrupt
OCDS
On Chip Debug Support
OTP
One Time Programmable
OSC
Oscillator
PC
Program Counter
PCU
Power Control Unit
PD
Pull Down
PGU
Power supply Generation Unit
PLL
Phase Locked Loop
PMU
Power Management Unit
PSW
Program Status Word
PU
Pull Up
PWM
Pulse Width Modulation
RAM
Random Access Memory
RCU
Reset Control Unit
RMU
Reset Management Unit
Data Sheet
7
Rev. 1.1, 2012-03-08
TLE9832
Summary of Features
Table 2
Acronyms
Acronyms
Name
ROM
Read Only Memory
SCK
SSC Clock
SFR
Special Function Register
SOW
Short Open Window (for WDT1)
SPI
Serial Peripheral Interface
SSC
Synchronous Serial Channel
SSU
System Status Unit
TMS
Test Mode Select
UART
Universal Asynchronous Receiver Transmitter
UDIG
Universal Digital Controller for ADC1
VBG
Voltage reference Band Gap
WDT
Watchdog timer
WMU
Wake-up Management Unit
XRAM
On-Chip eXternal Data Memory
XSFR
On-Chip eXternal Special Function Register
Data Sheet
8
Rev. 1.1, 2012-03-08
TLE9832
25 P0.5/MRST_0/EXI NT0_0/T21EX_2/T1/CCPOS2_1/COUT60_0
26 P1.4/EXINT2_1/T21EX1/CCPOS1_2/CLKOUT_1/COUT62_0
27 XTAL1
29 N.C.
30 GND
31 P2.5/AN5/T1_2
32 P2.4/AN4/T0_2
33 ADCGND
Pin Configuration
34 VAREF
2.1
36 P2.3/AN3/CCPOS1_0/EXINT0_2/CTRAP_1/CC60_1
General Device Information
35 P2.7/AN7/CCPOS2_0/EXI NT2_0/T13HR_1/CC62_1
2
28 XTAL2
General Device Information
24 P0.4/MTSR_0/CC60_0/T21_2/EXINT 2_2/CCPOS1_1/CLKOUT _0
P2. 1/AN1/CCPOS0_0/EXINT 1_0/T12HR_1/CC61_1 37
23 P0. 3/SCK_0/EXINT1_2/T0/ CCPOS0_1/EXF21_2
GND 38
P1.3/EXINT1_1/CC62_0/ CCPOS0_2/EXF21_1 39
22 P0. 2/CTRAP_0/ T21EX_0/EXINT 1_3/TXD_1/EXF 2_0
N.C. 40
21 RESET
N.C. 41
20 P0. 0/T12HR_0/T2_0/DAP0/EXINT 2_3/EXF 21_0/RXDO
VDDC 42
19 GND
GND 43
18 TMS/DAP1
VDDP 44
17 P0. 1/T13HR_0/RXD_1/T2EX_1/T21_0/EXINT0_3
VDDEXT 45
16 P1. 2/EXINT 0_1/T21_1/MRST_1/CCPOS2_2/COUT63_0
N.C. 46
15 P1. 1/T1_1/MTSR_1/ T21EX_3/COUT61_0
VS 47
14 P1.0/T0_1/CC61_0/ SCK_1/EXF 21_3
Figure 1
Data Sheet
LS2 12
LS1 11
N.C. 10
MON5 9
MON4 8
MON3 7
MON2 6
MON1 5
N.C. 4
HS1 3
LIN 1
13 LSGND
LINGND 2
VBATSENSE 48
TLE9832 pin configuration, VQFN-48-22 and VQFN-48-29 package (top view)
9
Rev. 1.1, 2012-03-08
TLE9832
General Device Information
2.2
Pin Definitions and Functions
After reset, all pins are configured as input (except supply and LIN pins) with one of the following settings:
•
•
•
•
Pull-up device enabled only (PU)
Pull-down device enabled only (PD)
Input with both pull-up and pull-down devices disabled (I)
Output with output stage deactivated = high impedance state (Hi-Z)
The functions and default states of the TLE9832 external pins are provided in the following table.
Type: indicates the pin type.
•
•
•
•
I/O: Input or output
I: Input only
O: Output only
P: Power supply
Table 3
Symbol
Pin Definitions and Functions
Pin Number Type
Reset
State
P0
Function
Port 0
Port 0 is an 6-Bit bidirectional general purpose I/O port.
Alternate functions can be assigned as follows:
DAP, CCU6, Timer 0, Timer 1, Timer 2, Timer 21, UART, SSC,
external interrupt input and clock output.
P0.0
20
I/O
I/PU
T12HR_0
T2_0
DAP0
EXINT2_3
EXF21_0
RXDO
CCU6 Timer 12 hardware run input
Timer 2 input
Debug Access Port 0
External interrupt input 0
Timer 21 external flag output
UART transmit data output (synchronous mode)
P0.1
17
I/O
I/PU
T13HR_0
RXD_1
T2EX_1
T21_0
EXINT0_3
CCU6 Timer 13 hardware run input
UART receive input
Timer 2 external trigger input
Timer 21 input
External interrupt input 0
P0.2
22
I/O
I/PU
CTRAP_0
T21EX_0
EXINT1_3
TXD_1
EXF2_0
CCU6 trap input
Timer 21 external trigger input
External interrupt input 1
UART transmit output
Timer 2 external flag output
P0.3
23
I/O
I/PU
SCK_0
EXINT1_2
T0
CCPOS0_1
EXF21_2
SSC clock input (for slave) / output (for master)
External interrupt input 1
Timer 0 input
CCU6 hall input 0
Timer 21 external flag output
P0.4
24
I/O
I/PU
MTSR_0
CC60_0
T21_2
EXINT2_2
CCPOS1_1
CLKOUT_0
SSC master transmit output / slave receive input
CCU6 capture/compare channel 0 input/output
Timer 21 input
External interrupt input 2
CCU6 hall input 1
Clock output
Data Sheet
10
Rev. 1.1, 2012-03-08
TLE9832
General Device Information
Table 3
Pin Definitions and Functions (cont’d)
Symbol
Pin Number Type
Reset
State
Function
P0.5
25
I/PU
MRST_0
EXINT0_0
T21EX_2
T1
CCPOS2_1
COUT60_0
I/O
P1
SSC master receive input / slave transmit output
External interrupt input 0
Timer 21 external trigger input
Timer 1 input
CCU6 hall input 2
CCU6 capture/compare channel 0 output
Port 1
Port 1 is an 5-Bit bidirectional general purpose I/O port.
Alternate functions can be assigned as follows:
CCU6, Timer 0, Timer 1 Timer 21, SSC, external interrupt input
and clock output.
P1.0
14
I/O
I
T0_1
CC61_0
SCK_1
EXF21_3
Timer 0 input
CCU6 capture/compare channel 1 input/output
SSC clock input (for slave) / output (for master)
Timer 21 external flag output
P1.1
15
I/O
I
T1_1
MTSR_1
T21EX_3
COUT61_0
Timer 1 input
SSC master transmit output/slave receive input
Timer 21 external trigger input
CCU6 capture/compare channel 1 output
P1.2
16
I/O
I
EXINT0_1
T21_1
MRST_1
CCPOS2_2
COUT63_0
External interrupt input 0
Timer 21 input
SSC master receive input/slave transmit output
CCU6 hall input 2
CCU6 capture/compare channel 3 output
P1.3
39
I/O
I
EXINT1_1
CC62_0
CCPOS0_2
EXF21_1
External interrupt input 1
CCU6 capture/compare channel 2 input/output
CCU6 hall input 0
Timer 21 external flag output
P1.4
26
I/O
I
EXINT2_1
T21EX_1
CCPOS1_2
CLKOUT_1
COUT62_0
External interrupt input 2
Timer 21 external trigger input
CCU6 hall input 1
Clock output
CCU6 capture/compare channel 2 output
P2
P2.1
Data Sheet
Port 2
Port 2 is an 5-Bit general purpose input-only port.
Alternate functions can be assigned as follows:
CCU6, Timer 0, Timer 1, Timer 21 and external interrupt input
It is also used as analog inputs for the 10-Bit ADC (ADC1).
37
I
I
AN1
CCPOS0_0
EXINT1_0
T12HR_1
CC61_1
11
ADC1 analog input channel 1
CCU6 hall input 0
External interrupt input 1
CCU6 Timer 12 hardware run input
CCU6 capture/compare channel 1 input
Rev. 1.1, 2012-03-08
TLE9832
General Device Information
Table 3
Pin Definitions and Functions (cont’d)
Symbol
Pin Number Type
Reset
State
Function
P2.3
36
I
I
AN3
CCPOS1_0
EXINT0_2
CTRAP_1
CC60_1
ADC1 analog input channel 3
CCU6 hall input 1
External interrupt input 0
CCU6 trap input
CCU6 capture/compare channel 0 input
P2.4
32
I
I
AN4
T0_2
ADC1 analog input channel 4
Timer 0 input
P2.5
31
I
I
AN5
T1_2
ADC1 analog input channel 5
Timer 1 input
P2.7
35
I
I
AN7
CCPOS2_0
EXINT2_0
T13HR_1
CC62_1
ADC1 analog input channel 7
CCU6 hall input 2
External interrupt input 2
CCU6 timer 13 hardware run input
CCU6 capture/compare channel 2 input
VS
47
P
–
Battery supply input
VDDP
44
P
–
I/O port supply (5.0 V). Do not connect external loads. For
buffer and bypass capacitors.
VDDC
42
P
–
Core supply (1.5 V during Active Mode,
0.9 V during Stop Mode). Do not connect external loads. For
buffer/bypass capacitor.
VDDEXT
45
P
–
External voltage supply output (5.0 V, 20 mA)
LSGND
13
P
–
Low Side ground LS1, LS2
GND
30, 43, 19,
38
P
–
Core supply ground; analog supply ground
ADCGND
33
P
–
Analog supply ground for ADC1
LINGND
2
P
–
LIN ground
MON1
5
I
I
High Voltage Monitor Input 1
MON2
6
I
I
High Voltage Monitor Input 2
MON3
7
I
I
High Voltage Monitor Input 3
MON4
8
I
I
High Voltage Monitor Input 4
MON5
9
I
I
High Voltage Monitor Input 5
Power Supply
Monitor Inputs
High Side Switch / Low Side Switch Outputs
LS1
11
O
Hi-Z
Low Side Switch output 1
LS2
12
O
Hi-Z
Low Side Switch output 2
HS1
3
O
Hi-Z
High Side Switch output 1
1
I/O
PU
LIN bus interface input/output
LIN Interface
LIN
Others
Data Sheet
12
Rev. 1.1, 2012-03-08
TLE9832
General Device Information
Table 3
Pin Definitions and Functions (cont’d)
Symbol
Pin Number Type
Reset
State
Function
VAREF
34
I/O
O
5V ADC1 reference voltage
XTAL1
27
I
I
External oscillator input
XTAL2
28
O
Hi-Z
External oscillator output
TMS
18
I
I/PD
TMS
DAP1
RESET
21
I/O
I/O/PU
Reset input, not available during Sleep Mode
VBAT_SENSE 48
I
I
Battery supply voltage sense input
N.C.
10, 29, 40,
41, 46
–
–
Not connected - can be connected to GND
N.C.
4
–
–
Not connected - leave pin open
Data Sheet
13
test mode select input
Debug Access Port 1
Rev. 1.1, 2012-03-08
TLE9832
Functional Description
3
Functional Description
This highly integrated circuit contains analog and digital functional blocks. For system and interface control an
embedded 8-Bit state-of-the-art microcontroller, compatible to the standard 8051 core with On-Chip Debug
Support (OCDS), is available. For internal and external power supply purposes, on-chip low drop-out regulators
are existent. An internal oscillator provides a cost effective and suitable clock in particular for LIN slave nodes. As
communication interface, a LIN transceiver and several High Voltage Monitor Inputs with adjustable threshold and
filters are available. Furthermore one High Side Switch (e.g. for driving LEDs or cyclic powering of switches), two
Low Side Switches (e.g. for relays) and several general purpose input/outputs (GPIO) with pulse-width modulation
(PWM) capabilities are available.
The Micro Controller Unit (MCU) supervision and system protection including reset feature is controlled by a
programmable window watchdog. A cyclic wake-up circuit, supply voltage supervision and integrated temperature
sensors are available on-chip.
All relevant modules offer power saving modes in order to support terminal 30 connected automotive applications.
A wake-up from the power saving mode is possible via a LIN bus message, via the monitoring inputs, via the GPIO
ports or repetitive with a programmable time period (cyclic wake-up).
The integrated circuit is available in a VQFN-48-22 and VQFN-48-29 package with 0.5 mm pitch and is designed
to withstand the severe conditions of automotive applications.
Data Sheet
14
Rev. 1.1, 2012-03-08
Figure 2
Data Sheet
XTAL2
XTAL1
P2.1, P2.3 … P2.5, P2.7
(AN1, AN3 … AN5, AN7)
ADCGND
VAREF
P1.0 … P1.4
P0.1 … P0.5
DAP
TMS
P0.0
8 Bit - MCU
6
7
0
2
Mux
15
3kB XRAM
256 Byte-RAM
MCU
PLL
8-ch.
10-bit ADC
LP_CLK
20MHz
Memories
Flash-36kB
BootROM
MAP
RAM
WMU
VREF5V
RC-Oszillator
5MHz
VMON 1...5
VS_SENSE
VBAT_SENSE
GPIO
Ports
5V
LP_CLK2
100kHz
Power Down Supply
VS
WDT
Timer
0/1
XSFR-BUS
UART
Timer 2/21
CCU6 (Capture
Compare Unit)
SSC (Synchr. Serial
Channel)
Debug (DAP)
Port Control
IRQ
XC800
EWARP Core
VS_SENSE
VBAT_SENSE
VDDP_SENSE
VDDC_SENSE
not used
LS1_SENSE
LS2_SENSE
T_SENSE
TS_LS_SENSE
REF_SENSE
BG
WDT1
Timer 3
0
1
2
3
5
8-Bit ADC
6
7
8
9
4
TSENSE
Measurement Unit
CMU
DPP
CTRL
Trigger
CLK_GEN
AP_SUB_CTRL
PMU/
PCU
Power-Control
IR
RCU
SCU_PM
CYCMU
CGU
PREWARN_SUP_NMI
XINT
PMU
VDDP
PMU/
PCU
MISC
MDU (Multiply /
Division Unit)
BRG
MISC
Control
LIN
Control
SCU
RMU
VPRE
VDDEXT
VDDEXT
VDDP
Attenuator
Attenuator
Wake
Wake
LIN Transceiver
Low Side 2
Low Side 1
High Side 1
PWM-Unit
VS_SENSE
VBAT_SENSE
VDDP_SENSE
VDDC_SENSE
VMON 1..5
MON
PMU-XSFR
VDDC
VDDC
LINGND
LIN
LS2
LSGND
LS1
HS 1
VBAT_SENSE
MON5
MON1
.
.
TLE9832
Functional Description
Block Diagram
XSFR-BUS
SFR-BUS
Block Diagram
The TLE9832 has several operational modes mainly to support low power consumption requirements. The low
power modes and state transitions are depicted in Figure 3 below.
Rev. 1.1, 2012-03-08
TLE9832
Functional Description
Power-up
VS > 3V
Reset
WDT1 reset
(error_wdt++)
Transition by software Transition by external event
VDDC stable &
error_supp < 5
VDDC fail
(error_supp++)
Safety Fallback
Safety fallback
error_supp = 5
Cyclic wake
LIN wake or
MON wake or
GPIO wake
Active Mode
Cyclic wake
LIN wake or
MON wake
STOP command
Stop Mode
Transition by internal event
SLEEP command
Safety fallback
error_wdt = 5
Sleep Mode
Cyclic-sense
Cyclic-sense
PCU_state_diagram_simple_Cus.vsd
Figure 3
Power Control State Diagram
Reset Mode
The Reset Mode is a transition mode e.g. during power-up of the device after a power-on reset. In this mode the
on-chip power supplies are enabled and all other modules are initialized. Once the core supply VDDC is stable,
the Active Mode is entered. In case the watchdog timer WDT1 fails for more than four times, a fail-safe transition
to the Sleep Mode is done.
Active Mode
In Active Mode all modules are activated and the TLE9832 is fully operational.
Stop Mode
The Stop Mode is one out of two low power modes. The transition to the low power modes is done by setting the
respective Bits in the mode control register. In Stop Mode the embedded microcontroller is still powered allowing
faster wake-up reaction times. A wake-up from this mode is possible by LIN bus activity, the High Voltage Monitor
Input pins or the respective 5V GPIOs.
Sleep Mode
The Sleep Mode is the second low-power mode. The transition to the low-power modes is done by setting the
respective Bits in the MCU mode control register. In Sleep Mode the embedded microcontroller power supply is
deactivated allowing the lowest system power consumption, but the wake-up time is longer compared to the Stop
Mode. A wake-up from this mode is possible by LIN bus activity or the High Voltage Monitor Input pins. A wakeup from Sleep Mode behaves similar to a power-on reset.
Data Sheet
16
Rev. 1.1, 2012-03-08
TLE9832
Functional Description
Cyclic Wake-up Mode
The cyclic wake-up mode is a special operating mode of the Sleep Mode and the Stop Mode. The transition to the
cyclic wake-up mode is done by first setting the respective Bits in the mode control register followed by the SLEEP
or STOP command. Additional to the cyclic wake-up behavior (wake-up after a programmable time period), the
wake-up sources of the normal Stop Mode and Sleep Mode are available.
Cyclic Sense Mode
The cyclic sense mode is a special operating mode of the Sleep Mode and the Stop Mode. The transition to the
cyclic sense mode is done by first setting the respective Bits in the mode control register followed by the STOP or
SLEEP command. In cyclic sense mode the High Side Switch can be switched on periodically for biasing some
switches for example. The wake-up condition is configurable, when the sense result of defined monitor inputs at
a window of interest changed compared to the previous wake-up period or reached a defined state respectively.
In this case the Active Mode is entered immediately. For cyclic sense in Stop Mode VDDEXT can be switched on
periodically. Furthermore cyclic sense allows to sense dedicated GPIO port states and transitions when in Stop
Mode.
The following table shows the possible power mode configurations of each major module or function respectively.
Table 4
Power mode configurations
Module/function
Active Mode Stop Mode
Sleep Mode
Comment
VDD1V5PD
ON
ON
ON
Power Down Supply
VPRE, VDDP, VDDC
ON
ON (no dynamic
load)
OFF
–
VDDEXT
ON/OFF
ON (no dynamic
load)/OFF
cyclic ON/OFF
OFF
–
HS
ON/OFF
cyclic ON/OFF
cyclic ON/OFF
cyclic sense
LSx
ON/OFF
OFF
OFF
–
PWM GEN.
ON/OFF
OFF
OFF
–
LIN TRx
ON/OFF
wake-up only/
OFF
wake-up only/
OFF
–
MON1 - MON5 (wake-up)
n.a.
disabled/static/cyclic disabled/static/
cyclic
cyclic: combined with
HS=on
MON1 - MON5
(measurement)
ON/OFF
OFF
OFF
available on four
channels
VS sense
ON/OFF
brownout
detection
brownout detection
brownout
detection
brownout detection
done in PCU
VBAT_SENSE
ON/OFF
OFF
OFF
–
GPIO 5V (wake-up)
n.a.
disabled/static/cyclic OFF
–
GPIO 5V (active)
ON
ON
OFF
–
WDT1
ON
OFF
OFF
–
Data Sheet
17
Rev. 1.1, 2012-03-08
TLE9832
Functional Description
Table 4
Power mode configurations
Module/function
Active Mode Stop Mode
Sleep Mode
CYCLIC Modes
n.a.
cyclic wake-up/
cyclic sense/OFF
cyclic wake-up/
cyclic sense with HS,
cyclic sense/OFF VDDEXT; wake-up
from cyclic wake
needs MC for
entering Sleep Mode /
Stop Mode again
Measurement Unit
ON1)
OFF
OFF
–
2)
Comment
MCU
ON/slowdown/HALT
STOP
OFF
–
CLOCK GEN (MC)
ON
OFF
OFF
–
LP_CLK (20 MHz)
ON
OFF
OFF
WDT1
LP_CLK2 (100 kHz)
ON
ON
ON
for cyclic wake-up
1) Cannot not be switched off due to safety reasons
2) MC PLL clock disabled, MC supply reduced to 0.9 V
Wake-up Source Prioritization
All wake-up sources have the same priority. In order to handle the asynchronous nature of the wake-up sources,
the first wake-up signal will initiate the wake-up sequence. Nevertheless all wake-up sources are latched in order
to provide all wake-up events to the application software. The software can clear the wake-up source flags. It is
ensured, that no wake-up event is lost.
As default wake-up sources, the LIN and MON inputs are activated after power-on reset only. GPIO ports as wakeup sources are disabled by default after power-on reset. The application software can reconfigure the wake-up
sources according to the application needs.
Wake-up Levels and Transitions
The wake-up can be triggered by rising, falling or both signal edges for each monitor and GPIO input individually.
Data Sheet
18
Rev. 1.1, 2012-03-08
TLE9832
Functional Description
3.1
Power Management Unit (PMU)
The purpose of the power management unit is to ensure the fail safe behavior of embedded automotive systems.
Therefore the power management unit controls all system modes including the corresponding transitions. The
power management unit is responsible for generating all required voltage supplies for the embedded MCU (VDDC,
VDDP) and the external sensor supply (VDDEXT). Additionally, the PMU provides well defined sequences for the
system mode transitions and generates hierarchical reset priorities. The reset priorities control the reset behavior
of all system functionalities, especially the reset behavior of the embedded MCU, including the test hardware. All
these functions are controlled by finite state machines. The system master functionality of the PMU forces the
generation of an independent logic supply (Power Down Supply) and system clock (LP_CLK). Therefore the PMU
needs a module internal logic supply and system clock which works independently of the MCU clock.
The following state diagram shows the available modes of the device.
Vs > 3V
start-up
LIN-wake |
MON-wake |
cyclic _wake
VDDC =stable &
error_supp
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