TLF4277-2LD
1
Overview
Features
•
Integrated Current Monitor
•
Overvoltage, Overtemperature and Overcurrent Detection
•
Adjustable Output Voltage
•
Output Current up to 300 mA
•
Adjustable Output Current Limitation
•
Stable with Ceramic Output Capacitor of 1 µF
•
Wide Input Voltage Range up to 40 V
•
Reverse Polarity Protection
•
Short Circuit Protected
•
Overtemperature Shutdown
•
Automotive Temperature Range -40 °C ≤ Tj ≤ 150 °C
•
Green Product (RoHS and WEEE compliant)
•
AEC Qualified
Applications
The TLF4277-2LD is the ideal companion IC to supply active antennas for car infotainment and telematics
applications. The adjustable current limitation, output voltage and disgnostic features makes the TLF42772LD capable of supplying the majority of standard active antennas such as: GPS, GNSS, FM/AM, DAB, XM,
SIRIUS
Description
The TLF4277-2LD is a monolithic integrated low drop out voltage regulator capable of supplying loads up to
300 mA. For an input voltage up to 40 V the TLF4277-2LD provides an adjustable output voltage in a range from
5 V up to 12 V. The integrated current monitor function is a unique feature that provides diagnosis and system
protection functionality. Fault conditions such as overtemperature and output overvoltage are monitored
and indicated at the current sense output. The maximum output current limit of the device is adjustable to
provide additional protection to the connected load.
Via the enable function the IC can be disabled to lower the power consumption.
Type
Package
Marking
TLF4277-2LD
PG-TSON-10
4277-2
Data Sheet
www.infineon.com/power
1
Rev. 1.01
2016-09-01
TLF4277-2LD
Table of Contents
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3
3.1
3.2
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
4
4.1
4.2
4.3
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
5.1
5.2
5.3
5.4
Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Description Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Electrical Characteristics Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Application Information for setting the variable output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Typical Performance Characteristics Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6
6.1
6.2
Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Electrical Characteristics Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Typical Performance Graphs Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
7
7.1
7.1.1
7.1.2
7.1.3
7.1.4
7.1.5
7.1.6
Current and Protection Monitor Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Description Current and Protection Monitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Linear Current Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Adjustable Output Current Limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Overvoltage Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Shutdown Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Status Output Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical Performance Graphs Current Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8
8.1
8.2
Enable Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Description Enable Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Electrical Characteristics Enable Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
9
9.1
9.2
9.2.1
9.2.2
9.3
9.4
9.5
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Selection of External Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reverse Polarity Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
11
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Data Sheet
2
6
6
7
8
16
16
17
18
18
18
18
20
22
22
22
22
23
23
24
24
Rev. 1.01
2016-09-01
TLF4277-2LD
Block Diagram
2
Block Diagram
I
Q
Internal
Supply
Bandgap
Reference
Current
Monitor
ADJ
EN
Protection circuits
ST
CSO
GND
Figure 1
Block and simplified application diagram TLF4277-2LD (Package PG-TSON-10)
Data Sheet
3
Rev. 1.01
2016-09-01
TLF4277-2LD
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment
Figure 2
I
1
10
Q
n.c.
2
9
n.c.
EN
3
8
ADJ
n.c.
4
7
GND
CSO
5
6
ST
Pin Configuration (top view)
3.2
Pin Definitions and Functions
Pin
Symbol
Function
1
I
IC Supply
Place a capacitor from I to GND close to the IC for compensating line influences.
3
EN
Enable
High signal enables the regulator;
Low signal disables the regulator;
Connect to I, if the Enable function is not needed
5
CSO
Current Sense Out
Current monitor and status output
6
ST
Status Output
Digital output signal with open collector output.
A low signal indicates fault conditions at the regulator‘s output.
7
GND
Ground
8
ADJ
Voltage Adjust
Connect an external voltage divider to configure the output voltage
10
Q
Regulator Output
Connect a capacitor between Q and GND close to the IC pins, respecting the
values given for its capacitance CQ and ESR in the table Chapter 4.2
PAD
Heat sink
Connect to PCB heat sink area and GND
Data Sheet
4
Rev. 1.01
2016-09-01
TLF4277-2LD
Pin Configuration
Pin
Symbol
Function
2, 4
n.c.
Not Connected
Internally not connected; Connect to PCB GND
9
n.c.
Not Connected
Internally not connected; Connect to PCB GND
Data Sheet
5
Rev. 1.01
2016-09-01
TLF4277-2LD
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Table 1
Absolute Maximum Ratings1)
Tj = -40°C to +150°C; all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Symbol
Values
Min.
Unit
Note or
Test Condition
Number
Typ. Max.
Voltage Ratings
IC Supply I
VI
-16
45
V
–
P_4.1.1
Enable Input EN
VEN
-16
45
V
–
P_4.1.2
Voltage Adjust Input ADJ
VADJ
-0.3
16
V
–
P_4.1.3
Regulator Output Q
VQ
-0.3
45
V
VQ < VI + 5 V
P_4.1.4
Current Monitor Out CSO
VCSO
-0.3
5
V
–
P_4.1.5
2)
Status Output
VST
-0.3
45
V
see also “Status
Output Signal”
P_4.1.6
Junction Temperature
Tj
-40
150
°C
–
P_4.1.7
Storage Temperature
Tstg
-55
150
°C
–
P_4.1.8
ESD Susceptibility to GND
VESD
-2
2
kV
HBM3)
P_4.1.9
ESD Susceptibility to GND
VESD
-500
500
V
CDM4)
P_4.1.10
V
4)
P_4.1.11
Temperatures
ESD Susceptibility
ESD Susceptibility Pin 1, 5, 6,
10 (corner pins) to GND
VESD1,5,6,10 -750
750
CDM
1) Not subject to production test, specified by design.
2) Special care must be taken to control (e.g. by optical inspection) the proper handling of ST pin with an external
resistor and not connecting directly to a higher voltage level, which allows an uncontrolled current flowing into the
pin.
3) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF)
4) ESD susceptibility, Charged Device Model “CDM” according JEDEC JESD22-C101
Notes
1. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
2. Stresses above the ones listed her may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Data Sheet
6
Rev. 1.01
2016-09-01
TLF4277-2LD
General Product Characteristics
4.2
Table 2
Functional Range
Functional Range
Parameter
Symbol
Values
Min.
Typ. Max.
Unit Note or
Test Condition
Number
Input Voltage
VI
VQ + Vdr
–
40
V
–
P_4.2.1
Output Voltage Range
VQ
5
–
12
V
–
P_4.2.2
Current Sense Output Resistor
RCSO
850
–
25.5 k
Ω
–
P_4.2.3
Current Sense Output
Capacitor1)
CCSO
1
–
4.7
µF
–
P_4.2.4
Junction Temperature
Tj
-40
–
150
°C
–
P_4.2.5
2)
P_4.2.6
P_4.2.7
Output Capacitor
Requirements1)
CQ
1
–
–
µF
–
Output Capacitor
Requirements1)
ESRCQ
–
–
10
Ω
–3)
1) Not subject to production test, specified by design
2) The minimum output capacitance requirement is applicable for a worst case capacitance tolerance of 30%
3) Relevant ESR value at f = 10 kHz
Note:
Data Sheet
Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics
table.
7
Rev. 1.01
2016-09-01
TLF4277-2LD
General Product Characteristics
4.3
Table 3
Thermal Resistance
Thermal Resistance1)
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note or
Test Condition
Number
Junction to Case...
RthJC
–
9
–
K/W
measured to the
exposed pad
P_4.3.1
Junction to Ambient
RthJA
–
165
–
K/W
Footprint only2)
P_4.3.2
2
Junction to Ambient
RthJA
–
67
–
K/W
300 mm PCB
heat sink area2)
P_4.3.3
Junction to Ambient
RthJA
–
56
–
K/W
600 mm2 PCB
heat sink area2)
P_4.3.4
Junction to Ambient
RthJA
–
55
–
K/W
2s2p PCB3)
P_4.3.5
1) Not subject to production test, specified by design
2) Specified RthJA value is according to Jedec JESD 51-3 at natural convection on FR4 1s0p board; The Product (Chip +
Package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 x 70µm Cu).
3) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product (Chip
+ Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu).
Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
Data Sheet
8
Rev. 1.01
2016-09-01
TLF4277-2LD
Voltage Regulator
5
Voltage Regulator
5.1
Description Voltage Regulator
The output voltage VQ is controlled by comparing the feedback voltage (VADJ) to an internal reference voltage
and driving a PNP pass transistor accordingly. The control loop stability depends on the output capacitor CQ,
the output capacitor ESR, the load current and the chip temperature. To ensure stable operation, the output
capacitor’s capacitance and its equivalent series resistor ESR requirements given in the Table 2 “Functional
Range” on Page 7 have to be maintained. For stability details please refer to the typical performance graph
“Output Capacitor Series Resistivity ESRCQ” on Page 13. In addition the output capacitor may need to be sized
larger to buffer load transients.
An input capacitor CI is not needed for the control loop stability, but recommended to buffer line influences.
Connect the capacitors close to the IC terminals. In general a buffered supply voltage is recommended for the
device. For details see Chapter 9.1.
Protection circuitry prevents the IC as well as the application from destruction in case of catastrophic events.
The integrated safeguards consist of output current limitation, reverse polarity protection as well as thermal
shutdown in case of overtemperature.
In order to avoid excessive power dissipation that could never be handled by the pass element and the
package, an integrated safe operation monitor lowers the maximum output current input voltages above
VBAT = 22 V.
The thermal shutdown circuit prevents the IC from immediate destruction under fault conditions (e.g. output
continuously short-circuited) by switching off the power stage. After the chip has cooled down, the regulator
restarts. This leads to a cycling behavior of the output voltage until the fault is removed. However, junction
temperatures above 150 °C are outside the maximum ratings and therefore significantly reduce the IC lifetime.
The TLF4277-2LD allows a negative supply voltage. However, several small currents are flowing into the IC
increasing its junction temperature. This reverse current has to be considered for the thermal design,
respecting that the thermal protection circuit is not operating during reverse polarity condition.
Supply
II
I
Q
Regulated
Output Voltage
IQ
Saturation Control
Current Limitation
ADJ
CI
VI
EN
CSO
Figure 3
Data Sheet
Bandgap
Reference
Temperature
Shutdown
C
VQ
ESR
Load
E.g.
Antenna
Amplitfier
CQ
ST
GND
Block Diagram Voltage Regulator Circuit
9
Rev. 1.01
2016-09-01
TLF4277-2LD
Voltage Regulator
5.2
Table 4
Electrical Characteristics Voltage Regulator
Electrical Characteristics: Voltage Regulator
VBAT = 13.5 V, Tj = -40°C to +150°C, all voltages with respect to ground, direction of currents as shown in Figure 7
Application Diagram (unless otherwise specified)
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note or
Test Condition
Number
P_5.2.1
Reference Voltage
VREF,int
–
1.19
–
V
1)
Output Voltage Tolerance 2)
VQ
-2
–
2
%
1 mA ≤ IQ ≤ 300 mA;
9 V ≤ VBAT ≤ 16 V
5 V ≤ VQ ≤ 12 V with
VBAT> VQ + 2V
P_5.2.2
Output Voltage Tolerance2)
VQ
-2
–
2
%
1 mA ≤ IQ ≤ 150 mA;
6 V ≤ VBAT ≤ 16 V
5 V ≤ VQ ≤ 12 V with
VBAT > VQ + 1V
P_5.2.3
Output Voltage Tolerance2)
VQ
-2
–
2
%
1 mA ≤ IQ ≤ 100 mA;
16 V ≤ VBAT ≤ 32 V3)
5 V ≤ VQ ≤ 12 V
P_5.2.4
Output Voltage Tolerance2)
VQ
-2
–
2
%
1 mA ≤ IQ ≤ 10 mA;
32 V ≤ VBAT ≤ 40 V3)
5 V ≤ VQ ≤ 12 V
P_5.2.5
Load Regulation
steady-state
dVQ,load
- 30
-5
–
mV
IQ = 1 mA to 250 mA; VBAT P_5.2.7
= 6 V; VQ = 5 V
Line Regulation
steady-state
dVQ,line
–
5
20
mV
VBAT = 6 V to 32 V;
IQ = 5 mA; VQ = 5 V
P_5.2.8
Power Supply Ripple
Rejection1)
PSRR
60
65
–
dB
fripple = 100 Hz;
Vripple = 1 Vpp;
VQ = 5 V;
IQ < 100 mA
P_5.2.9
Dropout Voltage
Vdr = VI - VQ
Vdr
–
100
250
mV
IQ = 100 mA4)
VQ=5 V
P_5.2.10
Dropout Voltage
Vdr = VI - VQ
Vdr
–
200
500
mV
IQ = 200 mA4)
VQ=5 V
P_5.2.11
Output Current Limitation
IQ,max
301
–
700
mA
0 V ≤ VQ ≤ 0.95 * VQ,nom
P_5.2.13
Reverse Current
IQ
-2
-1
–
mA
VBAT =0 V; VQ = 5 V
P_5.2.14
Reverse Current
at Negative Input Voltage
IBAT
-10
-6
–
mA
VBAT = -16 V; VQ = 0 V
P_5.2.15
Overtemperature Shutdown
Threshold
Tj,sd
151
–
200
°C
Tj increasing1)
P_5.2.16
Overtemperature Shutdown
Threshold Hysteresis
Tj,hy
–
15
–
K
Tj decreasing1)
P_5.2.17
–
1) Parameter not subject to production test; specified by design.
Data Sheet
10
Rev. 1.01
2016-09-01
TLF4277-2LD
Voltage Regulator
2) Referring to the device tolerance only, the tolerance of the resistor divider can cause additional deviation.
3) See typical performance graph for details.
4) Measured when the output voltage VQ has dropped 100 mV from its nominal value.
Data Sheet
11
Rev. 1.01
2016-09-01
TLF4277-2LD
Voltage Regulator
5.3
Application Information for setting the variable output voltage
The output voltage of the TLF4277-2LD can be adjusted between 5 V and 12 V by an external output voltage
divider, closing the control loop to the voltage adjust pin ADJ.
The voltage at pin ADJ is compared to the internal reference of typical 1.19 V in an error amplifier. It controls
the output voltage.
I
Q
Saturation Control
Current Limitation
IQ
R1
ADJ
EN
Temperature
Shutdown
CSO
Figure 4
Bandgap
Reference
C
R2
ESR
CQ
ST
GND
Application Detail External Components at Output for Variable Voltage Regulator
The output voltage is calculated according to Equation (5.1):
VQ = (R1 + R2)/R2 x VREF,int, neglecting IADJ
(5.1)
VREF,int is typically 1.19 V.
To avoid errors caused by leakage current IADJ, we recommend to choose the resistor value for R2 < 27 kΩ.
The accuracy of the resistors for the external voltage divider can lead to a higher tolerance of the output
voltage. To achieve a reasonable accuracy resistors with a tolerance of 1% or lower are recommended for the
feedback divider.
Data Sheet
12
Rev. 1.01
2016-09-01
TLF4277-2LD
Voltage Regulator
5.4
Typical Performance Characteristics Voltage Regulator
Reference Voltage VREF,int vs.
Junction Temperature Tj
Output Capacitor Series Resistivity ESRCQ
vs. Output Current IQ
1.30
Unstable
100
CQ = 1 µF
VI = 6..28 V
Tj = 25°
1.25
ESR(CQ) [Ω ]
VREF,int [V]
10
1.20
1.15
Stable
1
0.1
0.01
1.10
-40
0
40
80
120
0
160
100
200
300
IQ [mA]
Tj [°C]
Dropout Voltage Vdr vs.
Junction Temperature Tj
Power Supply Ripple Rejection PSRR
100
250
100
Unstable
CQ = 1 µF
VI = 6..28 V
Tj = 25°
IQ = 200 mA
200
IQ = 10 mA
CQ = 1 µF
VQ = 5V
Vripple = 0.5 Vpp
Tj = 25 °C
80
150
60
Stable
PSRR [dB]
VDR [mV]
ESR(C
Q) [Ω ]
10
IQ = 100 mA
1
100
40
0.1
50
0.01
0
20
0
-40
0
100
40
80
200
120
0
300
160
10
ITQj [mA]
[°C]
Data Sheet
100
1000
10000
100000
1000000
f [Hz]
13
Rev. 1.01
2016-09-01
TLF4277-2LD
Current Consumption
6
Current Consumption
6.1
Electrical Characteristics Current Consumption
Table 5
Electrical Characteristics: Current Consumption
VBAT = 13.5 V, Tj = -40°C to +150°C, all voltages with respect to ground; direction of currents as shown in Figure 7
Application Diagram (unless otherwise specified)
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit Note or Test Condition
Number
Current Consumption
Iq,on
–
150
200
µA
IQ ≤ 200 µA; Tj ≤ 25 °C;
VEN = 5 V; Iq = II - IQ - ICSO
P_6.1.1
Current Consumption
Iq,on
–
–
250
µA
IQ ≤ 200 µA; Tj ≤ 85 °C;
VEN = 5 V; Iq = II - IQ - ICSO
P_6.1.2
Current Consumption
Iq,on
–
1.2
2.6
mA
IQ = 50 mA; VEN = 5 V;
Iq = II - IQ - ICSO
P_6.1.3
Current Consumption
Iq,on
–
5.5
11
mA
IQ = 200 mA; VEN = 5 V;
Iq = II - IQ - ICSO
P_6.1.4
Current Consumption
Iq,off
–
–
3
µA
Tj ≤ 25 °C; VEN = 0 V
Iq = II - IQ
P_6.1.5
Current Consumption
Iq,off
–
–
5
µA
Tj ≤ 85 °C; VEN = 0 V
Iq = II - IQ
P_6.1.6
Current Consumption
Iq,off
–
–
15
µA
Tj ≤ 85 °C; VEN = 0.8 V
Iq = II - IQ
P_6.1.7
Data Sheet
14
Rev. 1.01
2016-09-01
TLF4277-2LD
Current Consumption
6.2
Typical Performance Graphs Current Consumption
Current Consumption Iq,off vs.
Junction Temperature Tj
Current Consumption Iq,on vs.
Junction Temperature Tj
300
14
14
VEN = 5 V
IQ = 200µA
VEN
EN = 0.8 V
12
12
250
10
10
200
Iq,on [µA]
IIq,off
[µA]
q,off[µA]
88
66
150
100
44
50
22
00
-40
-40
00
40
40
8080
120
120
0
160
-40
Tjj [°C]
[°C]
T
0
40
80
120
160
Tj [°C]
Current Consumption Iq,on vs.
Output Current IQ
8
VEN = 5 V
Iq,on [mA]
6
Tj = 25°
Tj = 85°
4
2
0
0
100
200
300
IQ [mA]
Data Sheet
15
Rev. 1.01
2016-09-01
TLF4277-2LD
Current and Protection Monitor Functions
7
Current and Protection Monitor Functions
7.1
Functional Description Current and Protection Monitors
The TLF4277-2LD provides a set of advanced monitor functionality. The current flowing out of the power stage
can be monitored at the CSO output. In addition the current limitation can be adjusted via external resistor.
Events of the implemented protection functions are reported through dedicated voltage levels at the CSO
output. This information can be processed by an external µC for system analysis and failure identification. The
monitored events are over-current, overvoltage, and temperature shutdown. In addition all three fault
conditions are routed also to the digital output pin ST.
from power stage
Current
Monitor
Monitor Circuits
OC-Detection
OV-Detection
Buffer
TSD-Detection
OR
CSO
ST
GND
ICSO
CCSO
Figure 5
RCSO
Block diagram current and protection monitor
To reduce possible effects from the supply voltage VBAT additional filtering of the supply voltage is
recommended. A 100 nF capacitor should be placed as close a possible to the IC terminal, which is connected
to VBAT.
Figure 6 shows the output level at the CSO pin versus the operation or fault condition. The graph is valid for
the following set up of external components:
CCSO = 2.2 µF
RCSO = 1.5 kΩ
Note:
Data Sheet
In case of high input voltage (VI > 20 V), high junction temperature (Tj > 151°C) and CSO pin is directly
connected to GND without resistor, the return to normal operation from the “thermal shutdown
mode” can‘t be ensured.
16
Rev. 1.01
2016-09-01
TLF4277-2LD
Current and Protection Monitor Functions
VCSO
[V]
3,2
VQ Overvoltage (e.g. short to VBAT)
3.1 V typical
3,0
2,95
Overtemperature
2.80 V typical
2,65
Current limitation and output short circuit to GND
2.55 V typical
2,45
Linear Current Sense Band
up to 2.45 V
0
Figure 6
163 170
Iout
[mA]
Output levels and functionality of the CSO output
Note:
The graph is just an example and only valid for an certain configuration of the external components.
7.1.1
Linear Current Monitor
Inside the linear current monitor area the current driven out of the CSO pin is direct proportional to the output
current (IQ).
The level of the current ICSO can be calculated according to Equation (7.1):
(7.1)
ICSO =
Data Sheet
IQ
FIQ/ICSO
17
Rev. 1.01
2016-09-01
TLF4277-2LD
Current and Protection Monitor Functions
7.1.2
Adjustable Output Current Limitation
The TLF4277-2LD has an adjustable current limitation for the current flowing out of the power stage. If the
level of the output current exceeds the defined current limit threshold (IQ,lim), the output current of the
TLF4277-2LD will be limited.
Setting of the adjustable current limitation:
(7.2)
IQ,lim =
2.55V × FIQ/ICSO
RCSO
A voltage level as defined in “CSO Voltage Level” on Page 19 will be applied at the CSO pin. In addition the
ST pin will be set low.
Note:
During power up of the device, the regulator works in output current limitation. Regardless if the
output current is limited by the protection function according to “Output Current Limitation” on
Page 10, or by the adjustable output current limitation according to “Adjustable Current Limit” on
Page 19. If an adjustable current limit is set, the status output pin ST is set to low as long as the
adjustable current limitation is active during power up sequence.
Example: To achieve a current limitation of e.g. 170mA the following configuration can be used:
IQ,lim =
2.55V × 100
1.5kΩ
= 170mA
FIQ/ICSO = 100
RCSO = 1.5 kΩ
7.1.3
Overvoltage Detection
To detect a possible short circuit of the output to a higher supply rail the TLF4277-2LD has an overvoltage
detection implemented. An overvoltage will be detected, if the voltage level at the ADJ pin is 20% higher than
the internal reference voltage VREF,int defined in “Reference Voltage” on Page 10.
In case of overvoltage the CSO pin will set to a voltage level as defined in “CSO Voltage Level” on Page 19. In
addition the ST pin will be set low.
7.1.4
Thermal Shutdown Detection
If the junction temperature will exceed the limits defined in the “Overtemperature Shutdown Threshold”
on Page 10 the TLF4277-2LD will disable the output voltage. In this case a voltage level as defined in “CSO
Voltage Level” on Page 19 will be applied at the CSO pin. In addition the ST pin will be set low.
7.1.5
Status Output Signal
The status condition pin ST is an open collector output. An external pull-up resistor has to be applied for
functionality and to limit the current into the pin (e.g. connect via a resistor to “Q”). Connecting the ST pin
directly to a supply voltage may damage the device.
Data Sheet
18
Rev. 1.01
2016-09-01
TLF4277-2LD
Current and Protection Monitor Functions
If one or more of the monitored protection functions (over-current, overvoltage and temperature shutdown)
is activated, the digital Status Output pin ST is set to “low”.
Table 6
Electrical Characteristics: Current Monitor Function
VBAT = 13.5 V, Tj = -40°C to +150°C, all voltages with respect to ground, direction of currents as shown in Figure 7
Application Diagram (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or Test Condition Number
Min.
Typ.
Max.
Linear Current Monitor
Current Monitor Factor1)
Factor = IQ /ICSO
FIQ/ICSO
95
100
105
–
IQ = 10 mA - 150 mA
Tj = -40° to 125°C
VIN= 9 V to 16 V
VQ = 5 V to 12 V
VIN > VQ + 2.0 V1)
P_7.1.1
Current Monitor Factor1)
Factor = IQ /ICSO
FIQ/ICSO
90
100
110
–
1 mA ≤ IQ ≤ 300 mA
VQ = 5 V
P_7.1.5
CSO current at no load
condition
ICSO,off
–
–
550
nA
no load connected at Q P_7.1.6
R2 = 27 kΩ = 5 V
Adjustable Current Limit
Range1)
IQ,lim
10
-
300
mA
850 Ω < RCSO < 25.5 kΩ
VQ < 0,95 * VQ,nom
P_7.1.7
Adjustable Current Limit
Tolerance1)
IQ,lim
-10
–
10
%
10 mA ≤ IQ,lim ≤ 300 mA
Tj = -40° to 125°C
0.95*VQ,nom > VQ > 3.0 V
P_7.1.8
Adjustable Current Limit
Tolerance1)
IQ,lim
-10
–
25
%
10 mA ≤ IQ,lim ≤ 300 mA
Tj = -40° to 125°C
0.95*VQ,nom > VQ > 0 V
P_7.1.15
CSO Voltage Level
Current limitation
VCSO,cur_lim 2.45
2.55
2.65
V
VQ < 0,95 * VQ,nom
P_7.1.9
3.0
3.1
3.2
V
VADJ > 1.2 * VREF,nom
P_7.1.10
VCSO,TSD
2.65
2.8
2.95
V
151 °C < Tj < 180 °C
P_7.1.12
Status Output Digital Signal
Low Voltage
VST,low
–
0.2
0.4
V
IST ≤ 1.8 mA
P_7.1.13
Status Output Digital Signal
Sink current
IST
–
–
1.8
mA
–
P_7.1.14
Adjustable Current Limitation
Output Level Overvoltage Detected
CSO Voltage Level
Overvoltage detected
VCSO,OV
Output Level Overtemperature Detected
CSO Voltage Level
Overtemperature Detected 2)
Status Output Signal
1) Referring to the device tolerance only, the tolerance of the external components can cause additional deviation
2) Specified by design; not subject to production test
Data Sheet
19
Rev. 1.01
2016-09-01
TLF4277-2LD
Current and Protection Monitor Functions
7.1.6
Typical Performance Graphs Current Monitor
Current Monitor Factor FIQ/ICSO vs.
Output Current IQ
External Current Limitation IQ,lim vs.
Junction Temperature Tj
158
104
VQ = 5 V
Tj = 25°
VQ = 5 V
RCSO = 1.69k
156
154
102
152
IQ,lim [mA]
150
FIQ/ICSO
100
148
146
98
144
142
96
0
100
200
140
300
-40
IQ [mA]
Data Sheet
0
40
80
120
160
Tj [°C]
20
Rev. 1.01
2016-09-01
TLF4277-2LD
Enable Function
8
Enable Function
8.1
Description Enable Function
The TLF4277-2LD can be turned on or turned off via the EN Input. With voltage levels higher than VEN,high
applied to the EN Input the device will be completely turned on. A voltage level lower than VEN,low sets the
device to low quiescent current mode. In this condition the device is turned off and is not functional. The
Enable Input has a build in hysteresis to avoid toggling between ON/OFF state, if signals with slow slope are
applied to the input. Enable input pin has an internal pull down resistor.
8.2
Electrical Characteristics Enable Function
Table 7
Electrical Characteristics: Enable Function
VBAT = 13.5 V, Tj = -40°C to +150°C, all voltages with respect to ground, direction of currents as shown in Figure 7
Application Diagram (unless otherwise specified)
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note or Test Condition Numbe
r
Enable
Low Signal Valid
VEN,low
–
–
0.8
V
–
P_8.2.1
Enable
High Signal Valid
VEN,high
2
–
–
V
see also startup time
P_8.2.7
P_8.2.2
Enable
Threshold Hysteresis
VEN,hyst
50
–
–
mV
–
P_8.2.3
Enable
Input current
IEN,high
–
–
5
µA
VEN = 5 V
P_8.2.4
Enable
Input current
IEN,high
–
–
20
µA
VEN < 18 V
P_8.2.5
Enable
internal pull-down resistor
REN
0.94
1.5
2.5
MΩ
VEN < 5 V
P_8.2.6
Startup time
tEN
–
180
–
µs
CQ = 1 µF; VQ,nom = 5 V;
P_8.2.7
IQ,load = 150 mA;
time from VEN > 2 V
(0 V to 5 V transition) till
VQ = 90% of VQ,nom
Data Sheet
21
Rev. 1.01
2016-09-01
TLF4277-2LD
Application Information
9
Application Information
Note:
The following information is given as a hint for the implementation of the device only and shall not
be regarded as a description or warranty of a certain functionality, condition or quality of the device.
9.1
Application Diagram
Supply
II
I
Q
IQ
Regulated Output Voltage
CQ
DI
C I2
CI1
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