TLS208D1
Linear Voltage Post Regulator
TLS208D1EJV
TLS208D1EJV33
TLS208D1LDV
TLS208D1LDV33
Data Sheet
Rev. 1.0, 2015-02-26
Automotive Power
TLS208D1
Table of Contents
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
3.1
3.2
3.3
3.4
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Assignment PG-DSO-8 (Exposed Pad) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Definitions and Functions PG-DSO-8 (Exposed Pad) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Assignment PG-TSON10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Definitions and Functions PG-TSON10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
5
5
6
6
4
4.1
4.2
4.3
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7
7
8
8
5
5.1
5.2
5.3
Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Description Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Electrical Characteristics Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Typical Performance Characteristics Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6
6.1
6.2
6.3
Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Description Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical Performance Characteristics Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
17
17
17
18
7
7.1
7.2
7.3
Enable Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Description Enable Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics Enable Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical Performance Characteristics Enable Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
19
19
19
19
8
8.1
8.2
8.3
Reset Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Description Reset Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics Reset Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical Performance Characteristics Reset Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20
20
21
22
9
9.1
9.2
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Adjustable Version - TLS208D1xxV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Fixed Voltage Version - TLS208D1xxV33 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
10
10.1
10.2
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Package Outlines PG-DSO-8 (Exposed Pad) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Package Outlines PG-TSON10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
11
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Data Sheet
2
Rev. 1.0, 2015-02-26
Linear Voltage Post Regulator
1
TLS208D1
Overview
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
3.3 V Fixed and Adjustable Output Voltage from 0.8 V to 5.25 V
Output Voltage Accuracy of ± 2 %
Static Output Currents up to 800 mA
Enable Functionality
Undervoltage Reset with Power-On Reset Delay
Adjustable Reset Threshold
Extended Input Voltage Operating Range of 2.7 V to 18 V
Low Dropout Voltage: typ. 400mV at 400mA
Very Low Current Consumption: typ. 90 µA
Very High PSRR: typ. 62dB at 10kHz
Output Current Limitation
Overtemperature Shutdown
Wide Temperature Range From -40 °C up to 150 °C
Suitable for Use in Automotive Electronics as Post Regulator
Green Product (RoHS compliant)
AEC Qualified
PG-DSO-8 (Exposed Pad)
PG-TSON10
Description
The TLS208D1 is a monolithic integrated linear voltage post regulator. The IC regulates an input voltage VI in the
range of 2.7 V ≤ VI ≤ 18 V to an adjustable output voltage of 0.8 V to 5.25 V or to a fixed output voltage with a
precision of ±2 %. The TLS208D1 is especially designed for applications with a permanent connection to
preregulators like DCDC converters. The device is available in the small surface mounted PG-DSO-8 (Exposed
Pad) package. In addition to the enable functionality, the feature set includes a reset with an adjustable reset
threshold. This threshold can be modified by an external resistor divider. The device is designed for the harsh
environment of automotive applications. Therefore it is protected against overload, short circuit and
overtemperature conditions by the implemented output current limitation and the overtemperature shutdown
circuit. The TLS208D1 can be also used in all other applications requiring a stabilized voltage of 0.8 V to 5.25 V.
The input capacitor CI is recommended for compensating line influences. The output capacitor CQ is necessary
for the stability of the regulating circuit. Stability is guaranteed at values specified in “Functional Range” on
Page 8 within the whole operating temperature range.
Type
Package
Marking
TLS208D1EJV
PG-DSO-8 (Exposed Pad)
208D1V
TLS208D1EJV33
PG-DSO-8 (Exposed Pad)
208D1V33
TLS208D1LDV
PG-TSON10
208DV
TLS208D1LDV33
Data Sheet
PG-TSON10
208DV33
3
Rev. 1.0, 2015-02-26
TLS208D1
Block Diagram
2
Block Diagram
I
Q
Current Limitation
ADJ
Driver
Temperature
Shutdown
RO
EN
Bandgap
Reference
Reset
Control
Internal
Supply
RADJ
GND
Figure 1
Block Diagram Adjustable Version (e.g. TLS208D1EJV)
I
Q
FB
Current Limitation
Driver
RO
Reset
Control
Temperature
Shutdown
EN
RADJ
Bandgap
Reference
Internal
Supply
GND
Figure 2
Data Sheet
Block Diagram Fixed Voltage Version (e.g. TLS208D1EJV33)
4
Rev. 1.0, 2015-02-26
TLS208D1
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment PG-DSO-8 (Exposed Pad)
IN
1
8
Q
N.C.
2
7
ADJ/FB
GND
3
6
RADJ
EN
4
5
RO
Figure 3
Pin Configuration Package PG-DSO-8 (Exposed Pad)
3.2
Pin Definitions and Functions PG-DSO-8 (Exposed Pad)
Pin
Symbol
Function
1
I
Input.
IC supply. For compensating line influences, a capacitor of 220 nF close to the IC pins is
recommended.
2
N.C
Not Connected.
3
GND
Ground Reference.
Connect this pin low ohmic to GND.
4
EN
Enable.
A low signal disables the IC. A high signal switches it on.
Connect to the input I, if the enable functionality is not required.
5
RO
Reset Output
The open collector output can be connected to a microcontroller using a external pull up resistor.
If the functionality is not required, the pin can be left open.
6
RADJ
Reset Adjust.
For reset threshold adjustment connect to a voltage divider from output Q to GND.
(“Description Reset Function” on Page 20)
7
ADJ
Adjust. (Only Adjustable Version TLS208D1EJV)
The reference voltage can be connected to the output pin directly or by a voltage divider for
higher output voltages (see application information).
Feedback. (Only Fixed Voltage Versions e.g. TLS208D1EJV33)
The Feedback pin has to be connected to the output voltage.
FB
8
Q
Pad EP
Data Sheet
Output.
Block to GND with a capacitor close to the IC terminals, respecting capacitance and ESR
requirements given in the table “Functional Range” on Page 8.
Exposed Pad.
Connect to PCB heat sink area and GND.
5
Rev. 1.0, 2015-02-26
TLS208D1
Pin Configuration
3.3
Pin Assignment PG-TSON10
PG-TSON10
I
1
10
N.C.
2
9
ADJ/FB
GND
3
8
RADJ
N.C.
4
7
N.C.
EN
5
6
RO
Figure 4
Pin Configuration Package PG-TSON10
3.4
Pin Definitions and Functions PG-TSON10
Q
Pin
Symbol
Function
1
I
Input.
IC supply. For compensating line influences, a capacitor of 220 nF close to the IC pins is
recommended.
2
N.C
Not Connected.
3
GND
Ground Reference.
Connect this pin low ohmic to GND.
4
N.C
Not Connected.
5
EN
Enable.
A low signal disables the IC. A high signal switches it on.
Connect to the input I, if the enable functionality is not required.
6
RO
Reset Output
The open collector output can be connected to a microcontroller using a external pull up resistor.
If the functionality is not required, the pin can be left open.
7
N.C
Not Connected.
8
RADJ
Reset Adjust.
For reset threshold adjustment connect to a voltage divider from output Q to GND.
(“Description Reset Function” on Page 20)
9
ADJ
Adjust. (Only Adjustable Version TLS208D1LDV)
The reference voltage can be connected to the output pin directly or by a voltage divider for
higher output voltages (see application information).
Feedback. (Only Fixed Voltage Versions e.g. TLS208D1LDV33)
The Feedback pin has to be connected to the output voltage.
FB
10
Q
Pad EP
Data Sheet
Output.
Block to GND with a capacitor close to the IC terminals, respecting capacitance and ESR
requirements given in the table “Functional Range” on Page 8.
Exposed Pad.
Connect to PCB heat sink area and GND.
6
Rev. 1.0, 2015-02-26
TLS208D1
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Table 1
Absolute Maximum Ratings 1) Tj = -40 °C to +150 °C; all voltages with respect to ground,
(unless otherwise specified)
Parameter
Symbol
Values
Unit
Note /
Test Condition
Number
Min.
Typ.
Max.
VI
-0.3
–
20
V
–
P_4.1.1
VQ
-0.3
–
5.5
V
–
P_4.1.2
VADJ
-0.3
–
5.5
V
–
P_4.1.3
VFB
-0.3
–
5.5
V
–
P_4.1.4
VEN
-0.3
–
20
V
–
P_4.1.5
VRO
-0.3
–
5.5
V
–
P_4.1.6
VRADJ
-0.3
–
5.5
V
–
P_4.1.7
Tj
Tstg
-40
–
150
°C
–
P_4.1.8
-50
–
150
°C
–
P_4.1.9
Input I
Voltage
Output Q
Voltage
Adjust ADJ
Voltage
Feedback FB
Voltage
Enable EN
Voltage
Reset Output
Voltage
Reset Adjust
Voltage
Temperature
Junction temperature
Storage temperature
ESD Susceptibility
ESD Absorption
VESD,HBM -2
–
2
kV
Human Body Model P_4.1.10
(HBM) 2)
ESD Absorption
VESD,CDM -750
–
750
V
Charge Device
Model (CDM) 3)
P_4.1.11
1) not subject to production test, specified by design
2) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF)
3) ESD susceptibility, Charged Device Model “CDM” ESDA STM5.3.1 or ANSI/ESD S.5.3.1
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
1. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not
designed for continuous repetitive operation.
Data Sheet
7
Rev. 1.0, 2015-02-26
TLS208D1
General Product Characteristics
4.2
Functional Range
Table 2
Functional Range
Parameter
Symbol
Values
VI
Output Capacitor Requirements CQ
Input voltage
Unit
Min.
Typ.
Max.
2.7
–
18
Note /
Test Condition
Number
V
–
P_4.2.1
1
–
–
µF
1)
–
–
10
Ω
2)
P_4.2.3
-40
–
150
°C
–
P_4.2.4
–
P_4.2.2
for Stability
Output Capacitor Requirements ESR(CQ)
for Stability
Junction temperature
Tj
1) The minimum output capacitance requirement is applicable for a worst case capacitance tolerance of 30%
2) relevant ESR value at f = 10 kHz
Note: Within the functional or operating range, the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the Electrical Characteristics table.
4.3
Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go
to www.jedec.org.
Table 3
Thermal Resistance
Parameter
Symbol
Values
Unit
Note / Test Condition
Number
K/W
2s2p board 2)
P_4.3.1
Min.
Typ.
Max.
–
42
–
Junction to Ambient
RthJA
RthJA
RthJA
–
66
–
K/W
300 mm PCB heatsink P_4.3.3
area 3)
Junction to Ambient
RthJA
–
55
–
K/W
600 mm2 PCB heatsink P_4.3.4
area 3)
Junction to Case
RthJC
–
9.5
–
K/W
P_4.3.5
–
57
–
K/W
Junction to Ambient
RthJA
RthJA
RthJA
–
70
–
K/W
300 mm PCB heatsink P_4.3.8
area 3)
Junction to Ambient
RthJA
–
59
–
K/W
600 mm2 PCB heatsink P_4.3.9
area 3)
Junction to Case
RthJC
–
9
–
K/W
PG-DSO-8 (Exposed Pad)
Junction to Ambient 1)
Junction to Ambient
–
150
–
K/W
Footprint only
3)
P_4.3.2
2
PG-TSON10
Junction to Ambient 1)
Junction to Ambient
–
176
–
K/W
2s2p board 2)
Footprint only
P_4.3.6
3)
P_4.3.7
2
P_4.3.10
1) Not subject to production test, specified by design.
2) Specified RthJA value is according to JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The product
(chip+package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layer (2 x 70µm Cu, 2 x 35µm Cu).
Where applicable a thermal via array under the exposed pad contacted to the first inner copper layer.
3) Package mounted on PCB FR4; 80 x 80 x 1.5 mm; 35 µm Cu, 5 µm Sn; horizontal position; zero airflow.
Data Sheet
8
Rev. 1.0, 2015-02-26
TLS208D1
Voltage Regulator
5
Voltage Regulator
5.1
Description Voltage Regulator
The output voltage VQ is controlled as follows: it is divided by the resistor divider. This fraction is then compared
to an internal reference and drives the pass transistor accordingly.
By connecting the ADJ pin directly to the output Q the device will regulate to its reference voltage. In this case a
minimum load resistance of less than 300 kΩ needs to be ensured for stability reasons.
The control loop stability depends on the output capacitor CQ, the load current, the chip temperature and the circuit
design. To ensure stable operation, the requirements for output capacitance and equivalent series resistance
ESR, given in the “Functional Range” on Page 8, have to be maintained. For details see also the typical stability
graph of ESR versus load current on Page 17. As the output capacitor also has to buffer load steps it should be
sized according to the needs of the application.
An input capacitor CI of at least 220 nF is recommended to compensate line influences. Connect the capacitors
close to the terminals of the component.
In case the load current is above the specified limit, e.g. in case of a short circuit, the output current limitation limits
the current. The output voltage is therefore decreasing at the same time.
The overtemperature shutdown circuit prevents the IC from immediate destruction under fault conditions (e.g.
output continuously short-circuited) by switching off the power stage. After the chip has cooled down, the regulator
restarts. This leads to an oscillatory behavior of the output voltage until the fault is removed. However, junction
temperatures above 150 °C are outside the maximum ratings and therefore significantly reduce the IC’s lifetime.
Regulated
Supply
II
I
IQ Output Voltage
Q
FB
Current Limitation
C
CI
Driver
VI
ESR
CQ
Temperature
Shutdown
VQ
LOAD
Bandgap
Reference
GND
Figure 5
Block Diagram Voltage Regulator Circuit (Fixed Voltage Variant e.g. TLS208D1EJV33)
Supply
II
I
Q
Current Limitation
IQ
R1
ADJ
CI
VI
Regulated
Output Voltage
Driver
C
R2
ESR
CQ
Temperature
Shutdown
VQ
LOAD
Bandgap
Reference
GND
Figure 6
Data Sheet
Block Diagram Voltage Regulator Circuit (Adjustable Voltage Variant e.g. TLS208D1EJV)
9
Rev. 1.0, 2015-02-26
TLS208D1
Voltage Regulator
5.2
Electrical Characteristics Voltage Regulator
Table 4
Electrical Characteristics VI = VQ,nom + 1 V and VI > 2.7 V; Tj = -40 °C to +150 °C; all voltages
with respect to ground (unless otherwise specified)
Parameter
Symbol
Values
Min.
Typ.
Unit
Note / Test Condition
Number
Max.
Characteristic Adjustable Output Voltage (TLS208D1EJV, TLS208D1LDV)
Reference Voltage
Output Voltage
TLS208D1EJV
TLS208D1LDV
1)
Output Voltage 1)
TLS208D1EJV
TLS208D1LDV
Vref
VQ
–
0.8
-1%
VQ,nom +1%
V
IQ = 100 mA ;
Tj = 25 °C
P_5.2.2
VQ
-2%
VQ,nom +2%
V
IQ = 100 mA ;
P_5.2.3
0.8
–
5.25
V
10
mV/V IQ = 100 mA to 1 mA ;
P_5.2.5
VI ≥ VQ,nom + Vdr,max + 100 mV
Adjustable Voltage Range 2) VQ
TLS208D1EJV
TLS208D1LDV
–
V
P_5.2.1
P_5.2.4
Load Regulation
TLS208D1EJV
TLS208D1LDV
∆VQ,load –
/VQ,nom
5
Load Regulation
TLS208D1EJV
TLS208D1LDV
∆VQ,load -10
/VQ,nom
-5
–
mV/V IQ = 100 mA to 800 mA ;
P_5.2.6
VI ≥ VQ,nom + Vdr,max + 100 mV
and VI ≥ 3.8 V 3) 4)
Line Regulation
TLS208D1EJV
TLS208D1LDV
(∆VQ,line –
/VQ,nom)
/∆VI
0.01
0.2
%/V
3) 4)
VI = (VQ,nom + 1 V) to 10 V ;
VI ≥ 2.7 V ; IQ = 1 mA 4)
P_5.2.7
Characteristic Fixed Output Voltage (TLS208D1EJV33, TLS208D1LDV33)
Output Voltage
TLS208D1EJV33
TLS208D1LDV33
VQ
3.267
3.3
3.333
V
IQ = 100 mA ;
Tj = 25 °C
P_5.2.8
Output Voltage
TLS208D1EJV33
TLS208D1LDV33
VQ
3.234
3.3
3.366
V
1 mA ≤ IQ ≤ 800 mA
P_5.2.9
Load Regulation
TLS208D1EJV33
TLS208D1LDV33
∆VQ,load –
16
33
mV
IQ = 100 mA to 1 mA ;
VI ≥ 4.4 V 3)
P_5.2.10
Load Regulation
TLS208D1EJV33
TLS208D1LDV33
∆VQ,load -33
-16
–
mV
IQ = 100 mA to 800 mA ;
VI ≥ 4.4 V 3)
P_5.2.11
Line Regulation
TLS208D1EJV33
TLS208D1LDV33
∆VQ,line
–
1.88
37.6
mV
VI = 4.3V to 10 V ; IQ = 1 mA
P_5.2.12
–
0.9
1.0
V
P_5.2.13
–
0.45
0.54
V
–
1.0
1.2
V
–
0.5
0.68
V
VQ ≥ 3.3 V ; IQ = 800 mA
VQ ≥ 3.3 V ; IQ = 400 mA
VQ ≥ 2.5 V ; IQ = 800 mA
VQ ≥ 2.5 V ; IQ = 400 mA
Dropoutvoltage Characteristic
Dropout Voltage 5)
Dropout Voltage
5)
Dropout Voltage
5)
Dropout Voltage
5)
Data Sheet
Vdr
Vdr
Vdr
Vdr
10
P_5.2.14
P_5.2.15
P_5.2.16
Rev. 1.0, 2015-02-26
TLS208D1
Voltage Regulator
Table 4
Electrical Characteristics VI = VQ,nom + 1 V and VI > 2.7 V; Tj = -40 °C to +150 °C; all voltages
with respect to ground (unless otherwise specified) (cont’d)
Parameter
Symbol
Values
Unit
Note / Test Condition
Number
P_5.2.17
Min.
Typ.
Max.
–
1.19
1.35
V
–
0.65
0.96
V
–
1.59
1.85
V
–
62
–
dB
VQ ≥ 1.8 V ; IQ = 700 mA
VQ ≥ 1.8 V ; IQ = 400 mA 6)
VQ ≥ 1.2 V ; IQ = 700 mA
ff = 10 kHz ; IQ = 200 mA ;
Tj = 25 °C ; Vin = VQ + 1.5 V
and Vin ≥ 3.2 V ; ∆VI = 1 Vpp ;
CQ = 1 µF(Ceramic Capacitor)
IQ
Overtemperature Shutdown Tj,sd
801
1150
1350
mA
0 V ≤ VQ ≤ 0.9 * VQ,nom
P_5.2.21
151
175
200
°C
Tj increasing
P_5.2.22
Overtemperature Shutdown Tj,sd,Hyst
Hysteresis 2)
–
15
–
°C
Tj decreasing
P_5.2.23
–
500
nA
–
P_5.2.24
Dropout Voltage
5)
Dropout Voltage
5)
Dropout Voltage
5)
Power Supply Ripple
Rejection 2)
Vdr
Vdr
Vdr
PSRR
P_5.2.18
P_5.2.19
P_5.2.20
Protection Features
Output Current Limitation
Threshold 2)
Adjust Pin Characteristic (TLS208D1EJV)
Adjust Pin Pull Up Current 7) IADJ
–
1) Referring to the device tolerance only, the tolerance of the resistor divider can cause additional deviation. Parameter is
tested with ADJ-Pin directly connected to the output Q.
2) This parameter is not subject to production test, specified by design
3) The input voltage condition is intended to ensure that the device is out of the drop condition.
4) Tested with ADJ-Pin directly connected to the output Q.
5) Dropout voltage is defined as the difference between input and output voltage when the output voltage decreases 100 mV
from output voltage measured at VI = VQ,nom + Vdr,max + 100 mV.
6) The dropout voltage might be limited to the minimum input voltage as defined in P_4.2.1 on Page 8
7) ADJ pin pull up current flows out of the ADJ pin.
Data Sheet
11
Rev. 1.0, 2015-02-26
TLS208D1
Voltage Regulator
5.3
Typical Performance Characteristics Voltage Regulator
VEN = 5 V (unless otherwise noted)
Typical Performance Characteristics
Output Voltage VQ vs.
Input Voltage VI (Line Regulation)
Output Voltage VQ vs.
Load Current IQ (Load Regulation)
3.33
3.35
VI = 4.3 V
3.34
3.32
3.33
3.32
3.31
VQ [V]
VQ [V]
3.31
3.3
3.3
3.29
3.29
3.28
Tj = −40 °C
Tj = 25 °C
3.28
Tj = −40 °C
3.27
Tj = 125 °C
Tj = 25 °C
Tj = 125 °C
3.26
Tj = 150 °C
3.27
4
6
8
10
12
VI [V]
14
16
Tj = 150 °C
3.25
18
Output Voltage VQ vs.
Junction Temperature Tj
0
200
400
IQ [mA]
600
800
Power Up Timing VQ
3.33
5
VI = 4.3V ; VQ,nom = 3.3V
VEN
4.5
VQ
3.32
4
3.5
3.31
V [V]
VQ [V]
3
3.3
2.5
2
3.29
1.5
IQ = 1 mA
3.28
1
IQ = 100 mA
IQ = 400 mA
VQ,nom = 3.3V
IQ = 100mA
0.5
IQ = 800 mA
3.27
−50
Data Sheet
0
50
Tj [°C]
100
0
150
0
100
200
300
400
500
t [µs]
12
Rev. 1.0, 2015-02-26
TLS208D1
Voltage Regulator
Dropout Voltage Vdr vs.
Load Current IQ (VQ,nom = 3.3V)
Dropout Voltage Vdr vs.
Output Voltage VQ (IQ = 400 mA)
900
VQnom = 3.3 V
Tj = −40 °C
1200
Tj = 25 °C
800
Tj = 125 °C
700
Tj = 150 °C
1000
600
Vdr [mV]
Vdr [mV]
800
500
400
300
600
400
Tj = −40 °C
200
Tj = 25 °C
200
Tj = 125 °C
100
Tj = 150 °C
0
0
200
400
IQ [mA]
600
0
800
Dropout Voltage Vdr vs.
Output Voltage VQ (IQ = 800 mA)
1
2
3
VQ [V]
4
5
100
150
Adjust Pin Current IADJ vs.
Junction Temperature Tj
1800
300
Tj = −40 °C
Tj = 25 °C
1600
Tj = 125 °C
1400
250
Tj = 150 °C
200
1000
IADJ [nA]
Vdr [mV]
1200
800
600
150
100
400
50
200
0
1
Data Sheet
2
3
VQ [V]
4
0
−50
5
13
0
50
Tj [°C]
Rev. 1.0, 2015-02-26
TLS208D1
Voltage Regulator
PSRR vs. Frequency TLS208D1xxV33
PSRR vs. Frequency TLS208D1xxV
(adjusted to VQ,nom = 3.3 V)
90
90
IL = 200 mA
VI = 5 V
Tj = 25 °C
CQ = 1 µF Ceramic .
80
70
70
60
60
PSRR [dB]
PSRR [dB]
80
50
40
50
40
30
30
20
20
10
10
0
10
100
1k
10k
100k
IL = 200 mA
VI = 5 V
VQ,nom = 3.3 V
Tj = 25 °C
CQ = 1 µF Ceramic
CBYP = 1 nF Ceramic .
0
10
1M
100
f [Hz]
1k
10k
100k
1M
f [Hz]
Output Capacitor Series Resistance ESR(CQ) vs.
Output Current IQ (CQ = 1 μF)
Noise Graph TLS208D1xxV
(adjusted to VQ,nom = 3.3 V)
10
50
without CBYP
45
CBYP = 1 nF
40
35
ESR(CQ) [Ω]
Noise [µV/sqrt(Hz)]
1
30
Max ESR
Min ESR
25
20
0.1
15
IL = 200 mA
VI = 5 V
VQ,nom = 3.3 V
Tj = 25 °C
CQ = 1 µF Ceramic
0.01
10
100
10
1k
10k
100k
1M
0
f [Hz]
Data Sheet
CQ = 1 µF
Min ESR is equal to
built−in ESR of Cap. .
5
14
200
400
IQ [mA]
600
800
Rev. 1.0, 2015-02-26
TLS208D1
Voltage Regulator
Dynamic Load Response TLS208D1xxV33
(10mA to 200mA)
Dynamic Load Response TLS208D1xxV33
(10mA to 400mA)
Dynamic Load Response TLS208D1xxV
(adjusted to VQ,nom = 3.3 V) (10mA to 200mA)
Dynamic Load Response TLS208D1xxV
(adjusted to VQ,nom = 3.3 V) (10mA to 400mA)
Data Sheet
15
Rev. 1.0, 2015-02-26
TLS208D1
Voltage Regulator
Dynamic Load Response TLS208D1xxV
(adjusted to VQ,nom = 0.8 V) (10mA to 100mA)
Data Sheet
16
Rev. 1.0, 2015-02-26
TLS208D1
Current Consumption
6
Current Consumption
6.1
Description Current Consumption
The Current Consumption of the device is characterizing the current the device needs to operate. The Quiescent
Current is describing the Current Consumption in a very low load condition (e.g. the supplied microcontroller is in
sleep mode). The TLS208D1 has an Enable functionality to shutdown the device, in case it is not needed. During
shutdown the device has a very low Current Consumption. The Current Consumption of the device can be
determined by measuring the Current flowing out of the GND Pin and defined as the delta between II and (IQ+IEN).
II
I
Q
IQ
TLS208D1
IEN
EN
C
VI
CI
ESR
VEN
CQ
VQ
LOAD
GND
Iq+IEN
CurrentConsumption_Block.vsd
Figure 7
Parameter Definition Current Consumption
6.2
Electrical Characteristics Current Consumption
Table 5
Electrical Characteristics VI = VQ,nom + 1 V and VI > 2.7 V ; Tj = -40 °C to +150 °C , VRADJ ≥ 1.3 V;
all voltages with respect to ground (unless otherwise specified)
Parameter
Symbol
Values
Unit Note / Test Condition
Min.
Typ.
Max.
Number
Quiescent Current
Iq = II – IQ
Iq
–
90
170
µA
IQ = 10 µA
P_6.2.1
Current Consumption
Iq = II – IQ
Iq
–
200
250
µA
IQ = 50 mA
P_6.2.2
–
0.01
6
µA
VI = 5 V ; VEN = 0 V ;
Tj ≤ 125 °C ; VQ = 0 V
P_6.2.3
Quiescent Current in Shutdown Iq,off
Data Sheet
17
Rev. 1.0, 2015-02-26
TLS208D1
Current Consumption
6.3
Typical Performance Characteristics Current Consumption
VEN= 5 V (unless otherwise noted)
Quiescent Current Iq vs.
Input Voltage VI
Quiescent Current Iq vs.
Junction Temperature Tj
200
300
VI = 4.3 V
Tj = 25 [°C]
180
250
160
140
200
Iq [µA]
Iq [µA]
120
100
150
80
100
60
IQ = 10 µA
40
50
IQ = 10 µA
IQ = 10 mA
IQ = 10 mA
20
IQ = 50 mA
IQ = 100 mA
0
4
6
8
10
12
VI [V]
14
16
IQ = 400 mA
0
−50
18
Current Consumption Iq vs.
Load Current IQ
0
50
Tj [°C]
100
150
Quiescent Current in Shutdown Iq,off vs.
Junction Temperature Tj
300
200
VI = 4.3 V
VI = 4.3 V
180
250
160
VI = 10 V
VI = 14 V
140
200
Iq,off [nA]
Iq [µA]
120
150
100
80
100
60
VEN = 0 V
Tj = −40 °C
40
Tj = 25 °C
50
Tj = 125 °C
20
Tj = 150 °C
0
0
Data Sheet
100
200
IQ [mA]
300
0
−50
400
18
0
50
Tj [°C]
100
150
Rev. 1.0, 2015-02-26
TLS208D1
Enable Function
7
Enable Function
7.1
Description Enable Function
The TLS208D1 can be turned on or turned off by the EN Input. The parameter VEN is the voltage provided to the
EN Pin as shown in Figure 7 “Parameter Definition Current Consumption” on Page 17.
With voltage levels lower than VEN,Lo applied to the EN Input the device will be turned off. During this state the
device is in shutdown with a very low current consumption Iq,off. Changing the voltage at the EN Input from VEN,Lo
to VEN,Hi will trigger the start-up of the device. For voltages higher than VEN,Hi the device will regulate the output
voltage to the nominal value as described in Chapter 5 Voltage Regulator.
7.2
Electrical Characteristics Enable Function
Table 6
Electrical Characteristics VI = VQ,nom + 1 V and VI > 2.7 V ; Tj = -40 °C to +150 °C ; all voltages
with respect to ground (unless otherwise specified)
Parameter
Symbol
Enable High Voltage Level
Enable Low Voltage Level
Enable Pin Current
1)
VEN,Hi
VEN,Lo
IEN
Values
Unit Note / Test Condition
Min.
Typ.
Max.
2
–
–
V
–
–
0.4
V
–
4
5
µA
VQ,on ≥ 0.95 VQ,nom
VQ,off ≤ 200 mV
VEN = 5V
Number
P_7.2.1
P_7.2.2
P_7.2.3
1) Enable pin current flows into the EN pin.
7.3
Typical Performance Characteristics Enable Function
Enable Thresholds VEN vs.
Junction Temperature Tj
Enable Pin Current VEN vs.
Junction Temperature Tj
2
5
VEN increasing (Off−to−On)
4.5
VEN decreasing (On−to−Off)
1.8
4
3.5
1.6
IEN [µA]
VEN,th [V]
3
1.4
2.5
2
1.2
1.5
1
1
0.5
VEN = 5 V .
0.8
−50
Data Sheet
0
50
Tj [°C]
100
0
−50
150
19
0
50
Tj [°C]
100
150
Rev. 1.0, 2015-02-26
TLS208D1
Reset Function
8
Reset Function
8.1
Description Reset Function
The TLS208D1’s output voltage is supervised by the Reset feature, including Undervoltage Reset, delayed Reset
at Power-On and an adjustable Reset Threshold. Furthermore there is an input voltage monitor implemented that
is contributing to the reset function.
The Undervoltage Reset sets the pin RO to LOW, in case VQ is falling for any reason below the Reset Threshold
VRT,low.
When the regulator is powered on, the pin RO is held at LOW for the duration of the Power-On Reset Delay Time
trd.
I
Q
Internal Reset Threshold
only for fixed variants
Control
RRO
VDD
CQ
RO
VRT,int
optional
Supply
RRO,ext
Reset
IRO
VIn-RT
Power On
Reset Delay trd
OR
RADJ,1
in
MicroController
trd
VRADJ
RADJ
IRADJ
optional
out
GND
RADJ,2
Figure 8
GND
Block Diagram Reset Circuit
Reset Adjust Function
The undervoltage reset switching threshold can be adjusted according to the application’s needs by connecting
an external voltage divider (RADJ,1, RADJ,2) at pin “RADJ”.
In case you are using a device with a fixed output voltage, you can select the default undervoltage reset threshold
given in parameter by connecting the pin “RADJ” directly to GND.
By connecting the pin “RADJ” to the output Q the reset threshold is set to the minimum, which corresponds to the
specified parameter VRADJ.
When dimensioning the voltage divider, take into consideration that there will be an additional current constantly
flowing through the resistors.
With a voltage divider connected, the reset switching threshold VRT,new is calculated as follows
(neglecting the Reset Adjust Pin Current IRADJ):
(1)
•
•
•
VRT,new: Desired undervoltage reset switching threshold.
RADJ,1, RADJ,2: Resistors of the external voltage divider, see Figure 8.
VRADJ: Reset adjust switching threshold given in Table 7 (P_8.2.3 to P_8.2.5 depending on condition).
Data Sheet
20
Rev. 1.0, 2015-02-26
TLS208D1
Reset Function
8.2
Electrical Characteristics Reset Function
Table 7
Electrical Characteristics VI = VQ,nom + 1 V and VI > 2.7 V ; Tj = -40 °C to +150 °C ; all voltages
with respect to ground (unless otherwise specified)
Parameter
Symbol
Values
Min.
Unit Note / Test Condition
Typ.
Max.
Number
Fixed Reset Threshold (TLS208D1EJV33 only)
Output Undervoltage Reset
Threshold (default)
only TLS208D1EJV33 and
TLS208D1LDV33
VRT,def
2.87
2.97
3.07
V
Output Undervoltage Reset
Hysteresis
VRT,hyst
33
66
99
mV
Reset Adjust Lower Switching
Threshold
TLS208D1EJV33
TLS208D1LDV33
VRADJ
1.14
1.2
1.24
V
Reset Adjust Lower Switching
Threshold
TLS208D1EJV33
TLS208D1LDV33
VRADJ
Reset Adjust Lower Switching
Threshold
TLS208D1EJV
TLS208D1LDV
VRADJ
Reset Adjust Switching
Threshold Hysteresis 1)
VRADJ,hyst –
VRADJ = 0V
1.355 V ≤ VRT
P_8.2.1
P_8.2.2
Adjustable Reset Threshold
0.8VQ,nom ≤VRT ≤ 0.87VQ,n P_8.2.3
om
1.16
1.2
1.24
V
1.355 V ≤ VRT < 0.8VQ,no
P_8.2.4
m
1.16
1.2
1.24
V
1.355 V ≤ VRT < 0.9VQ,no
P_8.2.5
m
Reset Adjust Pull-down Current IRADJ
–
25
–
mV
P_8.2.6
–
1
µA
P_8.2.7
2.5
2.625
V
60
–
mV
Input Voltage Monitor
Input Reset Threshold
Input Reset Threshold
Hysteresis 1)
VIn-RT
2.4
VIn-RT,Hyst –
VI decreasing
VI increasing
P_8.2.8
P_8.2.9
Reset Timing Characteristic
Power On Reset Delay Time
Internal Reset Reaction Time
trd
trr,int
6
10
14
ms
P_8.2.10
–
–
10
µs
P_8.2.11
IRO,leak
VRO,Low
–
–
1
µA
–
–
0.4
V
RRO,ext
5
–
–
kΩ
Reset Output Characteristic
Reset Pin Leakage
Reset Output Low Voltage
Reset Output external Pull-up
Resistor to Q
VRO = VQ,nom
RRO,ext = 5 kΩ ;
1 V ≤ VQ ≤ VQ,nom
VRO ≤ 0.4 V ;
1 V ≤ VQ ≤ VQ,nom
P_8.2.12
P_8.2.13
P_8.2.14
1) This parameter is not subject to production test, specified by design
Data Sheet
21
Rev. 1.0, 2015-02-26
TLS208D1
Reset Function
8.3
Typical Performance Characteristics Reset Function
VEN = 5 V (unless otherwise noted)
Adjustable Reset Threshold Voltage VRADJ vs.
Junction Temperature Tj
RADJ Input Current IRADJ vs.
Junction Temperature Tj
1.4
200
VQ increasing
180
VQ decreasing
1.35
160
1.3
140
120
IRADJ [nA]
VRADJ,th [V]
1.25
1.2
100
80
1.15
60
1.1
40
1.05
1
−50
20
0
50
Tj [°C]
100
0
−50
150
Input Voltage Reset Threshold VIN-RT vs.
Junction Temperature Tj
0
50
Tj [°C]
100
150
Internal Reset Threshold Voltage VRT vs.
Junction Temperature Tj (TLS208D1xxV33)
3.15
3
VI increasing
2.9
VQ increasing
VI decreasing
VQ decreasing
3.1
2.8
2.7
3.05
VRT [V]
VIN−RT [V]
2.6
2.5
3
2.4
2.95
2.3
2.2
2.9
2.1
2
−50
Data Sheet
0
50
Tj [°C]
100
2.85
−50
150
22
0
50
Tj [°C]
100
150
Rev. 1.0, 2015-02-26
TLS208D1
Reset Function
Reset Delay Time trd vs.
Junction Temperature Tj
12
11.5
11
trd [ms]
10.5
10
9.5
9
8.5
8
−50
Data Sheet
0
50
Tj [°C]
100
150
23
Rev. 1.0, 2015-02-26
TLS208D1
Application Information
9
Application Information
Note: The following information is given as a hint for the implementation of the device only and shall not be
regarded as a description or warranty of a certain functionality, condition or quality of the device.
9.1
Adjustable Version - TLS208D1xxV
TLS208D1LDV
VI
I
Cin
220nF
GND
From µC
Figure 9
EN
Regulated
Output Voltage
Q
1
10
2
9
ADJ
3
8
RADJ
4
7
5
6
R1
RADJ,1
CBYP
R2
optional
C
LOAD
ESR
RADJ,2 R
RO,ext
CQ
RO
To µC
Reset
Application Diagram Adjustable Version (e.g. TLS208D1LDV)
Note: This is a very simplified example of an application circuit. The function must be verified in the real application.
The resistor divider for a specific output voltage can be calculated according to Equation (2). The current IADJ,
which flows into the ADJ-Pin, can be neglected, if Equation (3) is observed. VADJ is typically 0.8 V.
(2)
(3)
The output capacitor should be sized according to the application needs in terms of load and line variations.
Examples for loadsteps are given as typical performance graphs at Page 15.
An optional capacitor CBYP can be placed in parallel to R1 to improve the PSRR, noise and loadstep response of
this adjustable regulator. The capacitance depends strongly on the used resistance. Using Equation (4) a feasible
capacitance value can be determined, the final capacitance is to be evaluated according to the applications need.
(4)
TLS208D1 is designed to work with ceramic output caps, but allows also the usage of other capacitors according
to the allowed ESR range defined in the Functional Range. Furthermore there is a typ. performance graph on the
stability of the device at Page 14.
The adjustable voltage variants have an adjustable reset threshold can be adjusted individually by connecting a
resistor divider (RADJ,1 & RADJ2) between the Q and RADJ. For the calculation of the resistor values please refer to
Equation (1) in Chapter 8.1. There is no default internal reset threshold for the adjustable variants.
In case the device is used to generate output voltages lower than the VRADJ threshold, the reset function cannot
be used to supervise the own output voltage. In this case it is recommended to connect the RADJ pin to a voltage
higher than VRADJ (e.g. VI or VEN) in order to avoid additional current consumption due to the reset condition.
Data Sheet
24
Rev. 1.0, 2015-02-26
TLS208D1
Application Information
9.2
Fixed Voltage Version - TLS208D1xxV33
TLS208D1LDV33
VI
Cin
I
220nF
GND
From µC
Figure 10
EN
1
10
2
9
3
8
4
7
5
6
Regulated
Output Voltage
Q
FB
RADJ
RADJ,1
optional
RADJ,2
C
LOAD
ESR
RRO,ext
CQ
RO
To µC
Reset
Application Diagram Fixed Voltage Version (e.g. TLS208D1LDV33)
Note: This is a very simplified example of an application circuit. The function must be verified in the real application.
For the fixed voltage variants of the TLS208D1 the feedback pin FB must be connected to the output voltage to
be regulated. This connection is mandatory to ensure proper regulation.
The output capacitor should be sized according to the application needs in terms of load and line variations.
Examples for loadsteps are given as typical performance graphs at Page 15.
TLS208D1 is designed to work with ceramic output caps, but allows also the usage of other capacitors according
to the allowed ESR range defined in the Functional Range. Furthermore there is a typ. performance graph on the
stability of the device at Page 14.
The fixed voltage variants have an default internal reset threshold (P_8.2.1) which can be used by connecting the
RADJ pin to GND. Furthermore the reset threshold can be adjusted to lower values than the internal reset
threshold by connecting a resistor divider (RRADJ,1 & RRADJ2) between the Q and RADJ. For the calculation of the
resistor values please refer to Equation (1) in Chapter 8.1.
Data Sheet
25
Rev. 1.0, 2015-02-26
TLS208D1
Package Outlines
10
Package Outlines
10.1
Package Outlines PG-DSO-8 (Exposed Pad)
0.35 x 45˚
1.27
0.41±0.09 2)
0.2
M
0.19 +0.06
0.08 C
Seating Plane
C A-B D 8x
0.64 ±0.25
D
0.2
6 ±0.2
8˚ MAX.
C
0.1 C D 2x
1.7 MAX.
Stand Off
(1.45)
0.1+0
-0.1
3.9 ±0.11)
M
D 8x
Bottom View
8
1
5
1
4
8
4
5
2.65 ±0.2
3 ±0.2
A
B
4.9 ±0.11)
0.1 C A-B 2x
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Dambar protrusion shall be maximum 0.1 mm total in excess of lead width
3) JEDEC reference MS-012 variation BA
Figure 11
PG-DSO-8-27-PO V01
PG-DSO-8 (Exposed Pad)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
For further information on alternative packages, please visit our website:
http://www.infineon.com/packages.
Data Sheet
26
Dimensions in mm
Rev. 1.0, 2015-02-26
TLS208D1
Package Outlines
1.63 ±0.1
Z
0.71 ±0.1
Pin 1 Marking
0.25 ±0.1
3.3 ±0.1
0.05
0.5 ±0.1
0.53 ±0.1
1.48 ±0.1
0.36 ±0.1
0.55 ±0.1
0.1 ±0.1
3.3 ±0.1
2.58 ±0.1
0.96 ±0.1
0.2 ±0.1
0 +0.05
Package Outlines PG-TSON10
1±0.1
10.2
Pin 1 Marking
0.25 ±0.1
Z (4:1)
0.07 MIN.
Figure 12
PG-TSON10
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
For further information on alternative packages, please visit our website:
http://www.infineon.com/packages.
Data Sheet
27
Dimensions in mm
Rev. 1.0, 2015-02-26
TLS208D1
Revision History
11
Revision History
Revision Date
Changes
1.0
Initial Data Sheet.
2015-02-26
Data Sheet
28
Rev. 1.0, 2015-02-26
Edition 2015-02-26
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2015 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
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