TLS710B0EJV50XUMA1

Low Dropout Linear Voltage Regulator TLS710B0 TLS710B0V50 Linear Voltage Regulator Data Sheet Rev. 1.0, 2015-04-02 Automotive Power TLS710B0 Table of Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 3.1 3.2 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin Assignment PG-DSO-8 EP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin Definitions and Functions PG-DSO-8 EP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 4.1 4.2 4.3 General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5.1 5.2 5.3 5.4 5.5 5.6 Block Description and Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Voltage Regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Typical Performance Characteristics Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Typical Performance Characteristics Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Typical Performance Characteristics Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6 6.1 6.2 6.2.1 6.2.2 6.3 6.4 6.5 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Selection of External Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reverse Polarity Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Data Sheet 2 6 6 7 8 17 17 17 17 17 18 19 19 Rev. 1.0 2015-04-02 TLS710B0V50 1 TLS710B0 Overview Features • Wide Input Voltage Range from 4.0 V to 40 V • Output Voltage 5 V • Output Voltage Precision ±2 % • Output Current up to 100 mA • Low Current Consumption of 36 µA • Very Low Dropout Voltage of typ. 200 mV at 100 mA Output Current • Stable with Small Output Capacitor of 1 µF • Enable • Overtemperature Shutdown • Output Current Limitation • Wide Temperature Range from -40 °C up to 150 °C • Green Product (RoHS compliant) • AEC Qualified PG-DSO-8 EP Description The TLS710B0 is a low dropout linear voltage regulator for load current up to 100 mA. An input voltage of up to 40 V is regulated to VQ,nom = 5 V with ±2 % precision. The TLS710B0, with a typical quiescent current of 36 µA, is the ideal solution for systems requiring very low operating current, such as those permanently connected to the battery. It features a very low dropout voltage of 200 mV, when the output current is less than 100 mA. In addition, the dropout region begins at input voltages of 4.0 V (extended operating range). This makes the TLS710B0 suitable to supply automotive systems with start-stop requirements. The device can be switched on and off by the Enable feature as described on Chapter “Enable” on Page 15. In addition, the TLS710B0’s new fast regulation concept requires only a single 1 µF output capacitor to maintain stable regulation. The device is designed for the harsh environment of automotive applications. Therefore standard features like output current limitation and overtemperature shutdown are implemented and protect the device against failures like output short circuit to GND, over-current and over-temperature. The TLS710B0 can be also used in all other applications requiring a stabilized 5 V supply voltage. Type Package Marking TLS710B0EJV50 PG-DSO-8 EP 710B0V50 Data Sheet 3 Rev. 1.0, 2015-04-02 TLS710B0 Block Diagram 2 Block Diagram I Q Current Limitation EN Enable Bandgap Reference Temperature Shutdown GND Figure 1 Data Sheet Block Diagram TLS710B0EJV50 4 Rev. 1.0 2015-04-02 TLS710B0 Pin Configuration 3 Pin Configuration 3.1 Pin Assignment PG-DSO-8 EP I 1 8 Q EN 2 7 n.c. GND 3 6 n.c. n.c. 4 5 n.c. Figure 2 Pin Configuration 3.2 Pin Definitions and Functions PG-DSO-8 EP Pin Symbol Function 1 I Input For compensating line influences, a capacitor to GND close to the IC terminals is recommended. 2 EN Enable (integrated pull-down resistor) Enable the IC with high level input signal. Disable the IC with low level input signal. 3 GND Ground 4, 5, 6, 7 n.c. Not connected Leave open or connect to GND. 8 Q Output Block to GND with a capacitor close to the IC terminals, respecting the values given for its capacitance CQ and ESR in the table “Functional Range” on Page 7. Pad – Exposed Pad Connect to heatsink area. Connect with GND on PCB. Data Sheet 5 Rev. 1.0 2015-04-02 TLS710B0 General Product Characteristics 4 General Product Characteristics 4.1 Absolute Maximum Ratings Table 1 Absolute Maximum Ratings1) Tj = -40 °C to +150 °C; all voltages with respect to ground (unless otherwise specified) Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. VI, VEN -0.3 – 45 V – P_4.1.1 VQ -0.3 – 7 V – P_4.1.2 Junction Temperature Tj -40 – 150 °C – P_4.1.3 Storage Temperature Tstg -55 – 150 °C – P_4.1.4 VESD -2 – 2 kV HBM2) P_4.1.5 3) P_4.1.6 Input I, Enable EN Voltage Output Q Voltage Temperature ESD Absorption ESD Susceptibility to GND ESD Susceptibility to GND VESD -750 – 750 V CDM 1) Not subject to production test, specified by design. 2) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF) 3) ESD susceptibility, Charged Device Model “CDM” according JEDEC JESD22-C101 Notes 1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. Data Sheet 6 Rev. 1.0 2015-04-02 TLS710B0 General Product Characteristics 4.2 Functional Range Table 2 Functional Range Parameter Symbol Values Min. Typ. Unit Note or Test Condition Number Max. Input Voltage Range for Normal Operation VI VQ,nom + Vdr – 40 V – P_4.2.1 Extended Input Voltage Range VI,ext 4.0 – 40 V –1) P_4.2.2 Enable Voltage Range VEN 0 – 40 V – P_4.2.3 2) P_4.2.4 Output Capacitor’s Requirements for Stability CQ 1 – – µF – Output Capacitor’s ESR ESR(CQ) – – 5 Ω –3) P_4.2.5 Junction Temperature Ti -40 – 150 °C – P_4.2.6 1) When VI is between VI,ext.min and VQ,nom + Vdr, VQ = VI - Vdr. When VI is below VI,ext,min, VQ can drop down to 0 V. 2) The minimum output capacitance requirement is applicable for a worst case capacitance tolerance of 30% 3) Relevant ESR value at f = 10 kHz Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table. Data Sheet 7 Rev. 1.0 2015-04-02 TLS710B0 General Product Characteristics 4.3 Thermal Resistance Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to www.jedec.org. Table 3 Thermal Resistance Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number Package Version PG-DSO-8 EP Junction to Case1) RthJC – 13 – K/W – P_4.3.1 Junction to Ambient RthJA – 46 – K/W 2s2p board2) P_4.3.2 Junction to Ambient RthJA – 153 – K/W 1s0p board, footprint only3) P_4.3.3 Junction to Ambient RthJA – 71 – K/W 1s0p board, 300 mm2 P_4.3.4 heatsink area on PCB3) Junction to Ambient RthJA – 59 – K/W 1s0p board, 600 mm2 P_4.3.5 heatsink area on PCB3) 1) Not subject to production test, specified by design 2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer. 3) Specified RthJA value is according to JEDEC JESD 51-3 at natural convection on FR4 1s0p board; The Product (Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 x 70µm Cu). Data Sheet 8 Rev. 1.0 2015-04-02 TLS710B0 Block Description and Electrical Characteristics 5 Block Description and Electrical Characteristics 5.1 Voltage Regulation The output voltage VQ is divided by a resistor network. This fractional voltage is compared to an internal voltage reference and drives the pass transistor accordingly. The control loop stability depends on the output capacitor CQ, the load current, the chip temperature and the internal circuit design. To ensure stable operation, the output capacitor’s capacitance and its equivalent series resistor ESR requirements given in Table 2 “Functional Range” on Page 7 must be maintained. For details see the typical performance graph “Output Capacitor Series Resistor ESR(CQ) versus Output Current IQ” on Page 12. Since the output capacitor is used to buffer load steps, it should be sized according to the application’s needs. An input capacitor CI is not required for stability, but is recommended to compensate line fluctuations. An additional reverse polarity protection diode and a combination of several capacitors for filtering should be used, in case the input is connected directly to the battery line. Connect the capacitors close to the regulator terminals. Whenever the load current exceeds the specified limit, e.g. in case of a short circuit, the output current is limited and the output voltage decreases. The overtemperature shutdown circuit prevents the IC from immediate destruction under fault conditions (e.g. output continuously short-circuited) by switching off the power stage. After the chip has cooled, the regulator restarts. This oscillatory thermal behaviour causes the junction temperature to exceed the maximum rating of 150°C and can significantly reduce the IC’s lifetime. Supply II I Q Regulated Output Voltage IQ Current Limitation EN Enable CI VI Bandgap Reference Temperature Shutdown C LOAD VQ ESR CQ GND Figure 3 Data Sheet Block Diagram Voltage Regulation 9 Rev. 1.0 2015-04-02 TLS710B0 Block Description and Electrical Characteristics Table 4 Electrical Characteristics Voltage Regulator VI = 13.5 V; Tj = -40 °C to +150 °C; all voltages with respect to ground (unless otherwise specified). Typical values are given at Tj = 25 °C, VI = 13.5 V. Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number Output Voltage Precision VQ 4.9 5.0 5.1 V 0.05 mA < IQ < 100 mA P_5.1.1 6 V < VI < 28 V Output Voltage Precision VQ 4.9 5.0 5.1 V 0.05 mA < IQ < 50 mA 6 V < VI < 40 V P_5.1.2 Output Current Limitation IQ,max 101 250 350 mA 0 V < VQ < 4.8 V 4 V < VI < 28 V P_5.1.7 Load Regulation steady-state |∆VQ,load| – 1 25 mV IQ = 0.05 mA to 100 mA P_5.1.9 VI = 6 V Line Regulation steady-state |∆VQ,line| – 1 25 mV VI = 8 V to 32 V IQ = 5 mA P_5.1.10 Dropout Voltage1) Vdr = VI - VQ Vdr – 200 500 mV IQ = 100 mA P_5.1.11 Power Supply Ripple Rejection2) PSRR – 60 – dB fripple = 100 Hz Vripple = 0.5 Vpp P_5.1.12 Overtemperature Shutdown Threshold Tj,sd 151 – 200 °C Tj increasing2) P_5.1.13 Overtemperature Shutdown Threshold Hysteresis Tj,sdh – 15 – K Tj decreasing2) P_5.1.14 1) Measured when the output voltage VQ has dropped 100 mV from the nominal value obtained at VI = 13.5V 2) Not subject to production test, specified by design Data Sheet 10 Rev. 1.0 2015-04-02 TLS710B0 Block Description and Electrical Characteristics 5.2 Typical Performance Characteristics Voltage Regulator Typical Performance Characteristics Output Voltage VQ versus Junction Temperature Tj Output Current IQ versus Input Voltage VI 400 Tj = −40 °C 5.15 Tj = 25 °C 350 5.1 300 5.05 250 IQmax [mA] VQ [V] Tj = 150 °C 5 200 4.95 150 4.9 100 4.85 50 VI = 13.5 V IQ = 50 mA 0 4.8 0 50 Tj [°C] 100 150 Dropout Voltage Vdr versus Junction Temperature Tj 0 Tj = 25 °C IQ = 100 mA Tj = 150 °C 500 400 400 Vdr [mV] Vdr [mV] 40 Tj = −40 °C IQ = 50 mA 300 300 200 200 100 100 Data Sheet 30 600 IQ = 10 mA 0 20 VI [V] Dropout Voltage Vdr versus Output Current IQ 600 500 10 0 50 Tj [°C] 100 0 150 0 20 40 60 80 100 IQ [mA] 11 Rev. 1.0 2015-04-02 TLS710B0 Block Description and Electrical Characteristics Output Voltage VQ versus Input Voltage VI Power Supply Ripple Rejection PSRR versus Ripple Frequency fr 6 100 90 5 80 70 4 PSRR [dB] VQ [V] 60 3 50 40 2 30 20 1 IQ = 50 mA Tj = 25 °C 0 0 1 2 3 VI [V] 4 5 10 0 −2 10 6 IQ = 10 mA CQ = 1 μF VI = 13.5 V Vripple = 0.5 Vpp Tj = 25 °C −1 10 0 1 10 10 2 10 3 10 f [kHz] Output Capacitor Series Resistor ESR(CQ) versus Output Current IQ 2 10 Unstable Region 1 ESR(CQ) [Ω] 10 0 10 Stable Region −1 10 CQ = 1 μF VI = 5.5 ... 28 V −2 10 0 20 40 60 80 100 IQ [mA] Data Sheet 12 Rev. 1.0 2015-04-02 TLS710B0 Block Description and Electrical Characteristics 5.3 Current Consumption Table 5 Electrical Characteristics Current Consumption VI = 13.5 V; Tj = -40 °C to +150 °C (unless otherwise specified). Typical values are given at Tj = 25 °C, VI = 13.5 V. Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number Current Consumption Iq = II Iq,off – 1.5 5 µA VEN ≤ 0.4 V Tj < 105 °C P_5.3.1 Current Consumption Iq = II - IQ Iq – 36 80 µA 0.05 mA < IQ < 100 mA P_5.3.2 Data Sheet 13 Rev. 1.0 2015-04-02 TLS710B0 Block Description and Electrical Characteristics 5.4 Typical Performance Characteristics Current Consumption Typical Performance Characteristics Current Consumption Iq versus Output Current IQ Current Consumption Iq versus Input Voltage VI 80 80 Tj = −40 °C Tj = −40 °C Tj = 25 °C 70 70 Tj = 25 °C Tj = 150 °C 60 60 50 50 Iq [μA] Iq [μA] Tj = 150 °C 40 40 30 30 20 20 10 10 IQ = 50 μA VI = 13.5 V 0 0 20 40 60 80 0 100 10 15 IQ [mA] 80 4 70 3.5 60 3 50 2.5 40 1.5 20 1 Data Sheet 0.5 VI = 13.5 V IQ = 50 μA 0 0 50 Tj [°C] 100 VI = 13.5 V VEN ≤ 0.4 V 2 30 0 25 Current Consumption in OFF mode Iq,off versus Junction Temperature Tj Iq,off [μA] Iq [μA] Current Consumption Iq versus Junction Temperature Tj 10 20 VI [V] 150 14 0 50 Tj [°C] 100 Rev. 1.0 2015-04-02 TLS710B0 Block Description and Electrical Characteristics 5.5 Enable The TLS710B0 can be switched on and off by the Enable feature. Connect a HIGH level as specified below (e.g. the battery voltage) to pin EN to enable the device; connect a LOW level as specified below (e.g. GND) to switch it off. The Enable function has a build-in hysteresis to avoid toggling between ON/OFF state, if signals with slow slopes are appiled to the input. Table 6 Electrical Characteristics Enable VI = 13.5 V; Tj = -40 °C to +150 °C; all voltages with respect to ground (unless otherwise specified). Typical values are given at Tj = 25 °C, VI = 13.5 V. Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number Enable Voltage High Level VEN,H 2 – – V VQ settled P_5.5.1 Enable Voltage Low Level VEN,L – – 0.8 V VQ ≤ 0.1 V P_5.5.2 Enable Threshold Hysteresis VEN,Hy 75 – – mV – P_5.5.3 Enable Input Current Low Level IEN,H – – 5.5 µA VEN = 5 V P_5.5.4 Enable Input Current High Level IEN,H – – 22 µA VEN < 18 V P_5.5.5 Enable internal pull-down resistor REN 0.9 1.5 2.6 MΩ – P_5.5.6 Data Sheet 15 Rev. 1.0 2015-04-02 TLS710B0 Block Description and Electrical Characteristics 5.6 Typical Performance Characteristics Enable Typical Performance Characteristics Enabled Input Current IEN versus Enabled Input Voltage VEN 40 Tj = −40 °C Tj = 25 °C 35 Tj = 150 °C 30 IEN [μA] 25 20 15 10 5 0 0 Data Sheet 10 20 VEN [V] 30 40 16 Rev. 1.0 2015-04-02 TLS710B0 Application Information 6 Application Information 6.1 Application Diagram Supply I Q D I1 Regulated Output Voltage Current Limitation D I2 C I2 C I1