TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltag e Regu lator
1
Overview
Quality Requirement Category: Automotive
Features
•
Ultra Low Quiescent Current of 5.5 µA
•
Wide Input Voltage Range of 2.75 V to 42 V
•
Output Current Capacity up to 100 mA
•
Off Mode Current Less than 1 µA
•
Low Drop Out Voltage of typ. 250 mV @ 100 mA
•
Output Current Limit Protection
•
Overtemperature Shutdown
•
Enable
•
Available in PG-DSO-8 EP Package
•
Available in PG-TSON-10 Package
•
Wide Temperature Range
•
Green Product (RoHS Compliant)
•
AEC Qualified
Applications
•
Applications with direct battery connection
•
Automotive general ECUs
•
Infotainment, alarm, dashboard
•
RKE, immobilizer, gateway
Data Sheet
www.infineon.com/power
1
Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Overview
Description
The TLS810B1 is a linear voltage regulator featuring wide input voltage range, low drop out voltage and ultra
low quiescent current.
With an input voltage range of 2.75 V to 42 V and ultra low quiescent of only 5.5 µA, the regulator is perfectly
suitable for automotive or any other supply systems connected permanently to the battery.
The TLS810B1xxV33 is the fixed 3.3 V output version with an accuracy of 2 % and output current capability up
to 100 mA.
The new regulation concept implemented in TLS810B1 combines fast regulation and very good stability while
requiring only a small ceramic capacitor of 1 μF at the output.
The tracking region starts already at input voltages of 2.75 V (extended operating range). This makes the
TLS810B1 also suitable to supply automotive systems that need to operate during cranking condition.
Internal protection features like output current limitation and overtemperature shutdown are implemented
to protect the device against immediate damage due to failures like output short circuit to GND, over-current
and over-temperature.
The device can be switched on and off by the Enable feature. When the device is switched off, the current
consumption is typically less than 1 µA.
Type
Package
Marking
TLS810B1EJV33
PG-DSO-8 EP
810B1V33
TLS810B1LDV33
PG-TSON-10
810B1V3
Data Sheet
2
Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Table of Contents
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
3.1
3.2
3.3
3.4
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Assignment in PG-DSO-8 EP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Definitions and Functions in PG-DSO-8 EP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Assignment in PG-TSON-10 Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Definitions and Functions in PG-TSON-10 Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
5
5
6
6
4
4.1
4.2
4.3
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7
7
8
9
5
5.1
5.2
5.3
5.4
5.5
5.6
Block Description and Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage Regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical Performance Characteristics Voltage Regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical Performance Characteristics Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical Performance Characteristics Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
10
12
15
16
17
18
6
6.1
6.2
6.2.1
6.2.2
6.3
6.4
6.5
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Selection of External Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reverse Polarity Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
19
19
19
19
19
20
21
21
7
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
8
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Data Sheet
3
Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Block Diagram
2
Block Diagram
I
Q
Current
Limitation
EN
Enable
Temperature
Shutdown
Bandgap
Reference
GND
Figure 1
Data Sheet
Block Diagram TLS810B1
4
Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment in PG-DSO-8 EP Package
Figure 2
3.2
I
1
8
Q
N.C.
2
7
N.C.
EN
3
6
N.C.
GND
4
5
N.C.
Pin Configuration TLS810B1 in PG-DSO-8 EP package
Pin Definitions and Functions in PG-DSO-8 EP Package
Pin
Symbol
Function
1
I
Input
It is recommended to place a small ceramic capacitor (for example 100 nF) to GND, close to
the IC terminals, in order to compensate line influences.
2
N.C.
Not connected
3
EN
Enable
Integrated pull-down resistor.
Enable the IC with high level input signal.
Disable the IC with low level input signal.
4
GND
Ground
5
N.C.
Not connected
6
N.C.
Not connected
7
N.C.
Not connected
8
Q
Output
Connect an output capacitor CQ to GND close to the IC’s terminals, respecting the values
specified for its capacitance and ESR in Table 2 “Functional Range” on Page 8.
Pad –
Data Sheet
Exposed Pad
Connect to heatsink area.
Connect to GND.
5
Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Pin Configuration
3.3
Pin Assignment in PG-TSON-10 Package
Figure 3
3.4
TSON-10
I
1
N.C.
2
9
Q
EN
3
8
N.C.
N.C.
4
7
N.C.
GND
5
6
N.C.
10
N.C.
Pin Configuration TLS810B1 in PG-TSON-10 package
Pin Definitions and Functions in PG-TSON-10 Package
Pin
Symbol
Function
1
I
Input
It is recommended to place a small ceramic capacitor (for example 100 nF) to GND, close to
the IC terminals, in order to compensate line influences.
2
N.C.
Not connected
3
EN
Enable
Integrated pull-down resistor.
Enable the IC with high level input signal.
Disable the IC with low level input signal.
4
N.C.
Not connected
5
GND
Ground
6
N.C.
Not connected
7
N.C.
Not connected
8
N.C.
Not connected
9
Q
Output
Connect an output capacitor CQ to GND close to the IC’s terminals, respecting the values
specified for its capacitance and ESR in Table 2 “Functional Range” on Page 8.
10
N.C.
Not connected
Pad –
Data Sheet
Exposed Pad
Connect to heatsink area.
Connect to GND.
6
Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Table 1
Absolute Maximum Ratings1)
Tj = -40°C to +150°C; all voltages with respect to ground (unless otherwise specified)
Parameter
Symbol
Values
Unit
Note or
Test Condition
Number
Min.
Typ.
Max.
VI, VEN
-0.3
–
45
V
–
P_4.1.1
VQ
-0.3
–
7
V
–
P_4.1.2
Junction Temperature
Tj
-40
–
150
°C
–
P_4.1.3
Storage Temperature
Tstg
-55
–
150
°C
–
P_4.1.4
VESD,HBM
-2
–
2
kV
HBM2)
Voltage Input I, Enable EN
Voltage
Voltage Output Q
Voltage
Temperatures
ESD Absorption
ESD Susceptibility to GND
ESD Susceptibility to GND
VESD,CDM
-750
–
750
V
P_4.1.5
3)
CDM at all pins P_4.1.6
1) Not subject to production test, specified by design.
2) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF)
3) ESD susceptibility, Charged Device Model “CDM” according JEDEC JESD22-C101
Notes
1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
Data Sheet
7
Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
General Product Characteristics
4.2
Table 2
Functional Range
Functional Range
Parameter
Symbol
Values
Min.
Input Voltage Range
VI
Typ.
VQ,nom+Vdr –
Unit
Note or
Number
Test Condition
V
–1)
P_4.2.1
2)
P_4.2.2
Max.
42
Extended Input Voltage
Range
VI,ext
2.75
–
42
V
–
Enable Voltage Range
VEN
0
–
42
V
–
P_4.2.3
3)4)
Output Capacitor
CQ
1
–
–
µF
–
Output Capacitor’s ESR
ESR(CQ)
–
–
100
Ω
–4)
P_4.2.5
Junction temperature
Tj
-40
–
150
°C
–
P_4.2.6
1)
2)
3)
4)
P_4.2.4
Output current is limited internally and depends on the input voltage, see Electrical Characteristics for more details.
When VI is between VI,ext.min and VQ,nom + Vdr, VQ = VI - Vdr. When VI is below VI,ext,min, VQ can drop down to 0 V.
The minimum output capacitance requirement is applicable for a worst case capacitance tolerance of 30%.
Not subject to production testing, specified by design.
Note:
Data Sheet
Within the functional or operating range, the IC operates as described in the circuit description. The
electrical characteristics are specified within the conditions given in the Electrical Characteristics
table.
8
Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
General Product Characteristics
4.3
Thermal Resistance
Note:
This thermal data was generated in accordance with JEDEC JESD51 standards. For more
information, go to www.jedec.org.
Table 3
Thermal ResistanceTLS810B1 in PG-DSO-8 EP Package1)
Parameter
Symbol
Values
Unit Note or Test Condition
Number
K/W
P_4.3.1
Min. Typ. Max.
Junction to Case
Junction to Ambient
Junction to Ambient
RthJC
RthJA
RthJA
–
–
–
19
51
167
–
–
K/W
–
K/W
–
2s2p board
2)
P_4.3.2
3)
1s0p board, footprint only
2
P_4.3.3
Junction to Ambient
RthJA
–
71
–
K/W
1s0p board, 300 mm heatsink
area on PCB3)
P_4.3.4
Junction to Ambient
RthJA
–
60
–
K/W
1s0p board, 600 mm2 heatsink
area on PCB3)
P_4.3.5
1) Not subject to production test, specified by design
2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm
Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
3) Specified RthJA value is according to JEDEC JESD 51-3 at natural convection on FR4 1s0p board; The Product
(Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 x 70µm Cu).
Table 4
Thermal Resistance TLS810B1 in PG-TSON-10 Package1)
Parameter
Junction to Case
Symbol
RthJC
Values
Min. Typ.
Max.
–
–
13
Unit Note or Test Condition
Number
K/W
P_4.3.6
–
2)
Junction to Ambient
RthJA
–
60
–
K/W
2s2p board
P_4.3.7
Junction to Ambient
RthJA
–
184
–
K/W
1s0p board, footprint only3)
2
P_4.3.8
Junction to Ambient
RthJA
–
75
–
K/W
1s0p board, 300 mm heatsink
area on PCB3)
P_4.3.9
Junction to Ambient
RthJA
–
64
–
K/W
1s0p board, 600 mm2 heatsink
area on PCB3)
P_4.3.10
1) Not subject to production test, specified by design
2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm
Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
3) Specified RthJA value is according to JEDEC JESD 51-3 at natural convection on FR4 1s0p board; The Product
(Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 x 70µm Cu).
Data Sheet
9
Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Block Description and Electrical Characteristics
5
Block Description and Electrical Characteristics
5.1
Voltage Regulation
The output voltage VQ is divided by a resistor network. This fractional voltage is compared to an internal
voltage reference and the pass transistor is driven accordingly.
The control loop stability depends on the output capacitor CQ, the load current, the chip temperature and the
internal circuit structure. To ensure stable operation, the output capacitor’s capacitance and its equivalent
series resistor ESR requirements given in “Functional Range” on Page 8 have to be maintained. For details
see the typical performance graph Output Capacitor Series Resistor ESR(CQ) versus Output Current IQ on
Page 14. Since the output capacitor is used to buffer load steps, it should be sized according to the
application’s needs.
An input capacitor CI is not required for stability, but is recommended to compensate line fluctuations. An
additional reverse polarity protection diode and a combination of several capacitors for filtering should be
used, in case the input is connected directly to the battery line. Connect the capacitors close to the regulator
terminals.
In order to prevent overshoots during start-up, a smooth ramping up function is implemented. This ensures
almost no overshoots during start-up, mostly independent from load and output capacitance.
Whenever the load current exceeds the specified limit, for example in case of a short circuit, the output current
is limited and the output voltage decreases.
The overtemperature shutdown circuit prevents the IC from immediate destruction under fault conditions (for
example output continuously short-circuit) by switching off the power stage. After the chip has cooled down,
the regulator restarts. This oscillatory thermal behaviour causes the junction temperature to exceed the
maximum rating of 150°C and can significantly reduce the IC’s lifetime.
Supply
II
I
Q
IQ
Regulated
Output Voltage
Current
Limitation
C
CI
VI
Bandgap
Reference
Temperature
Shutdown
CQ
ESR
VQ
LOAD
GND
Figure 4
Data Sheet
Block Diagram Voltage Regulation
10
Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Block Description and Electrical Characteristics
Table 5
Electrical Characteristics
Tj = -40°C to +150°C, VI = 13.5 V, all voltages with respect to ground (unless otherwise specified).
Typical values are given at Tj = 25°C, VI = 13.5 V.
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit Note or Test Condition
Number
Output Voltage Precision
VQ
3.23
3.30
3.37
V
50 µA ≤ IQ ≤ 100 mA,
4 V ≤ VI ≤ 28 V
P_5.1.1
Output Voltage Precision
VQ
3.23
3.30
3.37
V
50 µA ≤ IQ ≤ 50 mA,
4 V ≤ VI ≤ 42 V
P_5.1.2
Output Current Limitation
IQ,lim
110
190
260
mA
0 V ≤ VQ ≤ VQ,nom - 0.1 V
P_5.1.3
Line Regulation
steady-state
ΔVQ,line
–
1
20
mV
IQ = 1 mA, 6 V ≤ VI ≤ 32 V
P_5.1.4
Load Regulation
steady-state
ΔVQ,load
-20
-1
–
mV
VI = 6 V,
50 µA ≤ IQ ≤ 100 mA
P_5.1.5
Dropout Voltage1)
Vdr = VI - VQ
Vdr
–
250
650
mV
IQ = 100 mA
P_5.1.6
Ripple Rejection2)
PSRR
–
60
–
dB
IQ = 50 mA,
fripple = 100 Hz,
Vripple = 0.5 Vp-p
P_5.1.7
Overtemperature
Shutdown Threshold2)
Tj,sd
151
175
–
°C
Tj increasing
P_5.1.8
Overtemperature
Shutdown Threshold
Hysteresis2)
Tj,sdh
–
10
–
K
Tj decreasing
P_5.1.9
1) Measured when the output voltage VQ has dropped 100 mV from the nominal value obtained at VI = 13.5V
2) Not subject to production test, specified by design
Data Sheet
11
Rev. 1.2
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TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Block Description and Electrical Characteristics
5.2
Typical Performance Characteristics Voltage Regulation
Output Voltage VQ versus
Junction Temperature Tj
Output Current IQ versus
Input Voltage VI
3.5
300
Tj = −40 °C
Tj = 25 °C
3.45
Tj = 150 °C
250
3.4
200
IQmax [mA]
VQ [V]
3.35
3.3
150
3.25
100
3.2
50
3.15
3.1
VI = 13.5 V
IQ = 50 mA
0
50
Tj [°C]
100
0
150
Dropout Voltage Vdr versus
Junction Temperature Tj
0
Tj = 25 °C
350
Tj = 150 °C
300
300
250
250
Vdr [mV]
Vdr [mV]
40
Tj = −40 °C
IQ = 50 mA
IQ = 100 mA
200
200
150
150
100
100
50
50
Data Sheet
30
400
IQ = 10 mA
0
20
VI [V]
Dropout Voltage Vdr versus
Output Current IQ
400
350
10
0
50
Tj [°C]
100
0
150
0
20
40
60
80
100
IQ [mA]
12
Rev. 1.2
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TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Block Description and Electrical Characteristics
Load Regulation ∆VQ,load versus
Output Current IQ
Line Regulation ∆VQ,load versus
Input Voltage VI
10
10
Tj = −40 °C
8
Tj = 25 °C
Tj = 150 °C
6
4
4
2
2
0
−2
−4
−4
−6
−6
−8
−8
VI = 6 V
0
20
Tj = 150 °C
0
−2
−10
Tj = 25 °C
6
dVline [mV]
dVload [mV]
Tj = −40 °C
8
40
60
80
−10
100
IQ = 1 mA
10
15
20
IQ [mA]
4
80
3.5
70
3
60
2.5
50
2
30
1
20
IQ = 50 mA
Tj = 25 °C
0.5
0
1
2
3
4
10
0
−2
10
5
VI [V]
Data Sheet
35
40
40
1.5
0
30
Power Supply Ripple Rejection PSRR versus
ripple frequency fr
PSRR [dB]
VQ [V]
Output Voltage VQ versus
Input Voltage VI
25
VI [V]
IQ = 10 mA
CQ = 1 μF
VI = 13.5 V
Vripple = 0.5 Vpp
Tj = 25 °C
−1
10
0
1
10
10
2
10
3
10
f [kHz]
13
Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Block Description and Electrical Characteristics
Output Capacitor Series Resistor ESR(CQ) versus
Output Current IQ
3
10
Unstable Region
2
10
ESR(CQ) [Ω]
1
10
Stable Region
0
10
−1
10
CQ = 1 μF
VI = 3...28 V
−2
10
0
20
40
60
80
100
IQ [mA]
Data Sheet
14
Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Block Description and Electrical Characteristics
5.3
Table 6
Current Consumption
Electrical Characteristics Current Consumption
Tj = -40°C to +150°C, VI = 13.5 V (unless otherwise specified).
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note or Test Condition
Number
Current Consumption
Iq = II
Iq,off
–
–
1
µA
VEN ≤ 0.4 V, Tj < 105°C
P_5.3.1
Current Consumption
Iq = II - IQ
Iq
–
5.5
8
µA
IQ = 50 µA, Tj = 25°C
P_5.3.2
Current Consumption
Iq = II - IQ
Iq
–
6.5
11
µA
IQ = 50 µA, Tj < 105°C
P_5.3.3
Current Consumption
Iq = II - IQ
Iq
–
7
12
µA
IQ = 50 µA, Tj < 125°C
P_5.3.4
Current Consumption
Iq = II - IQ
Iq
–
7
12
µA
IQ= 100 mA, Tj < 125°C
P_5.3.5
Data Sheet
15
Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Block Description and Electrical Characteristics
5.4
Typical Performance Characteristics Current Consumption
Current Consumption Iq versus
Output Current IQ
Current Consumption Iq versus
Input Voltage VI
16
40
Tj = −40 °C
Tj = −40 °C
Tj = 25 °C
14
Tj = 25 °C
35
Tj = 105 °C
Tj = 105 °C
Tj = 125 °C
12
25
Iq [μA]
10
Iq [μA]
Tj = 125 °C
30
8
20
6
15
4
10
2
5
VI = 13.5 V
0
0
20
40
60
80
IQ = 50 μA
0
100
5
10
15
IQ [mA]
16
4
14
3.5
12
3
10
2.5
8
1.5
4
1
0
Data Sheet
50
Tj [°C]
35
40
100
VI = 13.5 V
VEN ≤ 0.4 V
0.5
VI = 13.5 V
IQ = 50 μA
0
30
2
6
2
25
VI [V]
Current Consumption in OFF mode Iq,off versus
Junction Temperature Tj
Iq,off [μA]
Iq [μA]
Current Consumption Iq versus
Junction Temperature Tj
20
0
150
16
0
50
Tj [°C]
100
150
Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Block Description and Electrical Characteristics
5.5
Enable
The device can be switched on and off by the Enable feature. Connect a HIGH level as specified below (for
example the battery voltage) to pin EN to enable the device; connect a LOW level as specified below (for
example GND) to switch it off. The Enable function has a build-in hysteresis to avoid toggling between ON/OFF
state, if signals with slow slopes are appiled to the EN input.
Table 7
Electrical Characteristics Enable
Tj = -40°C to +150°C, VI = 13.5 V, all voltages with respect to ground (unless otherwise specified).
Typical values are given at Tj = 25°C, VI = 13.5 V.
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit Note or Test Condition
Number
Enable High Level Input
Voltage
VEN,H
2
–
–
V
VQ settled
P_5.5.1
Enable Low Level Input
Voltage
VEN,L
–
–
0.8
V
VQ ≤ 0.1 V
P_5.5.2
Enable High Level Input
Current
IEN,H
–
–
4
µA
VEN = 5 V
P_5.5.3
Enable Internal Pull-down
Resistor
REN
1.25
2
3.5
MΩ
–
P_5.5.4
Data Sheet
17
Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Block Description and Electrical Characteristics
5.6
Typical Performance Characteristics Enable
Enable Input Current IEN versus
Enable Input Voltage VEN
40
Tj = −40 °C
Tj = 25 °C
35
Tj = 150 °C
30
IEN [μA]
25
20
15
10
5
0
0
Data Sheet
10
20
VEN [V]
30
40
18
Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Application Information
6
Application Information
Note:
The following information is given as a hint for the implementation of the device only and shall not
be regarded as a description or warranty of a certain functionality, condition or quality of the device.
6.1
Application Diagram
II
Supply DI1
e.g. Ignition
Regulated
Q
I
IQ Output Voltage
EN
TLS810B1
CI1
CQ
10μF 100nF
1μF
DI2