OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
Features
•
Wide input voltage range from 3.0 V to 40 V
•
Adjustable output voltage between 1.5 V and 6 V
•
Output voltage precision ≤ ±2%
•
Output current capability up to 350 mA
•
Ultra low current consumption, typical 20 µA
•
Very low dropout voltage, typical 100 mV, at output currents below 100 mA
•
Stable with ceramic output capacitor of 1 µF
•
Enable
•
Overtemperature shutdown
•
Output current limitation
•
Wide temperature range
•
Green Product (RoHS compliant)
Potential applications
•
Automotive or other supply systems that are connected to the battery permanently
•
Automotive supply systems that need to operate in cranking condition
Product validation
Qualified for Automotive Applications. Product Validation according to AEC-Q100/101
Description
The OPTIREG™ Linear TLS835B2ELV is a linear voltage regulator with high performance, very low dropout
linear voltage and very low quiescent current.
With an input voltage range of 3 V to 40 V and very low quiescent current of only 20 µA, this regulator is
perfectly suitable for automotive or other supply systems permanently connected to the battery.
The new loop concept combines fast regulation and very high stability while requiring only one small ceramic
capacitor of 1 µF at the output. At output currents below 100 mA the device has a very low dropout voltage of
only 100 mV (for an output voltage of 5 V) and 120 mV (for an output voltage of 3.3 V). The operating range
starts at an input voltage of only 3 V (extended operating range). This makes the TLS835B2ELV suitable for
automotive systems that need to operate during cranking condition.
The device can be switched on and off by the enable feature.
Data Sheet
www.infineon.com/OPTIREG-Linear
1
Rev. 1.1
2018-09-17
OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
The output voltage of the TLS835B2ELV can be adjusted and set between 1.5 V and 6 V by connecting an
external voltage divider.
Internal protection features such as output current limitation and overtemperature shutdown, protect the
device from immediate damage caused by failures such as output shorted to GND, overcurrent or
overtemperature conditions.
External components
An input capacitor CI is recommended to compensate for line influences. The output capacitor CQ is necessary
for the stability of the regulating circuit. The TLS835B2ELV is designed to be stable with low ESR ceramic
capacitors.
Type
Package
Marking
TLS835B2ELV
PG-SSOP-14
835B2V
Data Sheet
2
Rev. 1.1
2018-09-17
OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
Table of contents
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Potential applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Product validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2
2.1
2.2
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin assignment TLS835B2ELV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin definitions and functions TLS835B2ELV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
3.1
3.2
3.3
General product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
4.1
4.2
4.3
4.4
4.5
4.6
Block description and electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical performance characteristics voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical performance characteristics current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical performance characteristics enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
10
13
16
17
18
19
5
5.1
5.2
5.2.1
5.2.2
5.2.3
5.3
5.4
5.5
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Selection of external components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Resistor divider R1, R2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reverse polarity protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Further application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20
20
20
20
20
21
21
21
22
6
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Data Sheet
3
7
7
8
9
Rev. 1.1
2018-09-17
OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
Block diagram
1
Block diagram
I
Q
Current
Limitation
EN
ADJ
Enable
Temperature
Shutdown
Bandgap
Reference
GND
Figure 1
Data Sheet
Block diagram TLS835B2ELV
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Rev. 1.1
2018-09-17
OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
Pin configuration
2
Pin configuration
2.1
Pin assignment TLS835B2ELV
I
n.c.
n.c.
EN
n.c.
n.c.
GND
14
13
12
11
10
9
8
1
2
3
4
5
6
7
Figure 2
Pin configuration TLS835B2ELV
2.2
Pin definitions and functions TLS835B2ELV
Q
n.c.
ADJ
n.c.
n.c.
n.c.
n.c.
Pin
Symbol
Function
1
I
Input
It is recommended to place a small ceramic capacitor to GND, close to the pins,
to compensate for line influences
2
n. c.
Not connected
Leave open or connect to GND
3
n. c.
Not connected
Leave open or connect to GND
4
EN
Enable (integrated pull-down resistor)
Enable the IC with high level input signal
Disable the IC with low level input signal
5
n. c.
Not connected
Leave open or connect to GND
6
n. c.
Not connected
Leave open or connect to GND
7
GND
Ground
8
n. c.
Not connected
Leave open or connect to GND
9
n. c.
Not connected
Leave open or connect to GND
10
n. c.
Not connected
Leave open or connect to GND
11
n. c.
Not connected
Leave open or connect to GND
Data Sheet
5
Rev. 1.1
2018-09-17
OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
Pin configuration
Pin
Symbol
Function
12
ADJ
Output adjustment
Connect an external voltage divider to set the output voltage
13
n. c.
Not connected
Leave open or connect to GND
14
Q
Output voltage
Connect output capacitor CQ to GND close to the pin, respecting the values
specified for its capacitance and ESR in “Functional range” on Page 8
Pad
–
Exposed pad
Connect to heatsink area;
Connect to GND
Data Sheet
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Rev. 1.1
2018-09-17
OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
General product characteristics
3
General product characteristics
3.1
Absolute maximum ratings
Table 1
Absolute maximum ratings1)
Tj = -40°C to 150°C; all voltages with respect to ground (unless otherwise specified)
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit Note or
Number
Test Condition
VI, VEN
-0.3
–
45
V
–
P_4.1.1
VQ
-0.3
–
7
V
–
P_4.1.2
VADJ
-0.3
–
7
V
–
P_4.1.3
Junction temperature
Tj
-40
–
150
°C
–
P_4.1.5
Storage temperature
Tstg
-55
–
150
°C
–
P_4.1.6
ESD susceptibility to GND
VESD
-2
–
2
kV
2)
HBM
ESD susceptibility to GND
VESD
-750
–
750
V
3)
CDM at all pins P_4.1.8
Input I, enable EN
Voltage
Output Q
Voltage
Adjust ADJ
voltage
Temperatures
ESD absorption
P_4.1.7
1) Not subject to production test, specified by design.
2) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF)
3) ESD susceptibility, Charged Device Model “CDM” according JEDEC JESD22-C101
Notes
1. Exceeding the absolute max ratings may cause permanent damage to the device and affects the device’s
reliability.
2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as operation outside the normal operating range. Protection
functions are not designed for continuous repetitive operation.
Data Sheet
7
Rev. 1.1
2018-09-17
OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
General product characteristics
3.2
Functional range
Table 2
Functional range
Tj = -40°C to 150°C; all voltages with respect to ground (unless otherwise specified)
Parameter
Symbol
Values
Max.
Unit Note or
Number
Test Condition
VQ,nom + Vdr –
40
V
1)
–
P_4.2.1
Extended input voltage range VI,ext
3.0
–
40
V
2)
–
P_4.2.2
Enable voltage range
0
–
40
V
–
Min.
Input voltage range
VI
VEN
Typ.
P_4.2.3
1
–
–
µF
3)4)
Equivalent series resistance of ESR(CQ)
output capacitor
–
–
40
Ω
3)
Junction temperature
-40
–
150
°C
–
Capacitance of output
capacitor for stability
1)
2)
3)
4)
CQ
Tj
–
–
P_4.2.4
P_4.2.5
P_4.2.6
Output current is limited internally and depends on the input voltage, see electrical characteristics for more details.
If VI,ext,min ≤ VI ≤ VQ,nom + Vdr, then VQ = VI - Vdr. If VI < VI,ext,min, then VQ can drop to 0 V.
Not subject to production test, specified by design.
The minimum output capacitance requirement is applicable for a worst case capacitance tolerance of 30%
Note:
Data Sheet
Within the functional or operating range, the IC operates as described in the circuit description. The
electrical characteristics are specified within the conditions given in the electrical characteristics
table.
8
Rev. 1.1
2018-09-17
OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
General product characteristics
3.3
Thermal resistance
Note:
This thermal data was generated in accordance with JEDEC JESD51 standards. For more
information, go to www.jedec.org.
Table 3
Thermal resistance of TLS835B2ELV in PG-SSOP-14 package
Parameter
Junction to case
Junction to ambient
Symbol
RthJC
RthJA
Values
Min.
Typ.
Max.
–
10
–
–
41
–
Unit
Note or
Test Condition
Number
K/W
1)
P_4.3.1
K/W
1)2)
2s2p board
P_4.3.2
1)3)
–
Junction to ambient
RthJA
–
125
–
K/W
1s0p board,
footprint only
P_4.3.3
Junction to ambient
RthJA
–
59
–
K/W
1)3)
1s0p board,
300 mm2 heatsink
area on PCB
P_4.3.4
Junction to ambient
RthJA
–
51
–
K/W
1)3)
P_4.3.5
1s0p board,
600 mm2 heatsink
area on PCB
1) Not subject to production test, specified by design
2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board. The product
(chip + package) was simulated on a 76.2 × 114.3 × 1.5 mm³ board with 2 inner copper layers (2 × 70 µm Cu, 2 × 35 µm
Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
3) Specified RthJA value is according to JEDEC JESD 51-3 at natural convection on FR4 1s0p board. The product
(chip + package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 × 70 µm Cu).
Data Sheet
9
Rev. 1.1
2018-09-17
OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
Block description and electrical characteristics
4
Block description and electrical characteristics
4.1
Voltage regulation
The output voltage VQ is divided by a resistor network. This fractional voltage is compared to an internal
voltage reference and the pass transistor is driven accordingly.
The control loop stability depends on the following factors:
•
output capacitor CQ
•
load current
•
chip temperature
•
internal circuit design
Output capacitor
To ensure stable operation, the capacitance of the output capacitor and its equivalent series resistor (ESR)
requirements as specified in “Functional range” on Page 8 must be maintained. The output capacitor must
be sized according to the requirements of the application to be able to buffer load steps.
Input capacitors, reverse polarity protection diode
An input capacitor CI is recommended to compensate for line influences.
In order to block influences such as pulses and high frequency distortion at the input, an additional reverse
polarity protection diode and a combination of several capacitors for filtering should be used. Connect the
capacitors close to the component’s terminals.
Smooth ramp-up
In order to prevent overshoots during startup, a smooth ramp-up function is implemented. This ensures
almost no output voltage overshoots during startup, mostly independent from load and output capacitance.
Output current limitation
If the load current exceeds the specified limit, due to a short-circuit for example, then the output current is
limited and the output voltage decreases.
Overtemperature shutdown
The overtemperature shutdown circuit prevents the IC from immediate destruction in case of a fault condition
(for example a permanent short-circuit at the output) by switching off the power stage. After the IC has cooled
down, the regulator restarts. This leads to an oscillatory behavior of the output voltage until the fault is
removed. However, any junction temperature above 150°C is outside the maximum ratings and therefore
significantly reduces the lifetime of the IC.
Data Sheet
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Rev. 1.1
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OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
Block description and electrical characteristics
II
Supply
I
Q
Regulated
Output Voltage
IQ
Current
Limitation
R1
EN
CQ
ADJ
CI1
Enable
CI2
VI
VQ
Bandgap
Reference
Temperature
Shutdown
R2
RLOAD
ESR
GND
Figure 3
Voltage regulation
V
VQ,nom
VI,ext,min
Figure 4
Data Sheet
VI
Vdr
VQ
t
Output voltage vs. input voltage
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Rev. 1.1
2018-09-17
OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
Block description and electrical characteristics
Table 4
Electrical characteristics voltage regulator
Tj = -40°C to 150°C, VI = 13.5 V, all voltages with respect to ground (unless otherwise specified).
Typical values are given at Tj = 25 °C, VI = 13.5 V.
Parameter
Symbol
Values
Unit
Note or Test Condition
Number
Min.
Typ.
Max.
ΔVQ
-2
–
2
%
0.05 mA ≤ IQ ≤ 350 mA
3 V ≤ VI ≤ 28 V,
VI ≥ VQ,nom + Vdr,
R2 ≤ 250 kΩ
P_5.1.33
Output voltage accuracy1)
ΔVQ
-2
–
2
%
0.05 mA ≤ IQ ≤ 175 mA
3 V ≤ VI ≤ 40 V,
VI ≥ VQ,nom + Vdr,
R2 ≤ 250 kΩ
P_5.1.34
Reference voltage
Vref
1.47
1.5
1.53
V
–
P_5.1.36
Output voltage adjustable
range
VQ,Range
1.5
–
6
V
–
P_5.1.37
Dropout voltage
Vdr = VI - VQ
Vdr
–
100
200
mV
2)
IQ = 100 mA, VQ,nom = 6 V
P_5.1.43
Dropout voltage
Vdr = VI - VQ
Vdr
–
250
500
mV
2)
IQ = 250 mA, VQ,nom = 6 V
P_5.1.41
Power supply ripple
rejection3)
PSRR
–
65
–
dB
VQ = 1.5 V,
fripple = 100 Hz,
Vripple = 0.5 Vp-p,
IQ = 10 mA
P_5.1.44
Output current limitation
IQ,max
351
500
780
mA
0 V < VQ < VQ,nom - 0.1 V
P_5.1.47
Load regulation
steady-state
ΔVQ,load
-15
-5
–
mV
IQ = 0.05 mA to 350 mA
VI = 7 V
P_5.1.52
Line regulation
steady-state
ΔVQ,line
–
1
10
mV
VI = 8 V to 32 V
IQ = 5 mA
P_5.1.53
Overtemperature shutdown Tj,sd
threshold
151
175
200
°C
3)
P_5.1.55
Overtemperature shutdown Tj,sdh
threshold hysteresis
–
15
–
K
3)
P_5.1.56
1)
Output voltage accuracy
Tj increasing
Tj decreasing
1) Referring to the device tolerance only, the tolerance of the resistor divider can cause additional deviation. Parameter
is tested with the ADJ pin directly connected to the output pin Q.
2) Measured when the output voltage VQ has dropped by 100 mV while input voltage was gradually decreased.
3) Not subject to production test, specified by design
Data Sheet
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Rev. 1.1
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OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
Block description and electrical characteristics
4.2
Typical performance characteristics voltage regulator
Output voltage VQ versus
junction temperature Tj
Output voltage VQ versus
junction temperature Tj
1.6
6.2
1.58
6.15
1.56
1.54
6.1
VQ [V]
VQ [V]
1.52
1.5
6.05
1.48
6
1.46
VI = 13.5 V
IQ = 100 mA
VQ,nom = 1.5 V
1.44
VI = 13.5 V
IQ = 100 mA
VQ,nom = 6 V
5.95
1.42
1.4
−40
0
50
Tj [°C]
100
5.9
−40
150
Output voltage VQ versus
input voltage VI
0
50
Tj [°C]
100
150
Output voltage VQ versus
input voltage VI
3
7
Tj = −40 °C
Tj = −40 °C
Tj = 25 °C
Tj = 25 °C
6
Tj = 150 °C
2.5
Tj = 150 °C
5
2
VQ [V]
VQ [V]
4
1.5
3
IQ = 100 mA
VQ,nom = 1.5 V
1
2
0.5
0
IQ = 100 mA
VQ,nom = 6 V
1
0
1
2
3
4
5
6
0
7
VI [V]
Data Sheet
0
2
4
6
8
10
VI [V]
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Rev. 1.1
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OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
Block description and electrical characteristics
Dropout voltage Vdr versus
junction temperature Tj
Dropout voltage Vdr versus
output current IQ
600
600
Tj = −40 °C
IQ = 100 mA
Tj = 25 °C
IQ = 250 mA
500
VQ,nom = 6 V
300
300
200
200
100
100
0
VQ,nom = 6 V
400
Vdr [mV]
400
Vdr [mV]
Tj = 150 °C
500
0
50
Tj [°C]
100
0
150
Power supply ripple rejection PSRR versus
ripple frequency f
0
50
100
150
IQ [mA]
200
250
Maximum output current IQ versus
input voltage VI
100
700
90
600
80
500
70
IQmax [mA]
PSRR [dB]
60
50
40
30
20
10
IQ = 10 mA
CQ = 1 μF
VI = 13.5 V
Vripple = 0.5 Vpp
VQ,nom = 1.5 V
Tj = 25 °C
400
300
200
Tj = −40 °C
100
Tj = 25 °C
VQ,forced = 0 V
0
−2
10
Data Sheet
−1
10
0
10
1
10
2
10
f [Hz]
3
10
4
10
5
10
0
6
10
14
0
10
20
VI [V]
Tj = 150 °C
30
40
Rev. 1.1
2018-09-17
OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
Block description and electrical characteristics
Load regulation ΔVQ,load versus
output current change IQ
Line regulation ΔVQ,line versus
input voltage VI
10
Tj = −40 °C
2
Tj = 25 °C
Tj = 150 °C
Tj = −40 °C
VI = 7 V
CQ = 1 μF
8
IQ = 5 mA
Tj = 25 °C
Tj = 150 °C
6
0
−2
ΔVQ,line [mV]
ΔVQ,load [mV]
4
−4
2
0
−2
−4
−6
−6
−8
−8
0
50
100
150
200
IQ [mA]
250
300
−10
350
10
15
20
25
VI [V]
30
35
40
Equivalent series resistance of output capacitor
ESR(CQ) versus
output current IQ
3
10
Unstable Region
2
ESR(CQ) [Ω]
10
1
10
Stable Region
0
10
CQ = 1 μF
−40°C ≤ T ≤ 150°C
−1
10
0
Data Sheet
50
100
150
200
IQ [mA]
250
300
350
15
Rev. 1.1
2018-09-17
OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
Block description and electrical characteristics
4.3
Table 5
Current consumption
Electrical characteristics current consumption
Tj = -40°C to 150°C, VI = 13.5 V (unless otherwise specified)
Typical values are given at Tj = 25°C
Parameter
Symbol
Values
Unit Note or Test Condition
Number
Min. Typ. Max.
Current consumption
Iq = II
Iq,off
–
–
1
µA
VEN = 0 V; Tj < 105°C
P_5.3.1
Current consumption
Iq = II
Iq,off
–
–
2
µA
VEN = 0.4 V; Tj < 125°C
P_5.3.3
Current consumption
Iq = II - IQ
Iq
–
17
25
µA
IQ = 0.05 mATj
Tj = 25°C
P_5.3.4
Current consumption
Iq = II - IQ
Iq
–
20
30
µA
IQ = 0.05 mA
Tj < 125°C
P_5.3.5
Current consumption
Iq = II - IQ
Iq
–
22
33
µA
1)
P_5.3.6
IQ = 350 mA
Tj < 125°C
1) Not subject to production test, specified by design
Data Sheet
16
Rev. 1.1
2018-09-17
OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
Block description and electrical characteristics
4.4
Typical performance characteristics current consumption
Current consumption Iq versus
output current IQ
Current consumption Iq versus
input voltage VI
30
60
Tj = −40 °C
50
20
40
Iq [μA]
Iq [μA]
Tj = 25 °C
25
15
10
Tj = 150 °C
30
20
Tj = −40 °C
5
10
Tj = 25 °C
VI = 13.5 V
Tj = 125 °C
0
0
50
100
150
200
IQ [mA]
250
300
0
350
10
15
20
25
VI [V]
30
35
40
Current consumption Iq versus
junction temperature Tj
40
35
30
Iq [μA]
25
20
15
10
5
VI = 13.5 V
IQ = 50 μA
0
−40
Data Sheet
0
50
Tj [°C]
100
150
17
Rev. 1.1
2018-09-17
OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
Block description and electrical characteristics
4.5
Enable
The TLS835B2ELV can be switched on and off by the enable feature. Applying a “high” level as specified below
with VEN ≥ 2 V to the EN pin enables the device. Applying a “low” level as specified below withVEN ≤ 0.8 V shuts
down the device. The enable feature has a built-in hysteresis to avoid toggling between the ON/OFF state,
when a signal with slow slope is applied to the EN pin.
Table 6
Electrical characteristics enable
Tj = -40°C to 150°C, VI = 13.5 V, all voltages with respect to ground (unless otherwise specified)
Typical values are given at Tj = 25°C
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note or
Test Condition
Number
Enable “high” input voltage
VEN,H
2
–
–
V
–
P_5.5.1
Enable “low” input voltage
VEN,L
–
–
0.8
V
–
P_5.5.2
Enable threshold hysteresis
VEN,Hy
90
–
–
mV
–
P_5.5.3
Enable “high” input current
IEN,H
–
–
1
µA
VEN = 5 V
P_5.5.4
Enable “high” input current
IEN,H
–
–
6
µA
VEN ≤ 18 V
P_5.5.5
Enable internal pull-down
resistor
REN
2.8
10
20
MΩ
–
P_5.5.6
Data Sheet
18
Rev. 1.1
2018-09-17
OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
Block description and electrical characteristics
4.6
Typical performance characteristics enable
Output voltage VQ versus
time t (EN switched on)
Output voltage VQ versus
time t (EN switched on)
7
9
VQ for Tj =−40 °C
VQ for Tj =−40 °C
VQ for Tj = 25 °C
6
VQ for Tj = 25 °C
8
VQ for Tj = 150 °C
VQ for Tj = 150 °C
7
VEN
VEN
5
6
4
V [V]
V [V]
5
4
3
3
2
1
0
2
VI = 13.5 V
IQ = 100 mA
VQ,nom = 1.5 V
0
VI = 13.5 V
IQ = 100 mA
VQ,nom = 6 V
1
0.5
1
0
1.5
t [ms]
0
0.5
1
t [ms]
1.5
Enable input current IEN versus
enable input voltage VEN
20
Tj =−40 °C
18
Tj = 25 °C
Tj = 150 °C
16
14
IEN [μA]
12
10
8
6
4
2
0
0
Data Sheet
10
20
VEN [V]
30
40
19
Rev. 1.1
2018-09-17
OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
Application information
5
Application information
5.1
Application diagram
Note:
The following information is given as a hint for the implementation of the device only and shall not
be regarded as a description or warranty of a certain functionality, condition or quality of the device.
II
Supply
I
Q
DI1
Current
Limitation
Regulated
Output Voltage
IQ
R1
EN
CQ
ADJ
DI2
< 45V
CI1
10 μF
1 μF
Enable
CI2
VI
100 nF
Bandgap
Reference
Temperature
Shutdown
VQ
R2
RLOAD
ESR
GND
e.g. Ignition
Figure 5
Application diagram
Note:
This is a very simplified example of an application circuit. The function must be verified in the real
application.
5.2
Selection of external components
5.2.1
Input pin
Figure 5 shows an example of the input circuitry for a linear voltage regulator. A ceramic capacitor at the
input, in the range of 100 nF to 470 nF, is recommended to filter out the high frequency disturbances imposed
by the line, for example ISO pulses 3a/b. This capacitor must be placed very close to the input pin of the linear
voltage regulator on the PCB.
An aluminum electrolytic capacitor in the range of 10 µF to 470 µF is recommended as an input buffer to
smooth out high energy pulses, such as ISO pulses 2a. This capacitor must be placed close to the input pin of
the linear voltage regulator.
An overvoltage suppressor diode can be used to further suppress any high voltage beyond the maximum
rating of the linear voltage regulator and to protect the device from damage due to overvoltage.
The external components at the input pin are optional, but they are recommended to deal with possible
external disturbances.
5.2.2
Output pin
An output capacitor is mandatory for the stability of linear voltage regulators. Furthermore it serves as an
energy buffer during load jumps, to compensate and maintain a constant output voltage potential. It must be
dimensioned according to the specific requirements of the application. The requirements for the output
capacitor are given in “Functional range” on Page 8.
Data Sheet
20
Rev. 1.1
2018-09-17
OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
Application information
TLS835B2ELV is designed to also be stable with low ESR capacitors. According to the automotive
requirements, ceramic capacitors with X5R or X7R dielectrics are recommended.
The output capacitor should be placed as close as possible to the voltage regulator’s output pin and GND pin
and on the same side of the PCB as the regulator itself.
In case of input voltage or load current transients, the capacitance should be dimensioned accordingly. The
configuration has to be verified in the real application to ensure that the output stability requirements are
fulfilled.
5.2.3
Resistor divider R1, R2
The resistor divider can be calculated according to Equation (5.1):
R1
VQ
=
−1
R2
VADJ
(5.1)
with
•
VQ: output voltage
•
VADJ: Vref, reference voltage
5.3
Thermal considerations
From the known input voltage, the output voltage and the load profile of the application, the total power
dissipation can be calculated as follows:
PD = (VI − VQ )IQ + VI Iq
(5.2)
with
•
PD: continuous power dissipation
•
VI: input voltage
•
VQ: output voltage
•
IQ: output current
•
Iq: quiescent current
The maximum acceptable thermal resistance RthJA is given by:
RthJA =
Tj,max − Ta
PD
(5.3)
with
•
Tj,max: maximum allowed junction temperature
•
Ta: ambient temperature
Based on the above calculation the proper PCB type and the necessary heat sink area can be determined by
referencing the specification for “Thermal resistance” on Page 9.
5.4
Reverse polarity protection
TLS835B2ELV is not protected against reverse polarity faults and must be protected by external components
against negative supply voltage. An external reverse polarity diode is necessary. The absolute maximum
ratings of the device as specified in “Absolute maximum ratings” on Page 7 must be maintained.
Data Sheet
21
Rev. 1.1
2018-09-17
OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
Application information
5.5
Further application information
For further information you may contact https://www.infineon.com/
Data Sheet
22
Rev. 1.1
2018-09-17
OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
Package information
6
Package information
0.15 M C A-B D 14x
0.64 ±0.25
1
8
1
7
0.2
M
D 8x
Bottom View
3 ±0.2
A
14
6 ±0.2
D
Exposed
Diepad
B
0.1 C A-B 2x
14
7
8
2.65 ±0.2
0.25 ±0.05 2)
0.08 C
8˚ MAX.
C
0.65
0.1 C D
0.19 +0.06
1.7 MAX.
Stand Off
(1.45)
0 ... 0.1
0.35 x 45˚
3.9 ±0.11)
4.9 ±0.11)
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Does not include dambar protrusion
Figure 6
PG-SSOP-141)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant
with government regulations the device is available as a green product. Green products are RoHS-Compliant
(i.e. Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
Further information on packages
https://www.infineon.com/packages
1) Dimensions in mm
Data Sheet
23
Rev. 1.1
2018-09-17
OPTIREG™ Linear TLS835B2ELV
Low Dropout Linear Voltage Regulator
Revision history
7
Revision history
Revision Date
Changes
1.1
2018-09-17
Editorial changes
Updated T to Tj in graph of “Equivalent series resistance of output capacitor
ESR(CQ) versus output current IQ”
Added footnote to overtemperature shutdown specification
Added VQ and removed VI in the test condition of the dropout voltage in electrical
characteristics
1.0
2018-03-02
Initial Version
Data Sheet
24
Rev. 1.1
2018-09-17
Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
Edition 2018-09-17
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2018 Infineon Technologies AG.
All Rights Reserved.
Do you have a question about any
aspect of this document?
Email: erratum@infineon.com
Document reference
Z8F61183983
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hereby disclaims any and all warranties and liabilities
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