TLS850B0TEV50ATMA1

TLS850B0TEV50 Low dropout li near voltage regulator 1 Overview Features • Wide input voltage range from 3.0 V to 40 V • Fixed output voltage 5 V • Output voltage accuracy ≤ ±2 % • Output current capability up to 500 mA • Ultra low current consumption, typical 20 µA • Very low dropout voltage, typical 100 mV at 100 mA • Stable with ceramic output capacitor of 1 µF • Enable • Overtemperature shutdown • Output current limitation • Wide temperature range • Green Product (RoHS compliant) Potential applications • Automotive or other supply systems that are connected to the battery permanently • Automotive supply systems that need to operate in cranking condition Product validation Qualified for Automotive Applications. Product Validation according to AEC-Q100/101 Description The TLS850B0TEV50 is a high performance, very low dropout linear voltage regulator for 5 V supply in a PGTO252-5 package. The input voltage range of 3 V to 40 V and a very low quiescent current of 20 µA make it the perfect match for automotive or other supply systems connected to the battery permanently. The new loop concept combines fast regulation and very high stability. Below an output current of 100 mA the typical dropout voltage is below 100 mV. The operating range starts at an input voltage of only 3 V (extended Data Sheet www.infineon.com/power 1 Rev. 1.00 2017-09-26 TLS850B0TEV50 Low dropout linear voltage regulator Overview operating range). This makes the TLS850B0TEV50 suitable for automotive systems that need to operate during cranking condition. The device can be switched on and off by the Enable feature. Internal protection features such as output current limitation and overtemperature shutdown protect the device from immediate damage due to failures such as output shorted to GND, overcurrent and overtemperature. Choosing external components An input capacitor CI is recommended to compensate line influences. The output capacitor CQ is necessary for the stability of the regulating circuit. TLS850B0TEV50 is designed to operate stable with low ESR ceramic capacitors. Type Package Marking TLS850B0TEV50 PG-TO252-5 850B0V50 Data Sheet 2 Rev. 1.00 2017-09-26 TLS850B0TEV50 Low dropout linear voltage regulator Table of contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Potential applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Product validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Choosing external components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 3.1 3.2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin assignment TLS850B0TEV50 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin definitions and functions TLS850B0TEV50 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 4.1 4.2 4.3 General product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5.1 5.2 5.3 5.4 5.5 5.6 Block description and electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Voltage regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Typical performance characteristics voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Typical performance characteristics current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Typical performance characteristics enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6 6.1 6.2 6.2.1 6.2.2 6.3 6.4 6.5 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Selection of external components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reverse polarity protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Further application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Data Sheet 3 6 6 7 8 19 19 19 19 19 20 20 20 Rev. 1.00 2017-09-26 TLS850B0TEV50 Low dropout linear voltage regulator Block diagram 2 Block diagram I Q Current Limitation EN Enable Bandgap Reference Temperature Shutdown GND Figure 1 Data Sheet Block diagram TLS850B0TEV50 4 Rev. 1.00 2017-09-26 TLS850B0TEV50 Low dropout linear voltage regulator Pin configuration 3 Pin configuration 3.1 Pin assignment TLS850B0TEV50 GND 1 5 Q n.c. EN I Figure 2 Pin configuration 3.2 Pin definitions and functions TLS850B0TEV50 Pin Symbol Function 1 I Input It is recommended to place a small ceramic capacitor (for example 100 nF) to GND, close to the pins, in order to compensate line influences. 2 EN Enable (integrated pull-down resistor) Enable the IC with “high” level input signal; Disable the IC with “low” level input signal; 3 GND Ground 4 n.c. Not connected Leave open or connect to GND 5 Q Output Connect output capacitor CQ to GND close to the pin, respecting the values specified for its capacitance and ESR in “Functional range” on Page 7. Heat Slug GND Data Sheet Heat Slug Connect to GND Connect to heatsink area 5 Rev. 1.00 2017-09-26 TLS850B0TEV50 Low dropout linear voltage regulator General product characteristics 4 General product characteristics 4.1 Absolute maximum ratings Table 1 Absolute maximum ratings1) Tj = -40°C to +150°C; all voltages with respect to ground (unless otherwise specified) Parameter Symbol Values Min. Typ. Max. Unit Note or Number Test Condition VI, VEN -0.3 – 45 V – P_4.1.1 VQ -0.3 – 7 V – P_4.1.2 Junction temperature Tj -40 – 150 °C – P_4.1.3 Storage temperature Tstg -55 – 150 °C – P_4.1.4 VESD -2 – 2 kV 2) HBM P_4.1.5 V 3) CDM P_4.1.6 V 3) CDM P_4.1.7 Input I, Enable EN Voltage Output Q Voltage Temperatures ESD absorption ESD susceptibility to GND ESD susceptibility to GND ESD susceptibility of Corner Pins to GND VESD VESD1,7 -500 -750 – – 500 750 1) Not subject to production test, specified by design. 2) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF) 3) ESD susceptibility, Charged Device Model (CDM) according to JEDEC JESD22-C101 Notes 1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. Integrated protection functions are designed to prevent device destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. Data Sheet 6 Rev. 1.00 2017-09-26 TLS850B0TEV50 Low dropout linear voltage regulator General product characteristics 4.2 Functional range Table 2 Functional range Tj = -40°C to +150°C; all voltages with respect to ground (unless otherwise specified) Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number Input voltage range VI VQ,nom + Vdr – 40 V 1) – P_4.2.1 Extended input voltage range VI,ext 3.0 – 40 V 2) – P_4.2.2 Enable voltage range VEN 0 – 40 V – P_4.2.3 Output capacitor’s requirements for stability CQ 1 – – µF 3)4) ESR ESR(CQ) – – 50 Ω 3) – P_4.2.5 ESR ESR(CQ) – – 100 Ω 3) VIN < 25 V P_4.2.5 Junction temperature Tj -40 – 150 °C – 1) 2) 3) 4) – P_4.2.4 P_4.2.6 Output current is limited internally and depends on the input voltage, see Electrical Characteristics for more details. If VI,ext,min ≤ VI ≤ VQ,nom + Vdr, then VQ = VI - Vdr. If VI < VI,ext,min, then VQ can drop to 0 V. Not subject to production test, specified by design. The minimum output capacitance requirement is applicable for a worst case capacitance tolerance of 30% Note: Data Sheet Within the functional or operating range, the device operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the Electrical Characteristics table. 7 Rev. 1.00 2017-09-26 TLS850B0TEV50 Low dropout linear voltage regulator General product characteristics 4.3 Thermal resistance Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to www.jedec.org. Table 3 Thermal ResistancePG-TO252-5 Parameter Junction to case Junction to ambient Symbol RthJC RthJA Values Min. Typ. Max. – 3.1 – – 26 – Unit Note or Test Condition Number K/W 1) P_4.3.6 K/W 1)2) 2s2p board P_4.3.7 1)3) – Junction to ambient RthJA – 85 – K/W 1s0p board, footprint only P_4.3.8 Junction to ambient RthJA – 43 – K/W 1)3) 1s0p board, 300 mm2 heatsink area on PCB P_4.3.9 Junction to ambient RthJA – 36 – K/W 1)3) P_4.3.10 1s0p board, 600 mm2 heatsink area on PCB 1) Not subject to production test, specified by design 2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product (Chip + Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70 µm Cu, 2 x 35 µm Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer. 3) Specified RthJA value is according to JEDEC JESD 51-3 at natural convection on FR4 1s0p board; The Product (Chip + Package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 x 70 µm Cu). Data Sheet 8 Rev. 1.00 2017-09-26 TLS850B0TEV50 Low dropout linear voltage regulator Block description and electrical characteristics 5 Block description and electrical characteristics 5.1 Voltage regulation The output voltage VQ is divided by a resistor network. This fractional voltage is compared to an internal voltage reference and the pass transistor is driven accordingly. The control loop stability depends on the following factors: • output capacitor CQ • load current • chip temperature • internal circuit design To ensure stable operation, the output capacitor’s capacitance and its equivalent series resistor (ESR) requirements given in “Functional range” on Page 7 must be maintained. Because the output capacitor must buffer load steps, it must be sized according to the requirements of the application. An input capacitor CI is recommended to compensate line influences. In order to block influences such as pulses and HF distortion at the input, an additional reverse polarity protection diode and a combination of several capacitors for filtering should be used. Connect the capacitors close to the component’s terminals. In order to prevent overshoots during start-up, a slope control function is implemented. This significantly reduces output voltage overshoots during start-up, mostly independent from load. If the load current exceeds the specified limit, for example due to a short circuit, then the TLS850B0TEV50 limits the output current and the output voltage decreases. The overtemperature shutdown circuit prevents the TLS850B0TEV50 from immediate destruction in fault condition, for example due to a permanent short-circuit at the output, by switching off the power stage. After the chip has cooled down, the regulator restarts. This leads to an oscillatory behavior of the output voltage until the fault is removed. However, any junction temperature above 150°C is outside the maximum ratings and therefore significantly reduces the life time of the TLS850B0TEV50. Supply II I Q Regulated Output Voltage IQ Current Limitation EN CI C Enable VI Bandgap Reference Temperature Shutdown ESR VQ LOAD CQ GND Figure 3 Data Sheet Voltage regulation 9 Rev. 1.00 2017-09-26 TLS850B0TEV50 Low dropout linear voltage regulator Block description and electrical characteristics V VQ,nom VI,ext,min Figure 4 Data Sheet VI Vdr VQ t Output voltage vs. input voltage 10 Rev. 1.00 2017-09-26 TLS850B0TEV50 Low dropout linear voltage regulator Block description and electrical characteristics Table 4 Electrical characteristics voltage regulator 5 V version Tj = -40°C to +150°C, VI = 13.5 V, all voltages with respect to ground (unless otherwise specified) Typical values are given at Tj = 25°C Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number Output voltage accuracy VQ 4.9 5.0 5.1 V 0.05 mA < IQ < 500 mA 6.1 V < VI < 28 V P_5.1.1 Output voltage accuracy VQ 4.9 5.0 5.1 V 0.05 mA < IQ < 200 mA 5.5 V < VI < 40 V P_5.1.2 Output voltage startup slew rate dVQ/dt 3.0 35 85 V/ms VI > 18 V/ms CQ = 1 µF 0.5 V < VQ < 4.5 V Output current limitation IQ,max 501 750 1100 mA 0 V < VQ < VQ,nom - 0.1 V P_5.1.10 Load regulation steady-state ΔVQ,load -15 -5 – mV IQ = 0.05 mA to 500 mA VI = 6.5 V P_5.1.12 Line regulation steady-state ΔVQ,line – 1 10 mV VI = 8 V to 32 V IQ = 5 mA P_5.1.13 Dropout voltage Vdr = VI - VQ Vdr – 250 500 mV 1) IQ = 250 mA P_5.1.14 Dropout voltage Vdr = VI - VQ Vdr – 100 200 mV 1) IQ = 100 mA P_5.1.15 Power Supply Ripple Rejection PSRR – 60 – dB 2) fripple = 100 Hz Vripple = 0.5 Vpp P_5.1.16 Overtemperature shutdown threshold Tj,sd 151 – 200 °C 2) Tj increasing P_5.1.17 Overtemperature shutdown threshold hysteresis Tj,sdh – 15 – K 2) Tj decreasing P_5.1.18 P_5.1.9 1) Measured when the output voltage VQ has dropped 100 mV from the nominal value obtained at VI = 13.5 V 2) Not subject to production test, specified by design Data Sheet 11 Rev. 1.00 2017-09-26 TLS850B0TEV50 Low dropout linear voltage regulator Block description and electrical characteristics 5.2 Typical performance characteristics voltage regulator Output voltage VQ versus junction temperature Tj Dropout voltage Vdr versus output current IQ 700 Tj = −40 °C 5.08 Tj = 25 °C 600 Tj = 150 °C 5.06 500 5.04 Vdr [mV] VQ [V] 5.02 5 4.98 4.96 VI = 13.5 V IQ = 100 mA VQ,nom = 5 V 4.94 400 300 200 100 4.92 4.9 −40 0 50 Tj [°C] 100 0 150 Load regulation ΔVQ,load versus output current IQ 0 100 400 500 Line regulation ΔVQ,line versus input voltage VI 0.7 2 Tj = −40 °C Tj = −40 °C VIT= =6 25 V °C j CQ = 1 μF Tj = 150 °C 1.5 Tj = 25 °C 0.6 Tj = 150 °C 0.5 1 0.4 0.5 ΔVQ,line [mV] ΔVQ,load [mV] 200 300 IQ [mA] 0 IQ = 5 mA VQ,nom = 5 V 0.3 0.2 −0.5 0.1 −1 0 −0.1 −1.5 0 Data Sheet 100 200 300 IQ [mA] 400 −0.2 500 12 10 15 20 VI [V] 25 30 Rev. 1.00 2017-09-26 TLS850B0TEV50 Low dropout linear voltage regulator Block description and electrical characteristics Output voltage VQ versus input voltage VI Output capacitor ESR(CQ) versus output current IQ 3 6 10 IQ = 100 mA VI < 25 V VI < 40 V Unstable Region 5 2 10 ESR(CQ) [Ω] VQ [V] 4 3 2 Stable Region 0 10 Tj = −40 °C 1 Tj = 25 °C 0 10 20 VI [V] 30 CQ = 1 μF −40°C ≤ T ≤ 150°C −1 10 Tj = 150 °C 0 1 10 40 Power Supply Ripple Rejection PSRR versus ripple frequency f 0 100 200 300 IQ [mA] 400 500 Maximum output current IQ versus input voltage VI 100 900 Tj = 25 90 800 80 700 70 600 IQmax [mA] PSRR [dB] 60 50 500 400 40 300 30 20 10 IQ = 10 mA CQ = 1 μF VI = 13.5 V Vripple = 0.5 Vpp Tj = 25 °C VQ,nom = 5 V 0 −2 10 Data Sheet −1 10 0 10 200 Tj = −40 °C Tj = 25 °C 100 1 10 2 10 f [Hz] 3 10 4 10 5 10 0 6 10 13 Tj = 150 °C V =0V Q,forced 0 10 20 VI [V] 30 40 Rev. 1.00 2017-09-26 TLS850B0TEV50 Low dropout linear voltage regulator Block description and electrical characteristics 5.3 Table 5 Current consumption Electrical characteristics current consumption Tj = -40°C to +150°C, VI = 13.5 V (unless otherwise specified) Typical values are given at Tj = 25°C Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. Current consumption Iq = II Iq,off – – 1 µA VEN = 0 V; Tj < 105°C P_5.3.1 Current consumption Iq = II Iq,off – – 2 µA VEN = 0.4 V; Tj < 125°C P_5.3.3 Current consumption Iq = II - IQ Iq – 20 25 µA IQ = 0.05 mA Tj = 25°C P_5.3.4 Current consumption Iq = II - IQ Iq – 23 30 µA IQ = 0.05 mA Tj < 125°C P_5.3.5 Current consumption Iq = II - IQ Iq – 25 33 µA 1) P_5.3.6 IQ = 500 mA Tj < 125°C 1) Not subject to production test, specified by design Data Sheet 14 Rev. 1.00 2017-09-26 TLS850B0TEV50 Low dropout linear voltage regulator Block description and electrical characteristics 5.4 Typical performance characteristics current consumption Current consumption Iq versus output current IQ Current consumption Iq versus input voltage VI 25 100 90 20 IQ = 100 μA VQ=5 V 80 70 Tj = −40 °C Iq [μA] 60 Iq [μA] 15 10 50 Tj = 25 °C 40 Tj = 150 °C Tj = 85 °C 30 Tj = −40 °C 5 20 Tj = 25 °C Tj = 85 °C 10 Tj = 105 °C 0 0 100 200 300 IQ [mA] 400 0 500 Current consumption Iq versus junction temperature Tj 10 15 20 25 VI [V] 30 35 40 Current consumption Iq,off versus input voltage VI (disabled) 18 Tj = −40 °C 25 Tj = 25 °C 16 Tj = 85 °C 14 Tj = 105 °C Tj = 125 °C 20 Iq,off [μA] Iq [μA] 12 15 10 Tj = 150 °C 10 8 6 4 5 VI = 13.5 V IQ = 1 μA 0 −40 Data Sheet 0 50 Tj [°C] 2 0 100 15 0 10 20 VI [V] 30 40 Rev. 1.00 2017-09-26 TLS850B0TEV50 Low dropout linear voltage regulator Block description and electrical characteristics Current consumption Iq,off versus junction temperature Tj (disabled) 3 VI = 13.5 V VEN ≤ 0.4 V 2.5 Iq,off [μA] 2 1.5 1 0.5 0 −40 Data Sheet 0 50 Tj [°C] 100 16 Rev. 1.00 2017-09-26 TLS850B0TEV50 Low dropout linear voltage regulator Block description and electrical characteristics 5.5 Enable The TLS850B0TEV50 can be switched on and off by the enable feature. Applying a “high” level as specified below (for example battery voltage) to the EN pin enables the device. Applying a “low” level as specified below (for example GND) shuts down the device. If a signal with slow slope is applied to the EN pin, then the built in hysteresis of the enable feature avoids toggling between ON/OFF state. Table 6 Electrical characteristics enable Tj = -40°C to +150°C, VI = 13.5 V, all voltages with respect to ground (unless otherwise specified) Typical values are given at Tj = 25°C Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number “High” level input voltage VEN,H 2 – – V VQ settled P_5.5.1 “Low” level input voltage VEN,L – – 0.8 V VQ ≤ 0.1 V P_5.5.2 Enable threshold hysteresis VEN,Hy 90 – – mV – P_5.5.3 “High” level input current IEN,H – – 4 µA VEN = 5 V P_5.5.4 “High” level input current IEN,H – – 20 µA VEN ≤ 18 V P_5.5.5 Enable internal pull-down resistor REN 1.25 2 3.5 MΩ – P_5.5.6 Data Sheet 17 Rev. 1.00 2017-09-26 TLS850B0TEV50 Low dropout linear voltage regulator Block description and electrical characteristics 5.6 Typical performance characteristics enable Enable input current IEN versus Enable input voltage VEN Output voltage VQ versus time t (EN switched ON) 100 7 Tj =150 °C 90 VQ for Tj =150 °C Tj = 25 °C 80 VQ for Tj = 25 °C 6 Tj = −40 °C VQ for Tj = −40 °C VEN 5 70 4 V [V] IEN [μA] 60 50 3 40 30 2 20 1 10 0 0 Data Sheet 10 20 VEN [V] 30 0 40 18 0 0.5 1 t [ms] 1.5 2 Rev. 1.00 2017-09-26 TLS850B0TEV50 Low dropout linear voltage regulator Application information 6 Application information 6.1 Application diagram Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. Supply I Q D I1 Regulated Output Voltage Current Limitation DI2 C I2 C I1