TLT9255WLC
HS CAN Transceiver with Partial Networ king
1
Overview
Features
•
Fully compliant to ISO 11898-2 (2016)
•
Infineon automotive quality
•
AEC-Q100 Grade 0 (Ta: -40°C to +150°C) qualification for high temperature mission profiles
•
HS CAN standard data rates up to 1MBit/s
•
CAN FD data rates up to 5 MBit/s
•
Wide common mode range for electromagnetic immunity (EMI)
•
Very low electromagnetic emission (EME)
•
Excellent ESD robustness, ±10 kV according to IEC 61000-4-2
•
Independent supply concept on VCC and VBAT pins
•
Fail safe features
– TxD-timeout
– overtemperature shutdown
– overtemperature warning
•
Extended supply range on VCC and VIO supply
•
CAN short circuit proof to ground, battery and VCC
•
Overtemperature protection
•
Advanced bus biasing according to ISO 11898-2 (2016)
•
Bus Wake-up Pattern (WUP) function with optimized filter time (0.5 µs - 1.8 µs) for worldwide OEM usage
•
Wake-up pattern (WUP) detection in all low-power modes
•
Wake-up frame (WUF) detection according to ISO 11898-2 (2016)
•
Wake-up frame detection with CAN FD tolerant feature
•
Local wake-up input
•
SPI clock frequency up to 4 MHz
•
Green Product (RoHS compliant)
Potential applications
•
Car powertrain and transmission applications
•
HS CAN networks in automotive applications
Datasheet
www.infineon.com/automotive-transceiver
1
Rev. 1.0
2019-10-08
TLT9255WLC
HS CAN Transceiver with Partial Networking
Overview
•
HS CAN networks in industrial applications
Product validation
Qualified for automotive applications with higher temperature requirements as well as with extended lifetime
requirements. Product validation according to AEC-Q100.
Description
As an interface between the physical bus layer and the CAN protocol controller, the TLT9255W drives the
signals to the bus and protects the microcontroller from interference generated within the network. Based on
the high symmetry of the CANH and CANL signals, the TLT9255W provides a very low level of electromagnetic
emission within a wide frequency range, allowing the operation of the TLT9255W without a common mode
choke in automotive and industrial applications.
The TLT9255W is enclosed in an RoHS compliant PG-TSON-14 package and fulfills the requirements of the
ISO11898-2 (2016).
The TLT9255W is part of the Infineon standard HS CAN transceiver family and provides beside CAN partial
networking functions also a CAN FD capability up to 5 MBit/s in HS CAN networks. Configured as a partial
networking HS CAN transceiver the TLT9255W can drive and receive CAN FD messages. it can also be used to
block the payload of CAN FD messages. This CAN FD tolerant feature allows the usage of microcontrollers in
CAN FD networks, which are not CAN FD capable.
The SPI of TLT9255W controls the setup of the wake-up messages and the status message generated by the
internal state machine. Most of the functions, including wake-up functions, INH output control, mode control,
undervoltage control are configurable by the SPI. This allows a very flexible usage of the TLT9255W in different
applications.
The two non-low power modes (Normal-operating Mode and Receive-only Mode) and the two low power
modes (Sleep Mode and Stand-by Mode) provide minimum current consumption based on the required
functionality.
In Sleep Mode the TLT9255W can detect a wake-up pattern (WUP) on the HS CAN and then change the mode
of operation accordingly; even at a quiescent current below 26 µA over the full temperature range.
In Selective-wake Sub-mode the TLT9255W monitors the CAN messages on the HS CAN bus. If the TLT9255W
detects a matching wake-up frame, then it triggers a mode change. The TLT9255W monitors wake-up
identifiers up to 29 bit as well as up to 64 bit wide data. The internal protocol handler counts all bus errors. The
SPI indicates failures, error counter overflow and synchronization failures to the microcontroller.
The unique power-supply management allows the application to use the TLT9255W without the battery
supply VBAT connected. In this case the TLT9255W is supplied over the VCC pin. The VIO voltage reference
supports 3.3 V and 5 V supplied microcontrollers.
Based on Infineon Smart Power Technology (SPT), the TLT9255W provides excellent immunity together with
a very high electromagnetic immunity (EMI). The TLT9255W and the Infineon SPT are AEC qualified and
tailored to withstand the harsh conditions of the automotive environment.
Type
Package
Marking
TLT9255WLC
PG-TSON-14
T9255W
Datasheet
2
Rev. 1.0
2019-10-08
TLT9255WLC
HS CAN Transceiver with Partial Networking
Table of Contents
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
3.1
3.2
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pin Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4
4.1
4.2
4.3
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5
5.1
High Speed CAN Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
High Speed CAN Physical Layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6
6.1
6.2
6.3
6.4
6.4.1
6.4.2
6.4.3
6.5
6.6
6.7
6.7.1
6.7.2
6.7.3
6.8
6.8.1
6.8.2
Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Normal-operating Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Receive-only Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stand-by Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sleep Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sleep WUP Sub-Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Selective Wake Sub-Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Selective Sleep Sub-Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power On Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Automatic Bus Voltage Biasing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Wake-up event . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Wake-up pattern (WUP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Wake-up frame (WUF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Local Wake-up (LWU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RxD pin wake-up behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RxD permanent “low” . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RxD Toggle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
15
17
18
19
21
23
24
26
27
28
29
29
30
31
32
32
33
7
7.1
7.2
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
7.3
7.4
7.5
7.6
Fail Safe Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Short Circuit Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Undervoltage detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Undervoltage detection on VBAT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Short-term Undervoltage detection on VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Long-term undervoltage detection on VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Short-term Undervoltage detection on VIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Long-term Undervoltage detection on VIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Unconnected Logic Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TxD Time-out Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Overtemperature Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Delay Time for Mode Change . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
34
34
34
34
36
36
37
38
39
40
41
41
8
8.1
8.1.1
8.1.2
CAN Partial Networking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Wake-up frame evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Wake-up frame identifier evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DLC and data field evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
42
42
42
43
Datasheet
3
Rev. 1.0
2019-10-08
TLT9255WLC
HS CAN Transceiver with Partial Networking
8.2
8.3
8.4
8.5
8.6
8.6.1
8.6.2
8.6.3
8.6.4
8.6.5
8.6.6
Activation of Selective Wake . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Frame Error Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Selective Wake Configuration Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CAN Flexible Data Rate (CAN FD) Tolerant Feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Selective wake SPI flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SysErr Flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SYNC Flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CANTO Flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CANSIL Flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SWK_ACTIVE Flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CFG_VAL Flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
44
44
45
46
47
47
47
48
48
48
48
9
9.1
9.2
9.3
9.4
9.5
9.6
9.7
9.7.1
9.7.2
9.7.3
Serial Peripheral Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SPI command format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control and Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Status Information Field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SPI Failure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Invalid SPI Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CSN Timeout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SPI Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mode Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Selective Wake Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
49
50
51
52
52
52
52
53
54
58
65
10
10.1
10.2
10.2.1
10.2.2
10.2.3
10.3
10.4
10.4.1
10.4.2
10.4.3
10.5
10.5.1
10.5.2
10.6
10.6.1
10.6.2
10.6.3
10.7
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
General Timing Parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Supply Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Undervoltage Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
INH Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CAN Controller Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Transmitter and Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Dynamic Transceiver Parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Selective Wake Parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
General Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CAN FD Tolerance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Wake-Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
General Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
WUP detection Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Local Wake-Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
68
68
68
68
72
73
73
75
75
77
78
82
82
83
84
84
85
86
86
11
11.1
11.2
11.3
11.4
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD Robustness according to IEC 61000-4-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Application Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage Adaption to the Microcontroller Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
89
89
90
91
91
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HS CAN Transceiver with Partial Networking
12
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
13
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
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TLT9255WLC
HS CAN Transceiver with Partial Networking
Block Diagram
2
Block Diagram
VCC
3
VBAT
VIO
5
GND
2
10
7
Power Supply Interface
INH
Voltage
Monitor
VIO
14
Transmitter
6
Host
Interface
11
8
CANH
CANL
13
12
Receiver
Datasheet
MISO
MOSI
SCLK
Central State
Machine
VIO
Low Power
Receiver
Figure 1
CSN
Wake-Up
Logic
CAN
Controller
Interface
1
Local Wake
Receiver
9
4
TxD
RxD
WAKE
Block Diagram
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TLT9255WLC
HS CAN Transceiver with Partial Networking
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment
TxD
1
14
CSN
GND
2
13
CANH
VCC
3
12
CANL
RxD
4
11
MOSI
VIO
5
10
VBAT
MISO 6
9
WAKE
7
8
SCLK
PAD
INH
(Top-side x-ray view)
Figure 2
Pin configuration for PG-TSON-14
3.2
Pin Definitions
Table 1
Pin definitions and functions
Pin
Symbol
Function
1
TxD
Transmit Data Input;
integrated pull-up current source to VIO,
“low” to drive a dominant signal on CANH and CANL
2
GND
Ground.
3
VCC
Transmitter Supply Voltage;
100 nF decoupling capacitor to GND is recommended
4
RxD
Receive Data Output;
“low” while a dominant signal is on the HS CAN bus,
output voltage adapted to the voltage on the VIO level shift input
5
VIO
Level Shift Input;
reference voltage for the digital input and output pins,
100 nF decoupling capacitor to GND is recommended
6
MISO
SPI Serial Data Output;
tri-state while CSN is “high”
7
INH
Inhibit Output;
open drain output to control external circuitry
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TLT9255WLC
HS CAN Transceiver with Partial Networking
Pin Configuration
Table 1
Pin definitions and functions (cont’d)
Pin
Symbol
Function
8
SCLK
SPI Clock Input;
integrated pull-down current source to GND
9
WAKE
Wake-up Input;
local wake-up input, terminated against GND and VBAT,
wake-up input sensitive to signal changes in both directions
10
VBAT
Battery Supply Voltage;
100 nF decoupling capacitor to GND is recommended
11
MOSI
SPI Serial Data Input;
integrated pull-down current source to GND
12
CANL
Low-level HS CAN Bus Line
13
CANH
High-level HS CAN Bus Line
14
CSN
SPI Chip Select Not Input;
integrated pull-up current source to VIO
PAD
-
Connect to PCB heat sink area.
Do not connect to other potential than GND.
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TLT9255WLC
HS CAN Transceiver with Partial Networking
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Table 2
Absolute Maximum Ratings1)
All voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note or
Test Condition
Number
Voltages
Battery supply voltage
VBAT
-0.3
–
40
V
–
P_9.1.1
Transmitter supply voltage
VCC
-0.3
–
6.0
V
–
P_9.1.2
Digital voltage reference
VIO
-0.3
–
6.0
V
–
P_9.1.3
CANH DC voltage versus GND
VCANH
-40
–
40
V
–
P_9.1.4
CANL DC voltage versus GND
VCANL
-40
–
40
V
–
P_9.1.5
Differential voltage between
CANH and CANL
VCAN_DIFF
-40
–
40
V
–
P_9.1.6
Voltage at pin WAKE
VWAKE
-27
–
40
V
–
P_9.1.7
Voltage at pin INH
VINH
-0.3
–
VBAT +0 V
.3
–
P_9.1.8
Voltage at pin digital input
pins: CSN, SCLK, MOSI, TxD
VMax_In
-0.3
–
VIO +
0.3
V
–
P_9.1.9
Voltage at pin digital output
pins: MISO, RxD
VMax_Out
-0.3
–
VIO +
0.3
V
–
P_9.1.10
IINH_Max
-1.0
–
–
mA
–
P_9.1.11
Maximum output current on IOut_Max
digital output pins: MISO, RxD
-20
–
20
mA
–
P_9.1.12
Currents
Maximum output current on
INH
Temperatures
Junction Temperature
Tj
-40
–
160
°C
–
P_9.1.13
Storage Temperature
Tstg
-55
–
150
°C
–
P_9.1.14
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TLT9255WLC
HS CAN Transceiver with Partial Networking
General Product Characteristics
Table 2
Absolute Maximum Ratings1) (cont’d)
All voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Symbol
Values
Min.
Unit
Note or
Test Condition
Number
Typ.
Max.
ESD immunity at CANH, CANL, VESD_HBM_CAN -10
WAKE and VBAT versus to GND
–
10
kV
HBM2)
P_9.1.15
ESD immunity at all other pins VESD_HBM
-4
–
4
kV
HBM2)
P_9.1.16
ESD immunity at corner pins
VESD_CDM_CP
-750
–
750
V
CDM3)
P_9.1.17
ESD immunity at any pin
VESD_CDM_OP -500
–
500
V
CDM3)
P_9.1.18
ESD Resistivity
1) Not subject to production test, specified by design.
2) ESD susceptibility, Human Body Model “HBM” according to ANSI/ESDA/JEDEC JS001 (1.5k Ω, 100 pF.)
3) ESD susceptibility, Charged Device Model “CDM” according to EIA/JESD22-C101 or ESDA STM 5.3.1.
Notes
1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
Datasheet
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TLT9255WLC
HS CAN Transceiver with Partial Networking
General Product Characteristics
4.2
Functional Range
Table 3
Functional range
Parameter
Symbol
Values
Unit
Note or
Test Condition
Number
Min.
Typ.
Max.
Transceiver battery supply VBAT
voltage
5.5
–
40
V
–
P_9.2.1
Transmitter supply voltage VCC
4.75
–
5.25
V
–
P_9.2.2
Digital voltage reference
VIO
3.0
–
5.5
V
–
P_9.2.3
Tj
-40
–
150
°C
–
P_9.2.4
Supply Voltages
Thermal Parameters
Junction Temperature
Note: Within the functional or operating range, the IC operates as described in the circuit description. The
electrical characteristics are specified within the conditions given in the Electrical Characteristics table.
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TLT9255WLC
HS CAN Transceiver with Partial Networking
General Product Characteristics
4.3
Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information
please visit www.jedec.org.
Table 4
Thermal resistance1)
Parameter
Symbol
Values
Min.
Unit
Note or
Test Condition
Number
Typ.
Max.
51
–
K/W
2)
P_9.3.5
Thermal Resistance
Junction to ambient
RthJA_TSON14 –
Thermal Shutdown Junction Temperature
Thermal shut-down
temperature
TJSD
170
180
190
°C
–
P_9.3.3
Thermal shutdown
hysteresis
∆T
5
10
20
K
–
P_9.3.4
1) Not subject to production test, specified by design.
2) Specified RthJA value is according to Jedec JESD51-2,-7 at natural convection on FR4 2s2p board; The Product
(Chip + Package) was simulated on a 76.2 × 114.3 × 1.5 mm board with 2 inner copper layers (2 × 70 mm Cu, 2 × 35 mm
Cu).
Datasheet
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TLT9255WLC
HS CAN Transceiver with Partial Networking
High Speed CAN Functional Description
5
High Speed CAN Functional Description
High speed CAN (HS CAN) is a serial bus system that connects microcontrollers, sensors and actuators for realtime control applications. ISO 11898-2 (2016) describes the use of the Controller Area Network (CAN) within
road vehicles. According to the 7-layer OSI reference model the physical layer of a HS CAN bus system specifies
the data transmission from one CAN node to all other available CAN nodes within the network. The CAN
transceiver is part of the physical layer. The physical layer specification of a CAN bus system includes all
electrical specifications of a CAN network.
The TLT9255W supports:
•
standard bus wake-up functionality
•
CAN Partial Networking with selective wake-up functionality according to ISO 11898-2 (2016)
•
CAN Flexible data rate (CAN FD) transmission up to 5 MBit/s
5.1
High Speed CAN Physical Layer
VIO =
VCC =
TxD =
TxD
VIO
RxD =
CANH =
t
CANH
CANL
CANL =
VDiff =
VCC
Digital supply voltage
Transmitter supply voltage
Transmit data input from
the microcontroller
Receive data output to
the microcontroller
Bus level on the CANH
input/output
Bus level on the CANL
input/output
Differential voltage
between CANH and CANL
VDiff = VCANH – VCANL
t
VDiff
VCC
“dominant” receiver threshold
“recessive” receiver threshold
td(L)T
td(H)T
td(L)R
td(H)R
t
RxD
VIO
tLoop(H,L)
Figure 3
Datasheet
tLoop(L,H)
t
High speed CAN bus signals and logic signals
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TLT9255WLC
HS CAN Transceiver with Partial Networking
High Speed CAN Functional Description
The TLT9255W is a HS CAN transceiver operating as an interface between the CAN controller and the physical
bus medium. A HS CAN network is a two wire, differential network which allows data transmission rates up to
5 MBit/s. HS CAN networks have two signal states on the CAN bus (see Figure 3):
•
dominant
•
recessive
The CANH and CANL pins are the interface to the CAN bus and operate both as an input and as an output. The
RxD and TxD pins are the interface to the microcontroller. The TxD pin is the serial data input from the CAN
controller. The RxD pin is the serial data output to the CAN controller. The HS CAN transceiver TLT9255W
includes a receiver and a transmitter unit, allowing the transceiver to send data to the bus medium and
monitoring the data from the bus medium at the same time (see Figure 1). The TLT9255W converts the serial
data stream, which is available on the transmit data input TxD, to a differential output signal on the CAN bus,
provided by the CANH and CANL pins. The receiver stage of the TLT9255W monitors the data on the CAN bus
and converts it to a serial, single-ended signal on the RxD output pin. A “low” signal on the TxD pin creates a
dominant signal on the CAN bus, followed by a “low” signal on the RxD pin (see Figure 3). The feature of
broadcasting data to the CAN bus and listening to the data traffic on the CAN bus simultaneously is essential
to support the bit-to-bit arbitration within CAN networks.
ISO 11898-2 (2016) defines the voltage levels for HS CAN transceivers. Whether a data bit is dominant or
recessive depends on the voltage difference between the CANH and CANL pins:
VDiff = VCANH - VCANL
To transmit a dominant signal to the CAN bus the amplitude of the differential signal VDiff is ≥ 1.5 V. To receive
a recessive signal from the CAN bus the amplitude of the differential VDiff is ≤ 0.5 V.
Partially supplied High-Speed CAN networks have CAN bus nodes with different power supply conditions.
Some nodes are connected to the common power supply, while other nodes are disconnected from the power
supply and in power-down state. Regardless of whether the CAN bus subscriber is supplied or not, each
subscriber connected to the common bus media must not interfere with the communication. The TLT9255W
is designed to support Partially supplied networks. In power-down state, the receiver input resistors are
switched off and the transceiver input has a high resistance.
For permanently supplied ECUs, the TLT9255W provides low power modes. In these low power modes, the
current consumption of the TLT9255W is optimized to a minimum, while the TLT9255W can still recognize
wake-up patterns or wake-up frames on the CAN bus and signal the wake-up event to the external
microcontroller.
The voltage level on the digital input TxD and the digital output RxD is determined by the reference supply
level at the VIO pin. Depending on the voltage level at the VIO pin, the signal levels on the logic pins (CSN, SCLK,
MOSI, MISO, TxD and RxD) are compatible to microcontrollers having a 5 V or 3.3 V I/O supply. It is highly
recommended that the digital power supply of VIO of the transceiver is connected to the I/O power supply of
the microcontroller; this is the way it is intended to be used (see Figure 53).
Datasheet
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TLT9255WLC
HS CAN Transceiver with Partial Networking
Modes of Operation
6
Modes of Operation
The TLT9255W supports four different Modes of operation (see Figure 4):
•
Normal-operating Mode (Chapter 6.1)
•
Receive-only Mode (Chapter 6.2)
•
Stand-by Mode (Chapter 6.3)
•
Sleep Mode (Chapter 6.4)
SPI MC
command
Normal-operating
Mode
Receive-only Mode
SPI MC
command
SPI MC
command
SPI MC
command
SPI MC
command
Stand-by Mode
VBAT OR VCC is in the
functional range for at least
tPON
Wake-up detected
OR
SPI MC command
OR
ECNT > 31
Sleep Mode
VIO undervoltage
AND
tVIO_UV_T expired
AND
tSilence expired
Power on Reset
VCC < VCC_POD
AND
VBAT < VBAT_POD
VCC undervoltage
Any Mode
AND
SPI MC
command
Any Mode
tCC_UV_T expired
AND
tSilence expired
Any Mode
Any Mode
Figure 4
Mode of operation
Table 5
Types of Modes and Sub-Modes
Type of mode
Mode
Sub-Mode
Normal power mode
Normal-operating mode
–
Receive-only Mode
–
Datasheet
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TLT9255WLC
HS CAN Transceiver with Partial Networking
Modes of Operation
Table 5
Types of Modes and Sub-Modes (cont’d)
Type of mode
Mode
Sub-Mode
Low power mode
Stand-by Mode
–
Sleep Mode
Sleep WUP Sub-Mode
Selective Wake Sub-Mode
Selective Sleep Sub-Mode
Datasheet
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TLT9255WLC
HS CAN Transceiver with Partial Networking
Modes of Operation
6.1
Normal-operating Mode
In Normal-operating mode all functions of the TLT9255W are available. The TLT9255W can receive data from
the HS CAN bus as well as transmit data to the HS CAN bus.
•
The transmitter is active and drives the serial data stream on the TxD input pin to the bus pins CANH, CANL.
•
The normal mode receiver is active and converts the signals from the bus to a serial data stream on the RxD
output pin.
•
The bus biasing is on.
•
The TxD timeout function is enabled (Chapter 7.4).
•
The overtemperature protection is enabled (Chapter 7.5).
•
The undervoltage detection on VBAT is enabled(Chapter 7.2.1)
•
The undervoltage detection on VCC is enabled (Chapter 7.2.2).
•
The undervoltage detection on VIO is enabled (Chapter 7.2.4).
•
The INH output pin is “high”.
•
A valid wake-up pattern is not signalled in the SPI bit WUP (Chapter 6.7.1).
•
Only if the selective wake function is enabled (SWK_EN = 1), then the HS CAN bus will be continuously
monitored for a valid WUF (Chapter 6.7.2).
•
Local wake-up function is disabled (Chapter 6.7.3).
Conditions for entering the Normal-operating Mode:
•
Normal-operating Mode can be entered via an SPI MC command from any mode of operation.
Conditions for leaving the Normal-operating Mode:
•
If VIO < VIO_UV AND tVIO_UV_T has expired ANDtsilence has expired, then this triggers a mode change to Sleep
Mode
•
If VCC < VCC_UV AND tVCC_UV_T has expired AND tsilence has expired, then this triggers a mode change to Sleep
Mode.
•
An SPI MC command triggers a mode change.
Figure 5 shows possible mode changes.
VIO undervoltage
AND
tVIO_UV_T expired
AND
tSilence expired
Sleep Mode
SPI MC
command
Normal-operating
Mode
VCC undervoltage
AND
tVCC_UV_T expired
AND
tSilence expired
Any Mode
Any Mode
SPI MC
command
Figure 5
Mode changes in Normal-operating Mode
Datasheet
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TLT9255WLC
HS CAN Transceiver with Partial Networking
Modes of Operation
6.2
Receive-only Mode
In Receive-only Mode the transmitter is disabled and the receiver is enabled. The TLT9255W can receive data
from the HS CAN bus, but cannot transmit data to the HS CAN bus.
•
The transmitter is disabled and the data available on the TxD input is blocked.
•
The RxD output pin indicates the data received by the normal-mode receiver.
•
The bus biasing is on.
•
The TxD timeout function is disabled (Chapter 7.4).
•
The overtemperature protection is disabled (Chapter 7.5).
•
The undervoltage detection on VBAT is enabled(Chapter 7.2.1)
•
The undervoltage detection on VCC is enabled (Chapter 7.2.2).
•
The undervoltage detection on VIO is enabled (Chapter 7.2.4).
•
The INH output pin is “high”.
•
A valid wake-up pattern is not signalled in the SPI bit WUP (Chapter 6.7.1).
•
Only if the selective wake function is enabled (SWK_EN = 1), then the HS CAN bus is continuously
monitored for a valid WUF (Chapter 6.7.2).
•
Local wake-up function is disabled (Chapter 6.7.3).
Conditions for entering the Receive-only Mode:
•
Receive-only Mode can be entered via an SPI MC command from any mode of operation.
Conditions for leaving the Received-only Mode:
•
If VIO < VIO_UV AND tVIO_UV_T has expired AND tsilence has expired, then this triggers a mode change to Sleep
Mode.
•
If VCC < VCC_UV AND tVCC_UV_T has expired AND tsilence has expired, then this triggers a mode change to Sleep
Mode.
•
An SPI MC command triggers a mode change.
Figure 6 shows possible mode changes.
VIO undervoltage
AND
tVIO_UV_T expired
AND
tSilence expired
Sleep Mode
SPI MC
command
Receive-only Mode
VCC undervoltage
AND
tVCC_UV_T expired
AND
tSilence expired
Any Mode
Any Mode
SPI MC
command
Figure 6
Datasheet
Mode changes in Receive-only Mode
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TLT9255WLC
HS CAN Transceiver with Partial Networking
Modes of Operation
6.3
Stand-by Mode
Stand-by Mode is a low power mode of the TLT9255W with both the transmitter and the receiver disabled. In
Stand-by Mode the transceiver can neither send data to the HS CAN bus nor can it receive data from the
HS CAN bus:
•
The transmitter is disabled and the data available on the TxD input is blocked.
•
The RxD output pin indicates a wake-up event (Chapter 6.8). If no wake-up event is pending, then the
default value of the RxD output pin is “high”.
•
After Power on Reset the bus biasing is off. Chapter 6.6 describes the conditions for the bus biasing.
•
The TxD timeout function is disabled (Chapter 7.4).
•
The overtemperature protection is disabled (Chapter 7.5).
•
The undervoltage detection on VBAT is enabled(Chapter 7.2.1)
•
The undervoltage detection on VCC is enabled (Chapter 7.2.2).
•
The undervoltage detection on VIO is enabled (Chapter 7.2.4).
•
The INH output pin is “high”.
•
If the selective wake function is disabled (SWK_EN = 0), then the HS CAN bus is continuously monitored for
a valid wake-up pattern (Chapter 6.7.1). If the selective wake function is enabled, then a valid wake-up
pattern is not signalled in the SPI bit WUP.
•
Only if the selective wake function is enabled (SWK_EN = 1), then the HS CAN bus is continuously
monitored for a valid WUF (Chapter 6.7.2).
•
Local wake-up function is enabled (Chapter 6.7.3).
•
If VIO > VIO_UV, then a mode change is possible.
Datasheet
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TLT9255WLC
HS CAN Transceiver with Partial Networking
Modes of Operation
Conditions for entering the Stand-by Mode:
•
After Power on Reset: If VCC OR VBAT is within the functional range for at least tPON, then the TLT9255W enters
Stand-by Mode.
•
If a wake-up (WUP, WUF, LWU) is detected in Sleep Mode, then the TLT9255W enters Stand-by Mode.
•
If the selective wake unit is active (Selective wake Sub-Mode) AND if the value of the error counter is 32 (see
Chapter 8.3),
then the TLT9255W enters Stand-by Mode.
•
Stand-by Mode can be entered via an SPI MC command from any mode of operation.
Conditions for leaving the Stand-by Mode:
•
If VIO < VIO_UV AND tVIO_UV_T has expired AND tsilence has expired, then this triggers a mode change to Sleep
Mode.
•
If VCC < VCC_UV AND tVCC_UV_T has expired AND tsilence has expired, then this triggers a mode change to Sleep
Mode.
•
An SPI MC command triggers a mode change.
Figure 7 shows possible mode changes.
VIO undervoltage
AND
tVIO_UV_T expired
AND
tSilence expired
Sleep Mode
Wake-up event
OR ECNT > 31
VBAT OR VCC is in the
functional range for at least
tPON
SPI MC
Power on Reset
command
Stand-by Mode
Datasheet
VCC undervoltage
AND
tVCC_UV_T expired
AND
tSilence expired
Any Mode
SPI MC
command
Any Mode
Figure 7
Sleep Mode
Mode changes in Stand-by Mode
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TLT9255WLC
HS CAN Transceiver with Partial Networking
Modes of Operation
6.4
Sleep Mode
Sleep mode is a low power mode with minimized quiescent current. If the TLT9255W detects a wake-up event
in Sleep Mode, then it changes to Stand-by Mode. Sleep Mode has three Sub-Modes.
VIO undervoltage
AND
tVIO_UV_T expired
AND
tSilence expired
Wake-up event
OR
ECNT > 31
Stand-by Mode
SPI MC
command
Any Mode
Sleep Mode
Any Mode
VCC undervoltage
AND
tVCC_UV_T expired
AND
tSilence expired
Figure 8
SPI MC
command
Mode change in Sleep Mode
Any Mode
SPI MC
command
SPI MC
command
(VIO < VIO_UV
AND
VIO_UV_T expired
AND
tSilence expired)
Any Mode
Stand-by Mode
VCC undervoltage
AND
tVCC_UV_T expired
AND
tSilence expired
SPI MC
command
WUP OR LWU
detection
Sleep WUP
Sub-Mode
SPI MC
command
WUF OR LWU
detection
OR ECNT > 31
LWU detection
Selective Wake
Sub-Mode
(WUF detection in SPI
configured)
WUP detection
SPI MC
command
tSilence expired
Selective Sleep
Sub-Mode
(WUF detection in SPI
configured)
Sleep Mode
Figure 9
Datasheet
Sub-Modes in Sleep Mode
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TLT9255WLC
HS CAN Transceiver with Partial Networking
Modes of Operation
Figure 10 shows the internal behavior of the TLT9255W in case the microcontroller sends a change to Sleep
Mode SPI command.
Change into the Sleep
Mode by a SPI
Command
Yes
No
Is Selective
Wake enabled
Is WUF
pending
Yes
Is WUP
pending
No
No
Is Local
Wake up
pending
Yes
Is Local
Wake up
pending
No
Enter Selective Wake
Sub-Mode
Figure 10
Datasheet
No
Enter Stand-by Mode
Enter Sleep WUP
Sub-Mode
Internal behavior of the TLT9255W after receiving a change to Sleep Mode SPI command
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HS CAN Transceiver with Partial Networking
Modes of Operation
6.4.1
Sleep WUP Sub-Mode
Sleep WUP Sub-Mode is a low power mode of the TLT9255W. Sleep WUP Sub-Mode reduces current
consumption. The following conditions are valid for the Sleep WUP Sub-Mode:
•
The transmitter is disabled and the data available on the TxD input is blocked.
•
The value of the RxD output pin depends on the power supply circuit of VIO.
– Permanent power supply of VIO (INH pin is not used)
The RxD output pin is “high”
– The INH pin controls the power supply of VIO
The RxD output pin is “low”
•
If the tSilence timer has expired, then the bus biasing is off.
•
The TxD timeout function is disabled (Chapter 7.4).
•
The overtemperature protection is disabled (Chapter 7.5).
•
The undervoltage detection on VBAT (Chapter 7.2.1) is not signalled in the SPI bit VBAT_UV.
•
The undervoltage detection on VCC is disabled(Chapter 7.2.2).
•
The undervoltage detection on VIO (Chapter 7.2.4) is not signalled in the SPI bits VIO_LTUV and VIO_STUV.
•
The INH output pin is “low”. The SPI bit VBAT_CON in the register SWK_CTRL_1 controls the behavior of
the INH pin.
•
The HS CAN bus is continuously monitored for a valid wake-up pattern (Chapter 6.7.1).
•
The HS CAN bus is not monitored for a valid WUF (Chapter 6.7.2).
•
Local wake-up function is enabled.
Conditions for entering the Sleep WUP Sub-Mode:
•
If VIO < VIO_UV (VIO undervoltage) AND tVIO_UV_T has expired AND tsilence has expired, then the TLT9255W enters
Sleep WUP Sub-Mode.
•
If VCC < VCC_UV (VCC undervoltage) AND tVCC_UV_T has expired AND tsilence has expired, then the TLT9255W
enters Sleep WUP Sub-Mode. The SPI bit STTS_EN controls this state transition.
•
The Sleep WUP Sub-Mode can be entered via an SPI MC command from any mode of operation.
Conditions for leaving the Sleep WUP Sub-Mode:
•
If a wake-up (WUP, LWU) is detected in Sleep WUP Sub-Mode, then the TLT9255W enters Stand-by Mode.
•
An SPI MC command triggers a mode change to any mode of operation.
VIO undervoltage
AND
tVIO_UV_T expired
AND
tSilence expired
Any Mode
SPI MC command
WUP OR LWU
detection
Sleep WUP
Sub-Mode
VCC undervoltage
AND
tVCC_UV_T expired
AND
tSilence expired
Figure 11
Datasheet
Stand-by Mode
SPI MC
command
Any Mode
Mode change in Sleep WUP Sub-Mode
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Modes of Operation
6.4.2
Selective Wake Sub-Mode
Selective Wake Sub-Mode is a low power mode of the TLT9255W. Only if the selective wake function is enabled
(SWK_EN= 1), then the TLT9255W can enter Selective Wake Sub-Mode. Chapter 8 describes the partial
networking functionality and the configuration. The following conditions are valid for the Selective Wake SubMode:
•
The transmitter is disabled and the data available on the TxD input is blocked.
•
The default value of the RxD output pin depends on the power supply circuit of VIO.
– Permanent power supply of VIO (INH pin is not used)
The RxD output pin is “high”
– The INH pin controls the power supply of VIO
The RxD output pin is “low”
•
The bus biasing is on.
•
The TxD timeout function is disabled (Chapter 7.4).
•
The overtemperature protection is disabled (Chapter 7.5).
•
The undervoltage detection on VBAT is enabled (Chapter 7.2.1).
•
The undervoltage detection on VCC is disabled(Chapter 7.2.2).
•
The undervoltage detection on VIO is enabled (Chapter 7.2.4).
•
The INH output pin is “low”. The SPI bit VBAT_CON in the register SWK_CTRL_1 controls the behavior of
the INH pin.
•
A valid wake-up pattern is not signalled in the SPI bit WUP (Chapter 6.7.1).
•
The HS CAN bus is continuously monitored for a valid WUF (Chapter 6.7.2).
•
Local wake-up function is enabled.
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HS CAN Transceiver with Partial Networking
Modes of Operation
Conditions for entering the Selective Wake Sub-Mode:
•
The Selective Wake Sub-Mode can be entered via an SPI MC command from any mode of operation.
•
If the TLT9255W detects a WUP in Selective Sleep Sub-Mode, then it enters Selective Wake Sub-Mode.
Conditions for leaving the Selective Wake Sub-Mode:
•
If a wake-up (WUF, LWU) is detected in Selective Wake Sub-Mode, then Stand-by Mode is entered.
•
If the error counter > 31 (Chapter 8.3) in Selective Wake Sub-Mode, then Stand-by Mode is entered.
•
If tSilence has expired, then Selective Sleep Sub-Mode is entered.
•
An SPI MC command will trigger a mode change to any mode of operation.
Selective Sleep
Sub-Mode
tSilence expired
Selective Sleep
Sub-Mode
WUP detection
Selective Wake
Sub-Mode
SPI MC
command
(WUF detection in SPI
configured)
Any Mode
Figure 12
Datasheet
WUF OR LWU
detection
OR
ECNT > 31
SPI MC
command
Stand-by Mode
Any Mode
Mode change in Selective Wake Sub-Mode
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Modes of Operation
6.4.3
Selective Sleep Sub-Mode
Selective Sleep Sub-mode is a low power mode with optimized quiescent current. The following conditions
are valid for the Selective Wake Sub-Mode:
•
The transmitter is disabled and the data available on the TxD input is blocked.
•
The default value of the RxD output pin depends on the power supply circuit of VIO.
– Permanent power supply of VIO (INH pin is not used)
The RxD output pin is “high”
– The INH pin controls the power supply of VIO
The RxD output pin is “low”
•
The bus biasing is off.
•
The TxD timeout function is disabled (Chapter 7.4).
•
The overtemperature protection is disabled (Chapter 7.5).
•
The undervoltage detection on VBAT (Chapter 7.2.1) is not signalled in the SPI bit VBAT_UV.
•
The undervoltage detection on VCC is disabled(Chapter 7.2.2).
•
The undervoltage detection on VIO (Chapter 7.2.4) is not signalled in the SPI bits VIO_LTUV and VIO_STUV.
•
The INH output pin is “low”. The SPI bit VBAT_CON in the register SWK_CTRL_1 controls the behavior of
the INH pin.
•
The HS CAN bus is continuously monitored for a valid wake-up pattern (Chapter 6.7.1), but a valid wakeup pattern is not signalled in the SPI bit WUP (Chapter 6.7.1).
•
The HS CAN bus is not monitored for a valid WUF (Chapter 6.7.2).
•
Local wake-up function is enabled.
Conditions for entering the Selective Sleep Sub-Mode:
•
If there is no communication on the HS CAN bus for longer than tSilence in the Selective Wake Sub-Mode,
then the TLT9255W enters the Selective Sleep Sub-Mode.
Conditions for leaving the Selective Sleep Sub-Mode:
•
If a WUP is detected, then Selective Wake Sub-Mode is entered.
•
If an LWU has been detected, then Stand-by Mode will be entered.
•
An SPI MC command triggers a mode change to any mode of operation.
tSilence expired
Selective Sleep
Sub-Mode
(WUF detection in SPI
configured)
WUP detection
Selective Wake
Sub-Mode
LWU detection
Stand-by Mode
Selective Wake
Sub-Mode
SPI MC
command
Figure 13
Datasheet
Any Mode
Mode change in Selective Sleep Sub-Mode
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HS CAN Transceiver with Partial Networking
Modes of Operation
6.5
Power On Reset
Power on Reset is a transition state of the TLT9255W after power is applied and the transceiver is not yet fully
functional.
•
The transmitter and receiver are disabled.
•
The bus biasing is off.
•
The TxD timeout function is disabled.
•
The overtemperature protection is disabled.
•
The undervoltage detection on VBAT is enabled (Chapter 7.2.1), but it is not signalled in the SPI bit
VBAT_UV.
•
The undervoltage detection on VCC is disabled.
•
The undervoltage detection on VIO is enabled (Chapter 7.2.4), but it is not signalled in the SPI bits
VIO_LTUV and VIO_STUV.
•
The SPI communication is blocked (MOSI, SCLK, CSN),
•
RxD and MISO pins are high impedance.
•
TxD pin is blocked
•
If VBAT > VBAT_POD OR VCC > VCC_POD, then the INH output pin is switched on
•
All SPI registers are reset to default values.
•
The HS CAN bus is not continuously monitored for a valid wake-up pattern (Chapter 6.7.1)
•
The HS CAN bus is not monitored for a valid WUF (Chapter 6.7.2).
•
Local wake-up function is disabled.
Conditions for entering the Power on Reset:
•
VBAT < VBAT_POD AND VCC < VCC_POD threshold.
Conditions for leaving the Power on Reset:
•
If VBAT is within the functional range for at least tPON OR if VCC is within the functional range for at least tPON,
then the TLT9255W enters Stand-by Mode
Figure 14 shows power up behavior and power down behavior:
VCC < VCC_POD
AND
VBAT < VBAT_POD
Power on Reset
Stand-by Mode
VBAT OR VCC is in
the functional
range for at least
tPON
Any Mode
Figure 14
Power down and power up behavior
SPI bit POR
The POR flag indicates that all registers are reset and the state machine is in the default mode (Stand-by Mode)
If all of the following conditions are fulfilled, then the POR flag is set:
•
VBAT is within the functional range for at least tPON OR VCC is within the functional range for at least tPON, then
the TLT9255W enters Stand-by Mode
•
VIO is within the functional range (SPI communication is possible)
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HS CAN Transceiver with Partial Networking
Modes of Operation
Any of the following events resets the POR flag:
•
an SPI clear command
•
a transition to the Normal-operating Mode
6.6
Automatic Bus Voltage Biasing
The automatic bus voltage biasing improves EMC performance of the entire network and increases the
reliability of communication performance in networks using CAN partial networking.
The automatic bus voltage biasing is enabled in all low power modes. The biasing unit operates independently
from all other transceiver functions and only depending on the network activity (tSilence). If tSilence has expired,
then there is no activity on the CAN bus. The tSilence timer is restarted under the following conditions:
•
If tSilence has expired in Sleep WUP Sub-Mode AND a WUP is detected
•
If tSilence has not expired in Sleep WUP Sub-Mode AND a rising or falling edge is detected AND the pulse
width (dominant or recessive) is greater than tFilter
•
If a WUP is detected in Selective Sleep Sub-Mode
•
If tSilence has expired in Stand-by Mode AND a WUP is detected
•
If the tSilence has not expired in Stand-by Mode AND a rising edge or a falling edge is detected AND the pulse
width (dominant or recessive) is greater than tFilter
•
If a rising or falling edge is detected in any other mode AND the pulse width (dominant or recessive) is
greater than tFilter
If there is no activity on the bus for longer than tSILENCE, then the internal resistors bias the bus pins towards
GND. On detection of a valid wake-up pattern (WUP), the internal biasing is enabled and terminates the
biasing resistors towards 2.5 V within t > tRW_Bias.
Figure 15
Datasheet
Bus Biasing and tSilence
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HS CAN Transceiver with Partial Networking
Modes of Operation
6.7
Wake-up event
Valid wake-up events are:
•
a Wake-up pattern (WUP) in Sleep WUP Sub-Mode
•
a Wake-up frame (WUF) in Selective Wake Sub-Mode
•
a Local Wake-up (LWU) in Sleep WUP Sub-Mode, Selective Sleep Sub-Mode or Selective Wake Sub-Mode
If a valid wake-up event is detected, then this triggers a mode change to Stand-by Mode.
6.7.1
Wake-up pattern (WUP)
Within the maximum wake-up time tWAKE, the wake-up pattern consists of the following sequence (see
Figure 16):
•
a dominant signal with pulse width t > tFilter
•
a recessive signal with pulse width t > tFilter
•
a dominant signal with pulse width t > tFilter
t < tWake
VDiff
VDiff_LP_D
t > tFilter
t > tFilter
VDiff_LP_R
t > tFilter
t
wake-up
detected
Figure 16
Wake-up pattern
Entering Sleep WUP
Mode or Selective
Sleep Sub-Mode
Bus recessive > tFilter
Ini
Wait
Bus dominant > tFilter
tWake expired
1
Bus recessive > tFilter
tWake expired
2
Bus dominant > tFilter
3
Wake up
detected
Figure 17
Datasheet
WUP detection
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HS CAN Transceiver with Partial Networking
Modes of Operation
The WUP bit in the register WAKE_STAT indicates detection of a wake-up pattern on the HS CAN bus. If the
transceiver is not in the Selective Sleep Sub-Mode AND if the transceiver detects a valid wake-up pattern, then
the WUP bit is set. An SPI clear command resets the bit. A wake-up is not executed under the following
conditions:
•
A mode change to Normal-operating Mode is performed during the wake-up pattern.
•
The maximum wake-up time tWAKE expires before a valid WUP is detected.
•
The transceiver is powered down (VCC < VCC_POD AND VBAT < VBAT_POD).
6.7.2
Wake-up frame (WUF)
If the selective wake unit is enabled (SWK_EN =1), then the selective wake unit continuously monitors the
HS CAN Bus for a valid wake-up frame. If a valid WUF is detected, then the WUF bit in the register WAKE_STAT
is set to “1”. An SPI clear command resets the WUF bit. Chapter 8 describes the selective wake feature.
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HS CAN Transceiver with Partial Networking
Modes of Operation
6.7.3
Local Wake-up (LWU)
The WAKE input pin can detect a rising edge as well as a falling edge as a wake-up event (configurable in
LWU_NEG, LWU_POS). The LWU bit in the register WAKE_STAT indicates that a local wake-up is detected on
the local wake-up pin. The transceiver sets the LWU bit. An SPI command resets the LWU bit. The LWU_DIR
bit in the register WAKE_STAT indicates on which edge a local wake-up has been detected. The transceiver
sets the LWU_DIR flag and it is only valid, if a local wake-up has been detected. Chapter 10.6.3 describes the
local wake-up timing.
V on WAKE pin
VBAT
tWAKE_Filter
VWAKE_TH
t
wake-up detected
Figure 18
Local wake-up negative edge
V on WAKE pin
VBAT
VWAKE_TH
tWAKE_Filter
t
wake-up detected
Figure 19
Datasheet
Local wake-up positive edge
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HS CAN Transceiver with Partial Networking
Modes of Operation
6.8
RxD pin wake-up behavior
The RxD output pin indicates a wake-up event to the microcontroller. On detection of a valid wake-up event
the RxD output pin reacts with one of the following behaviors, depending on the WAKE_TOG bit in the SPI
register HW_CTRL:
•
RxD output pin is set to “low”
•
RxD output pin starts to toggle
If Stand-by Mode is re-entered by a mode change (microcontroller) the previous indication of a valid wake-up
event is not signalled on the RxD pin. Only if a new wake-up event has been detected, the RxD pin indicates the
wake-up event. The clearing of a WUP, WUF or LWU has no influence on the behavior of the RxD pin.
6.8.1
RxD permanent “low”
If a valid wake-up event is detected AND if SPI bit WAKE_TOG = 0, then the RxD output pin is set to “low”. If a
mode change occurs, then the RxD output pin behavior is defined by the new state.
wake-up event detected
Sleep Mode
Mode
Stand-by Mode
tMode_Change
RxD
RxD remains permanently logical „low“
t
Figure 20
RxD “low” after wake-up event
wake-up event detected
Mode
Sleep Mode
Stand-by Mode
tMode_Change
RxD
30% VIO
RxD remains permanently logical „low“
t
Figure 21
Datasheet
RxD “low” after wake-up event (permanently supplied VIO)
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HS CAN Transceiver with Partial Networking
Modes of Operation
6.8.2
RxD Toggle
If WAKE_TOG is set to 1 AND if a valid wake-up event is detected AND if VIO is within the functional range, then
the RxD output pin starts to toggle from “low” to “high” and “high” to “low” with time period of tToggle.
Figure 22 and Figure 23 show this behavior. If a mode change occurs, then the RxD output pin behavior is
defined by the new state.
wake-up event detected
Mode
Sleep Mode
Stand-by Mode
tMode_Change
tToggle
tToggle
tToggle
tToggle
RxD
70% VIO
30% VIO
t
Figure 22
RxD toggling behavior after wake-up event
wake-up event detected
Mode
Sleep Mode
Stand-by Mode
tMode_Change
RxD
tToggle
tToggle
tToggle
tToggle
t
70% VIO
30% VIO
t
Figure 23
Datasheet
RxD toggling behavior after wake-up event (permanently supplied VIO)
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HS CAN Transceiver with Partial Networking
Fail Safe Functions
7
Fail Safe Functions
7.1
Short Circuit Protection
The CANH and CANL bus pins are proven to cope with a short circuit fault to GND and to the supply voltages.
A current limiting circuit protects the transceiver from damage.
7.2
Undervoltage detection
The TLT9255W has independent undervoltage detection on VBAT, VCC and VIO. Undervoltage events at these
pins may have impact on the functionality of the device and also may change the mode of operation.
7.2.1
Undervoltage detection on VBAT
If the power supply VBAT < VBAT_UV for more than the glitch filter time tVBAT_filter, then an undervoltage is detected.
On detection of undervoltage the TLT9255W performs the following actions:
•
disable Local wake-up
•
Set the bit VBAT_UV in the SPI register TRANS_UV_STAT to “1”. After the completion of a Power on Reset
or after a transition from Sleep Mode to Stand-by Mode the VBAT supply stabilization period must be
completed before an undervoltage notification can be recorded in the VBAT_UV bit. The undervoltage
notification is only possible once the VBAT supply has exceeded the threshold VBAT_UV, that is VBAT > VBAT_UV.
Figure 25 shows this scenario.
Only an SPI command can reset the undervoltage bit VBAT_UV (see Chapter 9.2). The glitch filter is
implemented in order to prevent an undervoltage detection due to short voltage transients on VBAT. Figure 24
shows the effect of glitch filter time in different undervoltage scenarios.
VIO and VCC are within the functional range
VBAT
VBAT_UV
tVBAT_filter
tVBAT_filter
t
Status Bit:
VBAT_UV
Figure 24
Datasheet
„0"
„1"
Undervoltage detection VBAT
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HS CAN Transceiver with Partial Networking
Fail Safe Functions
VIO and VCC are within the functional range
VBAT
VBAT_UV
tVBAT_filter
t
Status Bit:
VBAT_UV
Figure 25
Notification
disabled
„0"
„1"
Undervoltage detection VBAT during VBAT supply stabilization period
After power up the application can set the VBAT_CON to “0” in the SPI Register SUPPLY_CTRL in order to
disable undervoltage detection.
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HS CAN Transceiver with Partial Networking
Fail Safe Functions
7.2.2
Short-term Undervoltage detection on VCC
If the power supply VCC < VCC_UV for more than the glitch filter time tVCC_filter, then a short-term undervoltage on
VCC is detected. The glitch filter prevents an undervoltage detection due to short voltage transients on VCC. On
detection of short-term undervoltage the TLT9255W performs the following actions:
•
Set short-term undervoltage bit VCC_STUV to “1” in the SPI register TRANS_UV_STAT. Only after the
completion of a Power on Reset, the VCC supply stabilization period must be completed before an
undervoltage notification can be recorded in the VCC_STUV bit. After Power on Reset the undervoltage
notification is only possible once the VCC supply has exceeded the threshold VCC_UV, that is VCC > VCC_UV.
Figure 27 shows this scenario.
•
disable the transmitter
An SPI command can reset the undervoltage bit VCC_STUV. If VCC > VCC_UV for more than the glitch filter time
tVCC_filter AND if the transmitter recovery time tVCC_recovery has expired, then the transmitter is re-enabled.
VIO and VBAT are within the functional range
VCC
VCC_UV
tVCC_filter
tVCC_filter
tVCC_filter tVCC_recovery
t
Figure 26
Transmitter:
enabled
Status Bit
VCC_STUV:
„0"
disabled
enabled
„1"
VCC undervoltage detection
VIO and VBAT are within the functional range
VCC
VCC_UV
tVCC_filter
t
Status Bit:
VCC_STUV
Notification
disabled
„0"
„1"
Figure 27
Undervoltage detection VCC during VCC supply stabilization period after Power on Reset
7.2.3
Long-term undervoltage detection on VCC
If VCC < VCC_UV for more than the glitch filter time tVCC_filter, then the undervoltage detection timer is started. If
tVCC_UV_T has expired, then a long-term undervoltage is detected and the bit VCC_LTUV is set to “1”. Besides, if
the SPI bit STTS_EN = 1 (default value) AND if tSilence has expired, then a state transition to Sleep WUP SubDatasheet
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HS CAN Transceiver with Partial Networking
Fail Safe Functions
Mode is triggered. If VCC > VCC_UV for more than the glitch filter time tVCC_filter, then the timer tVCC_UV_T is stopped
and reset. Only an SPI command can reset the undervoltage bit VCC_LTUV. The tVCC_UV_T can be configured in
the SPI register SUPPLY_CTRL.
VBAT is in the functional range
VCC
VCC_UV
tVCC_filter
tVCC_UV_T
t
Status Bit:
VCC_LTUV
„0"
Mode
(SPI Bit STTS = 1)
„1"
POR
Stand-by Mode
POR
Sleep WUP Sub-Mode1
Stand-by Mode
1) State transition will be performed if the tSilence timer has expired (no CAN bus communication)
Figure 28
VCC long-term undervoltage detection after power up
VIO and VBAT are within the functional range
VCC
VCC_UV
tVCC_filter
tVCC_UV_T
t
Status Bit
VCC_LTUV:
„0"
Figure 29
VCC long-term undervoltage detection during operation
7.2.4
Short-term Undervoltage detection on VIO
„1"
If the power supply VIO < VIO_UV for more than the glitch filter time tVIO_filter, then short-term undervoltage on VIO
is detected. The glitch filter prevents an undervoltage detection due to short voltage transients on VIO. On
detection of short-term undervoltage the TLT9255W performs the following actions:
•
Set the short-term undervoltage bit VIO_STUV to “1” in the SPI register TRANS_UV_STAT. After the
completion of a Power on Reset, the VIO supply stabilization period must be completed before an
undervoltage notification can be recorded in the VIO_STUV bit. After Power on Reset the undervoltage
notification is only be possible once the VIO supply has exceeded the threshold VIO_UV, that is VIO > VIO_UV.
Figure 31 shows this scenario.
•
set the RxD pin to “low”
•
disable SPI communication by switching the MISO pin to high impedance
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HS CAN Transceiver with Partial Networking
Fail Safe Functions
•
TLT9255W ignores all signals on the input TxD pin
Only an SPI command can reset the undervoltage bit VIO_STUV. If VIO has recovered (VIO > VIO_UV) for more than
the glitch filter time tVIO_filter AND if the tVIO_recovery time has expired, then the RxD pin returns to normal
functionality depending on the mode of operation and the SPI communication is restored.
VCC OR VBAT are within the functional range
VIO
VIO_UV
tVIO_filter
tVIO_filter
tVIO_filter tVIO_recovery
t
RxD pin:
RxD pin normal functional depending on mode of
operation
Logical „low“
RxD pin normal functional
depending on mode of operation
SPI Communicaiton
No SPI communication (High
impedance)
SPI Communicaiton
Any signal will be processed
Any signal will be ignored
Any signal will be processed
MISO:
TxD pin:
Status Bit
VIO_STUV:
Figure 30
„0"
„1"
VIO short-term undervoltage detection
VCC and VBAT are within the functional range
VIO
VIO_UV
tVIO_filter
t
Status Bit:
VIO_UV
Notification
disabled
„0"
„1"
Figure 31
Undervoltage detection VIO during VIO supply stabilization period after Power on Reset
7.2.5
Long-term Undervoltage detection on VIO
If VIO < VIO_UV for more than the glitch filter time tVIO_filter, then the undervoltage detection timer is started. If
tVIO_UV_T expires, then a long-term undervoltage is detected. On detection of long-term undervoltage the
TLT9255W performs the following actions:
•
set the bit VIO_LTUV to “1”
•
perform a mode change to Sleep WUP Sub-Mode only after tSilence has expired (no bus communication)
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HS CAN Transceiver with Partial Networking
Fail Safe Functions
If VIO > VIO_UV for more than the glitch filter time tVIO_filter, then the timer tVIO_UV_T is stopped and reset. Only an
SPI command can reset the undervoltage bit VIO_LTUV. The tVIO_UV_T is configurable in the SPI Register
SUPPLY_CTRL.
VBAT OR VCC is in the functional range
VIO
VIO_UV
tVIO_filter
tVIO_UV_T
t
Status Bit:
VIO_UV
Mode
„0"
POR
„1"
Sleep WUP Sub-Mode1
Stand-by Mode
1) State transition will be performed if the tSilence timer has expired (no CAN bus communication)
Figure 32
VIO long-term undervoltage detection after power up
VBAT OR VCC is in the functional range
VIO
VIO_UV
tVIO_UV_T
tVIO_filter
t
Status Bit:
VIO_UV
Mode
„0"
POR
„1"
Sleep WUP Sub-Mode1
Stand-by Mode
1) State transition will be performed if the tSilence timer has expired (no CAN bus communication)
Figure 33
VIO long-term undervoltage detection during operation
7.3
Unconnected Logic Pins
If the input pins are not connected and floating, the integrated pull-up and pull-down resistors at the digital
input pins force the TLT9255W into fail safe behavior (see Table 6).
Table 6
Logical Inputs when unconnected
Input Signal
Default State
Comment
TxD
“high”
pull-up current source to VIO
MOSI
“low”
pull-down current source to GND
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HS CAN Transceiver with Partial Networking
Fail Safe Functions
Table 6
Logical Inputs when unconnected (cont’d)
Input Signal
Default State
Comment
SCLK
“low”
pull-down current source to GND
CSN
“high”
pull-up current source to VIO
7.4
TxD Time-out Function
If the logical signal on the TxD pin is permanently “low”, then the TxD time-out feature protects the CAN bus
from blocked communication due to this errant logic signal on TxD. A permanent “low” signal on the TxD pin
can occur due to a locked-up microcontroller or in a short circuit on the printed circuit board, for example. In
Normal-operating Mode, a “low” signal on the TxD pin for the time t > tTXD_TO enables the TxD time-out feature
and the TLT9255W disables the transmitter (see Figure 34) and sets the TXD_TO bit in the register
TRANS_STAT. The timer tTXD_TO is configurable in SPI register TXD_TO_CTRL. The receiver is still active and
the RxD output pin continues monitoring data on the bus.
TxD
t
t > tTXD_TO
TxD time-out
CANH
CANL
TxD time–out released
t
RxD
t
Figure 34
TxD time-out function
Figure 34 shows how the transmitter is deactivated and re-activated.To release the transmitter after a TxD
time-out event, the TLT9255W requires a signal change on the TxD input pin from “low” to “high”.
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Fail Safe Functions
7.5
Overtemperature Protection
Integrated overtemperature detection protects the TLT9255W from thermal overstress of the transmitter. The
overtemperature protection is active in Normal-operating Mode only. The temperature sensor provides the
temperature threshold TJSD. If the junction temperature exceeds the upper threshold TJSD, then the TLT9255W
disables the transmitter and sets the bit TSD, indicating that a critical temperature situation is reached. After
the device cools down the transmitter is re-enabled. Only an SPI command can reset the TSD bit. A hysteresis
is implemented within the temperature sensor.
TJSD (shut down temperature)
TJ
cool down
ΔT
switch-on transmitter
t
CANH
CANL
t
TxD
t
RxD
t
Figure 35
Overtemperature protection
7.6
Delay Time for Mode Change
The TLT9255W performs mode changes within the time window tMode_Change. During mode changes
(tMode_Change) the RxD output pin is permanently set to “high” and does not reflect the status on the CANH and
CANL input pins. After the mode change is completed, the TLT9255W releases the RxD output pin.
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HS CAN Transceiver with Partial Networking
CAN Partial Networking
8
CAN Partial Networking
Partial networking allows to exclude nodes from the CAN communication in a CAN network. If the TLT9255W
is in the Selective Wake Sub-Mode, then a CAN frame can wake-up the TLT9255W. This feature is called
selective wake and the CAN frame is called wake-up frame (WUF). The selective wake unit implements the
selective wake feature.
8.1
Wake-up frame evaluation
For a WUF detection the TLT9255W evaluates, whether a received CAN frame is a valid wake-up frame. This
wake-up frame evaluation consists of the following parts:
•
CAN ID evaluation
•
Frame data length code (DLC) and data field evaluation
If both parts are evaluated successfully AND if the CRC of the CAN Frame is valid, then a valid wake-up frame
is detected (see Figure 36). The following chapter describes the process in more detail.
CAN Frame
CRC Field
ACK
EOF
Wake-up detected
Figure 36
WUF detection
8.1.1
Wake-up frame identifier evaluation
If all relevant CAN ID bits of a CAN frame match the configured CAN ID bits in the TLT9255W, then a valid WUF
CAN ID is received. The CAN ID mask excludes CAN ID bits from the evaluation. The CAN ID bits of a received
CAN frame are compared bit by bit with the CAN ID configured in register SWK_ID0_CTRL to SWK_ID3_CTRL.
If the received CAN ID is equal to the configured CAN ID, then the wake-up frame identifier evaluation is
successful. The CAN ID mask (registers SWK_MASK_ID0_CTRL to SWK_MASK_ID3_CTRL) defines which bits
the comparison considers. Figure 37 shows an example of the CAN ID evaluation (11 bit CAN ID). The green
background color defines the CAN ID bits which are not considered in the comparison.
Figure 37
Datasheet
Configured CAN ID
1 0
0 1 0 1 1 1 0 1 0
CAN ID mask
1 1
1 1 1 1 1 1 1 1 0
1st valid WUF CAN ID
1 0
0 1 0 1 1 1 0 1 0
2nd valid WUF CAN ID
1 0
0 1 0 1 1 1 0 1 1
Example of an invalid
WUF CAN ID
1 0
0 1 0 1 1 0 0 1 1
CAN ID and CAN ID mask
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CAN Partial Networking
The registers SWK_ID0_CTRL, SWK_ID1_CTRL, SWK_ID2_CTRL and SWK_ID3_CTRL configure the CAN ID.
The IDE bit defines the CAN ID format (11 bit or 29 bit identifier).
The
registers
SWK_MASK_ID0_CTRL,
SWK_MASK_ID1_CTRL,
SWK_MASK_ID2_CTRL
and
SWK_MASK_ID3_CTRL configure the CAN-ID mask.
8.1.2
DLC and data field evaluation
If all of the following conditions are fulfilled, then the DLC and data field evaluation is successful:
•
the DLC of the received CAN frame is equal to the DLC configured in the DLC field of the register
SWK_DLC_CTRL
•
At least one bit within the data field of the received CAN frame is “1” and matches to a bit (“1”) of the
configured data field. If one bit matches, then the evaluation is stopped. The registers SWK_DATA0_CTRL,
SWK_DATA1_CTRL, SWK_DATA2_CTRL, SWK_DATA3_CTRL, SWK_DATA4_CTRL, SWK_DATA5_CTRL,
SWK_DATA6_CTRL and SWK_DATA7_CTRL configure the data field.
Figure 38 shows an example for the data field evaluation. The DLC in this example is 1.
Data byte 0
Configured data mask
0 0 1 1 1 0 1 1
Received CAN data bytes
1 0 1 0 0 1 1 0
These bits can be
ignored
Data matches.
The evaluation
process can be
stopped
time
Figure 38
Datasheet
Data field evaluation
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CAN Partial Networking
8.2
Activation of Selective Wake
Figure 39 shows the recommended way to activate the selective wake function in the TLT9255W.
Power on Reset
SWK Unit is not enabled
The selective wake unit will acquire CAN
bus synchronization within 4 classical
CAN frames. On the first successfully
synchronized classical CAN frame the
SYNC bit is set to 1.
Set Baudrate for the SWK
unit
Enable Selective Wake
(SWK_EN = 1)
Set SWK wake data. e.g.
ID, ID_Mask, DATA
Any mode
SWK Unit is enabled
Confirm SWK configuration
(CFG_VAL = 1)
SWK configuration must be
checked by MC
Yes
Check
SYSERR
1
SWK
Config Error
(CFG_VAL = 0)
No
Frame could not be detected
by the selective wake unit. MC
must make a diagnosis to find
the reason (e.g. wrong
baudrate).
0
Check
WK_STAT
register
WUP, LWU or WUF
pending
MC decides how to procceed
No WUP, LWU or WUF pending
Change into the Sleep
Mode by a SPI command
MC still wants to change
into Sleep Mode
Clear WK_STAT register
Transceiver enters Sleep
Mode
Figure 39
Activation of selective wake function
8.3
Frame Error Counter
The frame error counter indicates, whether received classical CAN frames are valid. CAN FD frames are not
evaluated and therefore CAN FD frame errors do not affect the frame error counter. If the selective wake unit
detects a classical CAN frame error, then the frame error counter is increased by 1. If the selective wake unit
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HS CAN Transceiver with Partial Networking
CAN Partial Networking
detects a valid classical CAN frame, then the error counter is decreased by 1. The following types of errors
cause invalid classical CAN Frames:
•
Bit stuffing error
•
CRC error
•
CRC delimiter error
If the SPI bit SWK_EN = 1, then the frame error counter is active in any mode of operation. The error counter
value can be read via SPI (register SWK_ECNT_STAT). Each time that the Selective Wake Unit is enabled
(SWK_EN = 1) OR if the tsilence timer has expired, then the error counter is reset to zero.
If the TLT9255W repeatedly receives invalid classical CAN frames in the Selective Wake Sub-Mode, then the
frame error counter ensures that a wake-up is performed. If the TLT9255W is in the Selective Wake Sub-Mode
and the error counter reaches the value 32, then a wake-up is performed.
8.4
Selective Wake Configuration Error
After the microcontroller has confirmed the configuration (CFG_VAL = 1), writing the following registers
generates a selective wake configuration error:
•
Baudrate control register (SWK_CTRL_2)
•
Identifier control registers (SWK_ID3_CTRL, SWK_ID2_CTRL, SWK_ID1_CTRL and SWK_ID0_CTRL)
•
Mask identifier control registers (SWK_MASK_ID3_CTRL, SWK_MASK_ID2_CTRL, SWK_MASK_ID1_CTRL
and SWK_MASK_ID0_CTRL)
•
Data Length control register (SWK_DLC_CTRL)
•
Data control registers (SWK_DATA7_CTRL, SWK_DATA6_CTRL, SWK_DATA5_CTRL, SWK_DATA4_CTRL,
SWK_DATA3_CTRL, SWK_DATA2_CTRL, SWK_DATA1_CTRL and SWK_DATA0_CTRL)
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CAN Partial Networking
The following figure shows a selective wake configuration error.
Power on Reset
SWK Unit is not enabled
Set Baudrate for the SWK
unit
Enable Selective Wake
(SWK_EN = 1)
Set SWK wake data. e.g.
ID, ID_Mask, DATA
Any mode
SWK Unit is enabled
Confirm SWK configuration
(CFG_VAL = 1)
Write operation to a SWK
configuration Register will
cause a selective wake
configuration error!
Figure 40
Selective wake configuration Error
8.5
CAN Flexible Data Rate (CAN FD) Tolerant Feature
The CAN FD tolerant feature means that selective wake unit ignores CAN FD frames. Therefore it is not possible
to configure a CAN FD frame for wake-up frame (WUF) detection.
At the completion of a detected CAN FD frame, that is, the End of Frame (EOF) is detected, the selective wake
unit is ready for detecting the next available classical CAN frame. If at least 6 recessive bits and at most 10
recessive bits are received, then EOF detection is successful. The FDF Bit of the Control Field of a CAN FD frame
identifies the type of CAN frame:
•
FDF bit = 1:
CAN FD frame recognized, decoding stops
•
FDF bit = 0:
classical CAN frame recognized, processing of the frame continues
In this way it is possible to send mixed CAN frame formats without affecting the selective wake functionality
by error counter increment and a misleading wake-up. The CAN FD data phase baud rate must be configured
in the SPI field BR_RATIO of the register SWK_CTRL_2 to enable detection of CAN FD frames.
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CAN Partial Networking
8.6
Selective wake SPI flags
8.6.1
SysErr Flag
The SysErr flag in the register SWK_STAT indicates an error condition in the selective wake unit of the
TLT9255W. Only if the SPI bit SWK_EN = 1, then the SysErr flag is set . The SysErr flag does not prevent
entering the Sleep Mode by an SPI command. However, the SysErr flag determines, whether the TLT9255W
enters the Selective Wake Sub-Mode (SysErr = 0) or Sleep WUP Mode (SysErr = 1). Figure 41 shows this
scenario.
Change into the Sleep
Mode by a SPI command
Check
SYSERR
0
Enter Selective Wake
Sub-Mode
1
Figure 41
Enter Sleep WUP
Sub-Mode
WUF detected
WUF Flag will be set
WUP detected
WUP Flag will be set
Tranceiver perfom the
following actions:
- CFG_VAL will be cleared
- Switch to the Stand by
Mode
- Inhibit will be switch on if
configured.
Impact of SysErr flag if a mode change SPI command to Sleep Mode has been sent
The SysErr flag is set under any of the following conditions:
•
Selective wake configuration error is detected (see Chapter 8.4).
•
The frame error counter value is greater than 31.
Only if no configuration error (CFG_VAL = 1) exists AND if the error counter is less than 32, then the TLT9255W
resets the SysErr flag.
8.6.2
SYNC Flag
The SYNC flag in the register SWK_STAT indicates that a classical CAN frame is detected correctly by the
selective wake unit. The SYNC flag works, if all of the following conditions are fulfilled:
•
Selective Wake is enabled (SWK_EN Bit = 1)
•
After Power on Reset the configuration is confirmed (CFG_VAL Bit = 1) at least once.
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CAN Partial Networking
If the selective wake unit detects an invalid classical CAN frame, then the SYNC flag is reset. The SYNC flag has
no influence on the transition to the Sleep Mode by an SPI command. After power up SYNC = 0. The SYNC flag
is not valid in the Selective Sleep Sub-Mode.
8.6.3
CANTO Flag
The CANTO flag in the register SWK_STAT indicates that the TLT9255W has entered Selective Sleep Mode (no
bus communication) at least once. Only if the SPI bit SWK_EN = 1, then the CANTO flag can be set. If the
TLT9255W is in the Selective Sleep Mode AND if the tSilence timer expires, then the CANTO flag is set . Only an
SPI command can reset the CANTO flag .
8.6.4
CANSIL Flag
The CANSIL flag in the register SWK_STAT indicates that there is no communication on the CAN bus (tSilence
timer has expired). Figure 15 defines the restart conditions for the tSilence timer.
8.6.5
SWK_ACTIVE Flag
The SWK_ACTIVE flag in the register SWK_STAT indicates that the TLT9255W is in Selective Wake Sub-Mode.
If the TLT9255W enters the Selective Wake Sub-Mode, then the SWK_ACTIVE flag is set. If the TLT9255W exits
Sleep Mode, then it resets the SWK_ACTIVE flag.
8.6.6
CFG_VAL Flag
The microcontroller sets the CFG_VAL flag in the register SWK_CTRL_1 to confirm the selective wake
configuration. This confirmation must be performed each time before a mode change to Sleep Mode by an SPI
command (Selective Wake Sub-Mode) is sent. The TLT9255W resets the CFG_VAL bit under any of the
following conditions:
•
If a mode change from Selective Wake Sub-Mode to Stand-by Mode is performed.
•
If a mode change from Selective Sleep Sub-Mode to Stand-by Mode is performed.
•
If a selective wake configuration error is detected (Chapter 8.4).
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Serial Peripheral Interface
9
Serial Peripheral Interface
The communication between the microcontroller and the transceiver is implemented via Serial Peripheral
Interface (SPI). This communication is configured as a full duplex multi slave data transfer. A valid SPI
command consists of 16 bits.
Only if VIO > VIO_UV AND if VBAT OR VCC is within the functional range, then SPI communication between the
microcontroller and the transceiver can be established. The SPI uses four interface signals for synchronization
and data transfer:
•
CSN: SPI chip select (active low)
•
SCLK: SPI clock
•
MOSI: SPI data input
•
MISO: SPI data output
Figure 42 shows the SPI data transfer.
CSN high to low: MISO is enabled (low impedance).
Status information transferred to output shift register
Min. CSN high-time to
be ensured
CSN
time
CSN low to high: data from shift register is transferred to output functions
SCLK
Data will be
shifted in
MOSI
Bit sampling will
be performed
15 14 13 12 11 10 9
time
Actual data
8
7
6
New data
5
4
3
2
1
0
15 14
time
Data will be
shifted out
MISO
Figure 42
Bit sampling will
be performed
Err 15 14 13 12 11 10 9
New status
Actual status
8
7
6
5
4
3
2
1
0
Err 15 14
SPI Data Transfer
The SPI command transmission cycle begins when the transceiver is selected by the CSN pin (active low).
When the signal of the CSN input pin returns from “low” to “high”, the TLT9255W decodes the data that was
shifted in on the MOSI. The data of MOSI and MISO is shifted in and out (MSB comes first) on every rising edge
of SCLK. The bit sampling is performed on every falling edge of SCLK. If the CSN input pin is “high”, then the
MISO pin has a high impedance. The SPI of the transceiver does not support TLT9255W daisy chaining.
The MISO pin signals invalid SPI commands (Chapter 9.5) or SPI failures (Chapter 9.4). If an invalid SPI
command OR an SPI failure occurs, then the MISO pin is “high” after the CSN pin is “low” and before a clock
starts. Chapter 9.4 defines the conditions for an SPI Error.
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Serial Peripheral Interface
9.1
SPI command format
An SPI command consists of:
•
MOSI request format
•
MISO response format
Figure 43 shows the SPI command format.
MSB
LSB
15 14 13 12 11 10
MOSI R/W
MISO
Figure 43
9
8
7
6
5
4
3
Address Bits
Data Bits
Status Information Field
Data Bits
2
1
0
Command Format of the MOSI and MISO register
MOSI Format Frame
The MOSI format frame consists of address bits (Bits 14-8) and data bits (Bits 7-0). The R/W bit (Bit15) defines
a write operation (R/W = 1) or a read (R/W = 0) operation to the addressed register. For read operations the data
bits are not relevant.
MISO Format Frame
The MISO format frame consists of the status information field (Bits 15-8) and the data bits (Bits 7-0). The data
bits contain the data of the addressed register. The status information field contains compressed information
about the Status Register (Chapter 9.3).
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Serial Peripheral Interface
9.2
Control and Status Register
There are two types of registers:
•
Control registers:
Control the behavior of the TLT9255W, for example mode change and selective wake configuration.
•
Status registers:
Status registers represent the status of the TLT9255W, for example wake events and failures. The
TLT9255W controls the bits of the status register. However, the microcontroller must reset some of these
bits. Writing “1” clears the register (w1c). In case of reading the register the address bits for the register
must be set, the R/W bit must be set to 0 and the data bits are not relevant. Writing a “1” to the specific bits
in the status register resets the status bits in the status register. Figure 44 shows this scenario.
Address Bits
R/W
Status Register
-
0
0
1
1
0
0
1
1
1
1
1
0
1
1
1
SPI Command
1
0
0
1
1
0
0
1
0
1
1
0
0
0
0
0
Status Register
after SPI
Command
-
0
0
1
1
0
0
1
1
0
0
1
0
1
1
1
Figure 44
Datasheet
Data Bits
Read and clear command
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9.3
Status Information Field
The Status Information Field informs the microcontroller that status register bits have changed. The Status
Information Field is returned during each SPI write or read command in the MISO format frame. Each bit of the
Status Information Field represents an OR operation of some bits of a specific status register. If an SPI access
occurs while the status register is being updated due to an event, the content of the Status Information Field
may not reflect the latest state of the status registers. Table 7 defines the content of the Status Information
Field.
Table 7
Status Information Field
Name
Bit Position
Reflected Bits
Reserved
0
-
TRANS_UV_STAT (Transceiver
undervoltage status)
1
VBAT_UV OR VCC_LTUV OR VCC_STUV OR
VIO_LTUV OR VIO_STUV
TEMP_STAT (Temperature status)
2
TSD OR Reserved
WAKE_STAT (Wake-up status)
3
LWU OR WUP OR WUF
TXD_TO (TxD timeout)
4
TXD_TO
CANSIL (CAN Silence)
5
CANSIL
POR (Power on Reset)
6
POR
ERR_STAT (Error status)
7
CMD_ERR or COM_ERR
The ERR_STAT is flagged on the MISO pin.
9.4
SPI Failure
The SPI bit COM_ERR signals an SPI failure. Any of the following conditions define the SPI failure:
•
Register address does not exist
•
Number of received SPI clocks is neither 0 nor 16
On SPI failure SPI commands are ignored.
9.5
Invalid SPI Command
Any attempt to write undefined bit combinations to one of the following SPI registers is an invalid SPI
command.
•
Mode of the register MODE_CTRL
•
TXD_TO of the register TXD_TO_CTRL
•
BR_RATIO of the register SWK_CTRL_2
•
BR of the register SWK_CTRL_2
•
VIO_UV_T of the register SUPPLY_CTRL
•
VCC_UV_T of the register SUPPLY_CTRL
An invalid SPI command is ignored and the CMD_ERR bit is set and signalled on the MISO pin. Only the
microcontroller can reset the CMD_ERR bit.
9.6
CSN Timeout
The CSN timeout (tCSN_TO) prevents the SPI communication from disturbance. After the CSN pin of the
TLT9255W is set to “low” (start of the SPI communication and tCSN_TO) the communication must be finished
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Serial Peripheral Interface
and the CSN pin must be set to “high” within tCSN_TO. If the tCSN_TO timeout occurs, then the TLT9255W sets the
MISO pin to high impedance. If the CSN pin is set to “high”, then the tCSN_TO is reset. Figure 45 shows this
scenario.
tCSN_TO starts
tCSN_TO starts
tCSN_TO occures
CSN
time
SCLK
time
High impedance
MISO
15 14 13
15 14 13
time
Figure 45
CSN Timeout
9.7
SPI Register
The following figure gives an overview of the SPI register.
4
Data Bit 15…8
D4
3
2
1
0
D3
D2
D1
D0
15
Access
Mode
14…8
Address
A14…A8
VBAT_CON
TXD_TO_0
VCC_UV_T_0
read/write
read/write
read/write
read/write
0000001
0000010
0000011
0000100
7
6
5
D7
D6
D5
MODE_CTRL
HW_CTRL
TXD_TO_CTRL
SUPPLY_CTRL
reserved
STTS_EN
reserved
VIO_UV_T_3
reserved
LWU_NEG
reserved
VIO_UV_T_2
reserved
LWU_POS
reserved
VIO_UV_T_1
SWK_CTRL_1
SWK_CTRL_2
SWK_ID3_CTRL
SWK_ID2_CTRL
SWK_ID1_CTRL
SWK_ID0_CTRL
SWK_MASK_ID3_CTRL
SWK_MASK_ID2_CTRL
SWK_MASK_ID1_CTRL
SWK_MASK_ID0_CTRL
SWK_DLC_CTRL
SWK_DATA7_CTRL
SWK_DATA6_CTRL
SWK_DATA5_CTRL
SWK_DATA4_CTRL
SWK_DATA3_CTRL
SWK_DATA2_CTRL
SWK_DATA1_CTRL
SWK_DATA0_CTRL
reserved
SWK_EN
reserved
IDE23/ID5
IDE15
IDE7
reserved
MASK_ID23
MASK_ID15
MASK_ID7
reserved
DATA7_7
DATA6_7
DATA5_7
DATA4_7
DATA3_7
DATA2_7
DATA1_7
DATA0_7
reserved
reserved
reserved
IDE22/ID4
IDE14
IDE6
reserved
MASK_ID22
MASK_ID14
MASK_ID6
reserved
DATA7_6
DATA6_6
DATA5_6
DATA4_6
DATA3_6
DATA2_6
DATA1_6
DATA0_6
reserved
BR_RATIO_1
IDE
IDE21/ID3
IDE13
IDE5
reserved
MASK_ID21
MASK_ID13
MASK_ID5
reserved
DATA7_5
DATA6_5
DATA5_5
DATA4_5
DATA3_5
DATA2_5
DATA1_5
DATA0_5
TRANS_STAT
TRANS_UV_STAT
ERR_STAT
POR
VBAT_UV
reserved
reserved
reserved
reserved
reserved
VCC_LTUV
reserved
WAKE_STAT
reserved
reserved
SWK_STAT
reserved
reserved
reserved
reserved
LWU_DIR
LWU
SELECTIVE WAKE STATUS REGISTERS
reserved
SYSERR
SYNC
CANTO
SWK_ECNT_STAT
reserved
reserved
Register Short Name
CONTROL REGISTERS
reserved
reserved
reserved
VIO_UV_T_0
reserved
reserved
VCC_UV_T_3
Mode
reserved
WAKE_TOG
TXD_TO_2
TXD_TO_1
VCC_UV_T_2
VCC_UV_T_1
Status Registers
Control Registers
SELECTIVE WAKE REGISTERS
Figure 46
Datasheet
reserved
BR_RATIO_0
IDE28/ID10
IDE20/ID2
IDE12
IDE4
MASK_ID28
MASK_ID20
MASK_ID12
MASK_ID4
reserved
DATA7_4
DATA6_4
DATA5_4
DATA4_4
DATA3_4
DATA2_4
DATA1_4
DATA0_4
reserved
reserved
IDE27/ID9
IDE19/ID1
IDE11
IDE3
MASK_ID27
MASK_ID19
MASK_ID11
MASK_ID3
DLC_3
DATA7_3
DATA6_3
DATA5_3
DATA4_3
DATA3_3
DATA2_3
DATA1_3
DATA0_3
reserved
BR_2
IDE26/ID8
IDE18/ID0
IDE10
IDE2
MASK_ID26
MASK_ID18
MASK_ID10
MASK_ID2
DLC_2
DATA7_2
DATA6_2
DATA5_2
DATA4_2
DATA3_2
DATA2_2
DATA1_2
DATA0_2
reserved
BR_1
IDE25/ID7
IDE17
IDE9
IDE1
MASK_ID25
MASK_ID17
MASK_ID9
MASK_ID1
DLC_1
DATA7_1
DATA6_1
DATA5_1
DATA4_1
DATA3_1
DATA2_1
DATA1_1
DATA0_1
CFG_VAL
BR_0
IDE24/ID6
IDE16
IDE8
IDE0
MASK_ID24
MASK_ID16
MASK_ID8
MASK_ID0
DLC_0
DATA7_0
DATA6_0
DATA5_0
DATA4_0
DATA3_0
DATA2_0
DATA1_0
DATA0_0
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
0000101
0000110
0000111
0001000
0001001
0001010
0001011
0001100
0001101
0001110
0001111
0010000
0010001
0010010
0010011
0010100
0010101
0010110
0010111
TXD_TO
reserved
reserved
TSD
VIO_LTUV
COM_ERR
reserved
VIO_STUV
CMD_ERR
read/clear
read/clear
read/clear
0011000
0011001
0011010
WUP
WUF
read/clear
0011011
CANSIL
SWK_ACTIVE
read
0011100
ECNT_1
ECNT_0
read
0011101
STATUS REGISTERS
ECNT_5
reserved
VCC_STUV
reserved
ECNT_4
reserved
reserved
reserved
ECNT_3
ECNT_2
Register overview
53
Rev. 1.0
2019-10-08
TLT9255WLC
HS CAN Transceiver with Partial Networking
Serial Peripheral Interface
9.7.1
Mode Control Register
MODE_CTRL
Mode Control
(01H)
7
6
5
4
Reset Value:0002H
3
2
1
Reserved
Mode
rw
rw
Field
Bits
Type
Description
Reserved
7:4
rw
Reserved
Mode
3:0
rw
Mode1)2)
0001B, Sleep Mode
0010B, Standby Mode
0100B, Receive Only Mode
1000B, Normal Operation Mode
0
1) Internal state transitions have higher priority than mode change SPI commands
2) The Mode bits are a reflection of the state of the transceiver which includes internal state transitions
HW_CTRL
Hardware Control
(02H)
7
6
5
4
STTS_EN
LWU_NEG
LWU_POS
rw
rw
rw
Reset Value:00E1H
3
2
1
0
Reserved
WAKE_TOG
VBAT_CON
rw
rw
rw
Field
Bits
Type
Description
STTS_EN
7
rw
State transition to Sleep WUP Sub-Mode if a VCC < VCC_UV AND
t > tVCC_UV_T AND tSilence has expired
0B , State transition will not be performed
1B , State transition will be performed
LWU_NEG
6
rw
Local wake-up direction
0B , Local wake-up will not be performed on the negative edge
1B , Local wake-up will be performed on the negative edge
LWU_POS
5
rw
Local wake-up direction
0B , Local wake-up will not be performed on the positive edge
1B , Local wake-up will be performed on the positive edge
Reserved
4:2
rw
Reserved
WAKE_TOG
1
rw
Toggle RxD Pin if a wake-up event is detected
0B , The RxD Pin will be constant “low”
1B , The RxD Pin will toggle between “low” and “high”
Datasheet
54
Rev. 1.0
2019-10-08
TLT9255WLC
HS CAN Transceiver with Partial Networking
Serial Peripheral Interface
Field
Bits
Type
Description
VBAT_CON
0
rw
Transceiver is connected with the battery
0B , INH pin will not be switched off by entering the sleep mode,
VBAT_UV is disabled
LWU is disabled
1B , INH pin will be switched off by entering the sleep mode
VBAT_UV is enabled
LWU is enabled
Datasheet
55
Rev. 1.0
2019-10-08
TLT9255WLC
HS CAN Transceiver with Partial Networking
Serial Peripheral Interface
TXD_TO_CTRL
TXD Timeout Control
7
(03H)
6
5
4
Reset Value:0001H
3
0
TXD_TO
rw
rw
Bits
Type
Description
Reserved
7:3
rw
Reserved
TXD_TO
2:0
rw
TXD Timeout (min - max)
001B , 1 - 4 ms
010B , 2 - 8 ms
011B , 5 - 10 ms
100B , disabled
SUPPLY_CTRL
Supply Control
(04H)
6
5
4
Reset Value:00CCH
3
2
1
VIO_UV_T
VCC_UV_T
rw
rw
Field
Bits
Type
Description
VIO_UV_T
7:4
rw
VIO Undervoltage Detection Timer1)
0001B, 100 ms
0010B, 200 ms
0011B, 300 ms
0100B, 400 ms
0101B, 500 ms
0110B, 600 ms
0111B, 700 ms
1000B, 800 ms
1001B, 900 ms
1010B, 1000 ms
1011B, 1100 ms
1100B, 1200 ms
1101B, 1300 ms
1110B, 1400 ms
1111B, 1500 ms
Datasheet
1
Reserved
Field
7
2
56
0
Rev. 1.0
2019-10-08
TLT9255WLC
HS CAN Transceiver with Partial Networking
Serial Peripheral Interface
Field
Bits
Type
Description
VCC_UV_T
3:0
rw
VCC Undervoltage Detection Timer1)
0001B, 100 ms
0010B, 200 ms
0011B, 300 ms
0100B, 400 ms
0101B, 500 ms
0110B, 600 ms
0111B, 700 ms
1000B, 800 ms
1001B, 900 ms
1010B, 1000 ms
1011B, 1100 ms
1100B, 1200 ms
1101B, 1300 ms
1110B, 1400 ms
1111B, 1500 ms
1) The derivation of the value can be +/- 40%
Datasheet
57
Rev. 1.0
2019-10-08
TLT9255WLC
HS CAN Transceiver with Partial Networking
Serial Peripheral Interface
9.7.2
Selective Wake Control Register
SWK_CTRL_1
Selective Wake Control
7
(05H)
6
5
4
Reset Value:0000H
3
2
0
Reserved
CFG_VAL
rw
rw
Field
Bits
Type
Description
Reserved
7:1
rw
Reserved
CFG_VAL
0
rw
Selective Wake Configuration valid
0B , Invalid
1B , Valid
Datasheet
1
58
Rev. 1.0
2019-10-08
TLT9255WLC
HS CAN Transceiver with Partial Networking
Serial Peripheral Interface
SWK_CTRL_2
Baudrate Control
(06H)
5
4
Reset Value:0004H
7
6
3
2
1
SWK_EN
Reserved
BR_RATIO
Reserved
BR
rw
rw
rw
rw
rw
0
Field
Bits
Type
Description
SWK_EN
7
rw
Selective Wake Unit
0B , Disabled
1B , Enabled
Reserved
6
rw
Reserved
BR_RATIO
5:4
rw
Baudrate ratio from arbitration phase to CAN FD data phase
00B , Ratio