WCDSC006XUMA1

WCDSC006 EiceDRIVER™ WCDSC006 Features • • • • • Independent High Side and Low Side TTL logic inputs 0.3 V to 7 V Input pin capability for increased robustness Integrated bootstrap diode Maximum bootstrap voltage of 60 V 2 A source/4 A sink current capability for high and low side drivers Potential applications • • Inductive wireless charger Qualified according Jedec Standard Product validation Qualified for industrial applications according to the relevant tests of JEDEC47/20/22. Description The WCDSC006 is a half bridge driver designed to drive both high-side and low-side MOSFETs in a half-bridge inverter configuration. The floating high-side driver is capable of driving a high-side MOSFET operating up to 60 V bootstrap voltage. The high-side bias voltage is generated using a bootstrap technique. The inputs of the driver are TTL logic compatible and can withstand input voltages up to 7 V regardless of the VDD voltage. Even though high-side and low-side power device are driven independently, the driver enforces a 5 ns (typ) deadtime to prevent shoot-through. The WCDSC006 is available in PG-WSON-10 pins, with exposed pad, connected to ground, to aid power dissipation. VIN 4.75V...5.5V VDD HB RGHS HO HI CBOOT Q2 HS uController L WCDSC00 6 RGLS LI Datasheet RLOAD LO PGND Figure 1 C Q1 Typical application www.infineon.com Please read the Important Notice and Warnings at the end of this document V2.2 2020-05-28 EiceDRIVER™ WCDSC006 Description Packages Ordering information Base Part Number Package Type Standard Pack Form WCDSC006 Datasheet PG-WSON-10 Quantity Tape and Reel 6000 2 Orderable Part Number Marking Code WCDSC006XUMA1 EDrWCDS006 V2.2 2020-05-28 EiceDRIVER™ WCDSC006 Table of contents Table of contents Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Potential applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Product validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1 Block diagram reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 2.1 2.2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 3.1 3.2 3.3 3.4 3.5 Electrical characteristics and parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Static electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Dynamic electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal mechanical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 Timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Driver outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Undervoltage Lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Minimum On Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Bootstrap capacitor design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Anti-shoot through protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Layout recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7 7.1 7.2 7.3 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Outline dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Boardpads and apertures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Marking code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Datasheet 3 V2.2 2020-05-28 EiceDRIVER™ WCDSC006 1 Block diagram reference 1 Block diagram reference A simplified functional block diagram is given in the figure below. HB VDD HS Driver HB UVLO LS Driver BANDGAP & REFERENCE LV Domain VDD3V0 3.3V Regulator POR HO driver HV Level Shift POR HS HI PWM_HS RIN DEAD-TIME CONTROL PADS VDD VDD PWM_LS LI VDD UVLO RIN driver LV Level Shift LO PGND N.C. Figure 2 Datasheet N.C. VSS Block diagram 4 V2.2 2020-05-28 EiceDRIVER™ WCDSC006 2 Pin configuration 2 Pin configuration 2.1 Pin assignment VDD 1 10 LO HB 2 9 VSS HO 3 8 LI HS 4 7 HI NC 5 6 Exposed Pad Figure 3 Pin configuration PG-WSON-10, top view 2.2 Pin definitions and functions Table 1 Pin definitions and functions Pin Symbol Function 1 VDD Gate drive supply 2 HB High Side gate driver bootstrap rail 3 HO High Side gate driver source and sink current output 4 HS High Side FET source connection 5 NC Not connected 6 NC Not connected 7 HI High Side driver control input 8 LI Low Side driver control input 9 VSS Ground return 10 LO Low Side gate driver source and sink current output Datasheet 5 NC V2.2 2020-05-28 EiceDRIVER™ WCDSC006 3 Electrical characteristics and parameters 3 Electrical characteristics and parameters 3.1 Absolute maximum ratings Table 2 Absolute maximum ratings Stresses above the listed values may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Parameter Symbol Values Min. Unit Max. Note or Test Condition High Side Bootstrap Voltage DC rating VHB – 60 V Bootstrap Supply Voltage VHB to VHS -0.3 7 V TC = 25°C Driver Supply Voltage VDD to VSS -0.3 7 V TC = 25°C Phase voltage to ground VHS -(9-VDD) VHB+0.3 V Input voltage on HI and LI VHI, VLI -0.3 6 V Storage Temperature TS -55 150 °C Junction Temperature Tj -55 150 °C 3.2 Recommended operating conditions Table 3 Recommended operating conditions The following operating conditions must not be exceeded in order to ensure correct operation and reliability of the device. All parameters specified in the following tables refer to these operating conditions, unless noted otherwise. Parameter Symbol Values Min. Typ. Unit Max. Phase Voltage to PGND VHS -(8-VDD) – VHB-VDD V Driver Supply Voltage VDD 4.75 – 5.5 V High Side Bootstrap Voltage VHB – – 50 V Junction Temperature TJ -40 – +125 °C Input voltage on HI and LI VHI, VLI 0 – 5.5 V 3.3 Note or Test Condition Static electrical characteristics Table 4 Static electrical characteristics VDD = VHB = 5 V, VHS = VSS = 0 V, TC = 25°C unless otherwise specified. The VIN and IIN parameters are referenced to VSS. Parameter Symbol Values Min. VDD Supply UVLO Rising Threshold Datasheet UVLOVDD 3.7 6 Typ. 4.1 Unit Max. 4.5 Note or Test Condition V V2.2 2020-05-28 EiceDRIVER™ WCDSC006 3 Electrical characteristics and parameters Table 4 Static electrical characteristics (continued) VDD = VHB = 5 V, VHS = VSS = 0 V, TC = 25°C unless otherwise specified. The VIN and IIN parameters are referenced to VSS. Parameter Symbol Values Min. Unit Typ. Max. Note or Test Condition VDD Supply UVLO Threshold Hysteresis UVLOVDD,hys – 0.2 – V VHB Supply UVLO Rising Threshold UVLOHB 3.5 3.9 4.3 V VHB Supply UVLO Threshold Hysteresis UVLOHB,hys – 0.2 – V Boot voltage Quiescent Current IQHB – - 200 µA VLI = VHI = 0 V Boot voltage Operating Current IOHB – 3.3 - mA f = 500 kHz CLOAD = 1 nF VDD Quiescent Current IQDD – - 400 µA VLI = VHI = 0 V VDD Operating Current IODD – 3.6 - mA f = 500 kHz CLOAD = 1 nF Input voltage high (HI and LI) VH 2.3 2.6 V Input voltage low (HI and LI) VL 1.3 1.5 – V Input voltage Hysteresis VHYST – 0.8 – V Input Pulldown Resistance RIN - 200 - kΩ Peak Source current (HO and LO)(1) IOHL – 2 – A Peak Sink Current (HO and LO)(1) IOLL – 4 – A Pull down resistance RPD – 0.43 0.8 Ω Pull up resistance RPU – 1.07 2 Ω Bootstrap diode dynamic resistance RD – 2.7 - Ω IVDD-HB = 100 mA IVDD-HB = 1 mA Bootstrap forward voltage VD – 0.93 1.3 V IVDD-HB = 100 mA Bootstrap diode revers recovery time(1) Trr – 50 – ns IF = 20 mA IRR = 500 mA TC = 25°C Unit Note or Test Condition (1) No subject of final test 3.4 Dynamic electrical characteristics Table 5 Dynamic electrical characteristics VDD = VHB = 5 V, VHS = VSS = 0 V, TC = 25°C unless otherwise specified. Parameter Symbol Values Min. Turn on and Turn off propagation delay of Hi and Low(1) Datasheet TLH/THL – 7 Typ. 40 Max. - ns V2.2 2020-05-28 EiceDRIVER™ WCDSC006 3 Electrical characteristics and parameters Table 5 Dynamic electrical characteristics (continued) VDD = VHB = 5 V, VHS = VSS = 0 V, TC = 25°C unless otherwise specified. Parameter Symbol Values Min. Typ. Unit Note or Test Condition Max. The delay matching LI to LO and HI to HO, both rising and falling(2) DELM – 1 8 ns Gate Driver; VLI = 0 V & VHI = 5 V with no external deadtime Minimum dead time between HI, LI(2) Tdeadtime – 5 – ns CLOAD = 0 nF Minimum input pulse width that changes the output Tpw – – 20 ns HO rise time THRC – 3 - ns LO rise time TLRC – 3 - ns HO fall time THFC – 2 - ns LO fall time TLFC – 2 - ns (1) (2) A transient detector blocks the toggling of the high side output when it detects moving phase node (due to transition and/or oscillation). It prevents unwanted re-toggling but may increase propagation delay. See Figure 6 and Figure 7 for more information and link to Understanding the transient detector (References) for more information. No subject of final test 3.5 Thermal mechanical characteristics Table 6 Thermal mechanical characteristics Parameter Symbol Values Min. Junction to Case Thermal Resistance Device on PCB (1) CLOAD = 1 nF RthJC RthJA Typ. Unit Note or Test Condition Max. – 7 – °C/W Bottom – 20 – °C/W Top – 40 – °C/W 6 cm2 cooling area(1) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB vertical in still air. Datasheet 8 V2.2 2020-05-28 EiceDRIVER™ WCDSC006 4 Timing diagrams 4 Timing diagrams 3.3V/5.0V 3.3V/5.0V HI LI VSS ΔtIN VSS ΔtIN HB HO VDD LO HS tLH PGND tHL tLH tHL ΔtOUT Figure 4 Propagation delay 5.0V VDD ΔtOUT 5.0V 4.1V 3.9V ≈ HB ≈ 90%~3.7V HO 10%~0.39V 0V Figure 5 ≈ 0V 90%~3.6V 10%~0.38V UVLO behavior Transient detector Response Inactive Active Slew Rate Threshold dv/dt Figure 6 Transient detector response Figure 7 Transient detector slew rate thresholds vs. temperature Datasheet 3.8V 0V 0V LO 4.0V ≈ 9 V2.2 2020-05-28 EiceDRIVER™ WCDSC006 5 Typical characteristics 5 Datasheet Typical characteristics 10 V2.2 2020-05-28 EiceDRIVER™ WCDSC006 5 Typical characteristics Datasheet 11 V2.2 2020-05-28 EiceDRIVER™ WCDSC006 5 Typical characteristics Datasheet 12 V2.2 2020-05-28 EiceDRIVER™ WCDSC006 6 Functional description 6 Functional description 6.1 Introduction The WCDSC006 is a fast Half-Bridge driver for both high-side and low-side MOSFETs in a wireless charging halfbridge inverter configuration. The focus on robustness at the input and output side additionally gives this device a safety margin in critical abnormal situations. All outputs are robust against reverse current. The interaction with the power MOSFET, even reverse reflected power will be handled by the strong internal output stage. All inputs are compatible with LV-TTL signal levels, signal delays and rise/fall times have been minimized. 6.2 Supply voltage The absolute maximum supply voltage is 7 V. The minimum operating supply voltage is set by the undervoltage lockout function to a typical default value of 4.1 V. This lockout function protects power MOSFETs from running into linear mode with subsequent high power dissipation. 6.3 Driver outputs This driver output stage has a shoot through protection and current limiting behavior. After a switching event, current limitation is raised up to achieve the typical current peak for an excellent fast reaction time of the following power MOS transistor. The output impedance is very low with a typical value below 1.07 Ω for the sourcing p-channel MOS and 0.43 Ω for the sinking n-channel MOS transistor. Gate Drive Outputs held active low in case of floating inputs VHI, VLI or during startup or power down once UVLO is not exceeded. Under any situation, startup, UVLO or shutdown, outputs are held under defined conditions. 6.4 Undervoltage Lockout (UVLO) The Undervoltage Lockout function ensures that the output can be switched to its high level only if the supply voltage exceeds the UVLO threshold voltage. Thus it can be guaranteed, that the switch transistor is not switched on if the driving voltage is too low to completely switch it on, thereby avoiding excessive power dissipation. The UVLO level is set to a typical value of 4.1 V. The max value of the rising edge is the value that ensures all the device among the production will be turned on during start up; that means designers have to provide a voltage higher than 4.5 V to turn on all the devices in the production of their equipment within the specified temperature range. On the opposite side the minimum voltage necessary to switch off all the devices is the minimum of the falling edge. Therefore to be sure that all the devices in production will be turned off, in the specified temperature range, a voltage lower than 3.5 V has to be provided. The hysteresis is the voltage gap between rising edge and falling edge. The UVLO function is implemented for both VDD and HB; this ensures some margin on noise effect, like false turn off. For instance a negative glitch smaller than the hysteresis will not have effect on the device preventing an unwanted turn off. 6.5 Input configuration The inputs HI and LI control two PWM channels. The input signal is transferred non-inverted to the corresponding gate driver outputs HO and LO. All inputs are compatible with LV-TTL threshold levels and provide a hysteresis of typ. 0.8 V. The hysteresis is independent of the supply voltage VDD. The PWM inputs are internally pulled down to a logic low voltage level (GND). In case the PWM-controller signals have an undefined state during the power-up sequence, the gate driver outputs are forced to the "off"-state(low). Table 7 shows the truth table of the device once the two UVLOs are turned on; in case the VDD-GND voltage or the HB-HS voltage is below the UVLO threshold the corresponding output will be low. Datasheet 13 V2.2 2020-05-28 EiceDRIVER™ WCDSC006 6 Functional description Table 7 Truth table with VDD-GND and HB-HS higher than UVLO threshold HI LI HO LO Notes H H n.a. n.a. See note on the anti shoot-through protection H L H L L L L L L H L H X X L L 6.6 Minimum On Time The minimum On time is the minimum duration of the input pulse which is generating an output pulse. The upper limit is the pulse width at which all the drivers in production will provide an output signal. In other words the designer has to provide a pulse width longer than the upper limit of the minimum on time to ensure an output pulse for every driver of their equipment. The upper limit of this parameter is determining the maximum switching frequency of the converter according to the formula: tSWmax = (1) V IN × tONmax × k V OUT Where VIN is the input voltage, VOUT is the desired output voltage tONmax is the upper limit of the minimum on time and k is the transformer ratio. There is a nonlinear transfer function between the inputs (HI, LI) and the outputs gate signals (HO, LO) represented in Figure 8. TONout 40ns 30ns 20ns Figure 8 30ns 40ns TONin Input output transfer characteristic For input pulses shorter than 20 ns pulse width (the grey area) the driver does not guarantee that the input pulse will be transferred to the output, depending on the device the input pulse might go through and generate an output pulse or it might not go through and therefore not generating an output pulse. For input pulses with pulse width smaller than 30 ns the output pulse is kept to 30 ns, then the response will be linear (shifted by the propagation delay). This is diagram is illustrative only with typical value. Actual value and pulse width distortion is subject to process variation. Output pulse width could in some case be shortened or extended to prevent retoggling. See propagation delay parameter footnote. Datasheet 14 V2.2 2020-05-28 EiceDRIVER™ WCDSC006 6 Functional description Table 8 Table 2 Output pulse width vs input pulse width Input pulse width Output pulse width Smaller than 20 ns • • In the case the driver is capable to transfer the pulse, the output pulse width is 30 ns In case the driver is not capable of responding the output pulse is 0 ns Between 20 ns and 30 ns • The output pulse width is 30 ns Above 30 ns • The output pulse width is equal to input pulse width 6.7 Bootstrap capacitor design The bootstrap capacitor is used to power the floating driver of the high side MOSFET. Therefore it has to provide the surge current and the charge to turn on the high side MOSFET. Normally a criteria to choose the minimum necessary boot capacitor is based on the gate charge of the high side and allowed ripple voltage across the boot capacitor, according to the following formula: CBOOTmin ≥ QG ΔV (2) Where QG is the gate charge of the high side MOSFET and ΔV is the desired ripple voltage. Normally a rule of thumb for the ripple voltage is to have it smaller than 10% than the bootstrap voltage. This is a simplified formula which does not consider the leakage current of the floating driver, the bootstrap diode forward voltage but it is correct for most of the applications. There is also an upper limit in the selection of the capacitor since a too big capacitor would lead to higher charging time which could result in startup issues due to the UVLO triggering. This problem can arise if the switching frequency is very high and therefore the time to charge the bootstrap is too short. For this kind of issues there is not a clear formula to apply, but some generic rules can be considered compatible with the CBOOTmin calculation: • The higher the switching frequency the smaller should be the bootstrap capacitor • The higher the MOSFET RDS(ON) the smaller should be the bootstrap capacitor • The higher the VDD the smaller should be the bootstrap capacitor (considering a fixed ripple voltage percentage) 6.8 Anti-shoot through protection In order to prevent conditions where the high side MOSFET and the low side MOSFET are turned on at the same time an anti-shoot through logic is implemented with an addition of 3 ns deadtime. In other words the first input detected high, for instance HI will set the HO output high, meanwhile the LI will be inhibited until the HI input will not expire, then LI signal will be passed with additional 3 ns deadtime safety. This logic prevents the HI and LI to be driven by the same signal. In this case the internal logic will select the “first” pulse coming in (depending on the specific parasitic of the device, the selection of the “first” signal might change) and inhibit the “second”. This logic is not suitable for driving parallel MOSFET with HO and LO. 6.9 Layout recommendations The combination of the driver and MOSFETs forms the power trains of the converter. The relative location on the PCB of those two components together with the input capacitor is essential to reach high level of performance. The parasitic inductances of the PCB and of the power devices’ packaging (both upper and lower MOSFETs) can cause serious efficiency degradation due to dynamic effects. Careful layout can help minimize such unwanted effects. The following advices are meant to lead to an optimized layout: Datasheet 15 V2.2 2020-05-28 EiceDRIVER™ WCDSC006 6 Functional description 1. 2. 3. 4. Keep decoupling loops (VDD-GND and HB-HS) as short as possible Minimize trace inductance, especially on low impedance lines. All power traces (HO, HS, LO, PGND, VDD) should be short and wide, as much as possible The HS node should also be short and wide. Minimize the distance between the HS node and both the high side MOSFET source and the low side MOSFET drain to avoid efficiency losses minimize the current loop of the output and input power trains. Short the source connection of the lower MOSFET to ground as close to the transistor pin as feasible. Input capacitors (especially ceramic decoupling) should be placed as close to the drain of upper and source of lower MOSFETs as possible To optimize heat spreading, copper should be placed directly underneath the IC whether it has an exposed pad or not. The copper area can be extended beyond the bottom area of the IC and/or connected to buried copper plane(s) with thermal vias. This combination of vias for vertical heat escape, extended copper plane, and buried planes for heat spreading allows the IC to achieve its full thermal potential Datasheet 16 V2.2 2020-05-28 EiceDRIVER™ WCDSC006 7 Package information 7 Package information 7.1 Outline dimensions Datasheet 17 V2.2 2020-05-28 EiceDRIVER™ WCDSC006 7 Package information Datasheet 18 V2.2 2020-05-28 EiceDRIVER™ WCDSC006 7 Package information 7.2 Datasheet Boardpads and apertures 19 V2.2 2020-05-28 EiceDRIVER™ WCDSC006 7 Package information 7.3 Datasheet Marking code 20 V2.2 2020-05-28 EiceDRIVER™ WCDSC006 8 References 8 1. References Infineon, Understanding the transient detector, Infineon Technologies AG, Neubiberg 2020 Datasheet 21 V2.2 2020-05-28 EiceDRIVER™ WCDSC006 Revision history Revision history Document version Date of release Description of changes V2.2 2020-05-28 • • Update of typical value of DELM in Dynamic electrical characteristics Typical characteristics added V2.1 2020-04-22 • Update to new template V2.0 2019-09-17 • Initial release Datasheet 22 V2.2 2020-05-28 Trademarks All referenced product or service names and trademarks are the property of their respective owners. Edition 2020-05-28 Published by Infineon Technologies AG 81726 Munich, Germany © 2020 Infineon Technologies AG All Rights Reserved. Do you have a question about any aspect of this document? Email: erratum@infineon.com Document reference IFX-ykn1580889052252 IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”) . With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.