EUP3482DIR1

EUP3482 2A, 30V, 340KHz Synchronous Step-Down Converter DESCRIPTION FEATURES The EUP3482 is a synchronous current mode buck regulator capable of driving 2A continuous load current with excellent line and load regulation. The EUP3482 can operate with an input range 4.5V to 30V and the output can be externally set from 0.923V to 20V with a resistor divider.











Fault condition protection includes cycle-by-cycle current limiting and thermal shutdown. In shutdown mode the regulator draws 1µA of supply current. Programmable soft-start minimizes the inrush supply current and the output overshoot at initial startup. The EUP3482 require a minimum number of external components.

2A Output Current 220ns Minimum On Time 35V Input Surge Protection Integrated 160mΩ/110mΩ DMOS Switches 4.5V to 30V Input Operating Range Output Adjustable from 0.923V to 20V Up to 95% Efficiency 1µA Shutdown Current Fixed 340KHz Frequency Programmable Soft-Start Thermal Shutdown and Overcurrent Protection Input Supply Overvoltage and Undervoltage Lockout Available in SOP-8 Package RoHS Compliant and 100% Lead(Pb)-Free Halogen-Free APPLICATIONS



Typical Application Circuit Distributed Power Systems Networking Systems PC Monitors Portable Electronics Figure 1. 12V to 3.3V/5V Application Circuit DS3482 Ver1.3 Feb. 2011 1 EUP3482 Typical Application Circuit (continued) Figure2. 24V to 3.3V/5V Application Circuit Pin Configurations Package Type Pin Configurations SOP-8 Pin Description PIN PIN NAME 1 BS 2 IN 3 SW 4 GND 5 FB 6 COMP 7 EN 8 SS DS3482 Ver1.3 Feb. 2011 DESCRIPTION High-Side Gate Drive Boost Input. BS supplies the drive for the high-side N-Channel DMOS switch. Connect a 0.01µF or greater capacitor from SW to BS to power the high side switch. Input Supply Pin. IN supplies the power to the IC, as well as the step-down converter switches. Drive IN with a 4.5V to 30V power source. Bypass IN to GND with a suitably large capacitor to minimize input ripple to the IC. See Input Capacitor Section of the applications notes. Power Switching Output. Connect the output LC filter from SW to the output load. Ground. Output Feedback Input. FB senses the output voltage and regulates it. Drive FB with a resistive voltage divider connected to it from the output voltage. The feedback threshold is 0.923V. See Setting the Output Voltage. Loop compensation Input. Connect a series RC network from COMP to GND to compensate the regulation control loop. See Compensation. Enable Input. EN is a logic input that controls the regulator on or off. Drive EN high to turn on the regulator; low to turn it off. Don’t leave EN pin floating. Directly connect EN to IN (or through a resistance) for automatic startup. Soft-Start Control Input. Connect an external capacitor to program the soft-start. If unused, leave it open, which means internal soft-start function. 2 EUP3482 Ordering Information Order Number Package Type Marking Operating Temperature Range EUP3482DIR1 SOP-8 xxxxx P3482 -40 °C to +85°C EUP3482 □ □ □ □ Lead Free Code 1: Lead Free, Halogen-Free 0: Lead Packing R: Tape & Reel Operating temperature range I: Industry Standard Package Type D: SOP Block Diagram Figure 3.Functional Block Diagram DS3482 Ver1.3 Feb. 2011 3 EUP3482 Absolute Maximum Ratings (1) Supply Voltage (VIN) -------------------------------------------------------- -0.3V to +35V Enable Voltage (V EN ) ------------------------------------------------------ -0.3V to +35V Switch Voltages (VSW) ------------------------------------------------------ -1V to VIN +0.3V Boot Voltage (VBS) -------------------------------------------------- VSW -0.3V to VSW +6V All Other Pins ---------------------------------------------------------------------- -0.3V to +6V Junction Temperature -------------------------------------------------------------------- 150°C Lead Temperature -------------------------------------------------------------- 260°C Storage Temperature -------------------------------------------------------- -65°C to +150°C Output Voltage VOUT ----------------------------------------------------------- 0.923V to 20V Thermal Resistance θJA (SOP-8) ---------------------------------------------------------------- 125°C /W           Recommend Operating Conditions (2) Input Voltage VIN --------------------------------------------------------------------4.5V to 30V Ambient Operating Temp ----------------------------------------------------- -40°C to +85°C Note(1):Stress beyond those listed under “Absolute Maximum Ratings” may damage the device. Note(2):The device is not guaranteed to function outside the recommended operating conditions.   Electrical Characteristics The ● denote specifications which apply over the full operating temperature range, otherwise specification are VIN=12V , TA=25°C unless otherwise specified. Parameter Conditions Shutdown Supply Current Supply Current VEN=0V VFB=1V Feedback Voltage 4.5 ≤ VIN ≤ 30V Min. ● 0.905 0.895 Error Amplifier Voltage Gain EUP3482 Typ. Max. 1 0.45 0.923 0.923 5 0.9 0.941 0.951 Unit µA mA V 360 V/V 800 µA/V High-Side Switch On-Resistance 160 mΩ Low-Side Switch On-Resistance 110 mΩ Error Amplifier Transconductance ∆IC = ±10µA High-Side Switch Leakage Current VEN=0V, VSW=0V Upper Switch Current Limit Minimum Duty Cycle Lower Switch Current Limit COMP to Current Sense Transconductance Oscillation Frequency From Drain to Source Short Circuit Oscillation Frequency Maximum Duty Cycle VFB=0V VFB=0.7V EN Lockout Threshold Hysteresis Input Under Voltage Lockout Threshold Input Over Voltage Lockout Threshold Input Over Voltage Lockout Threshold Hysteresis Soft-Start Charge Current Thermal Shutdown DS3482 Ver1.3 Feb. 2011 VEN Rising VIN Rising VIN Rising 3.5 A 300 1.1 7.5 340 A A/V KHz 380 4 KHz % ● 0.36 2.3 1.5 2.5 2.0 2.8 ● 2 2.5 210 4.1 35 3 3.8 VSS=0V µA 2.5 110 90 EN Disable Threshold EN Lockout Threshold 5 4.4 V V mV V V 2 V 6 160 µA °C EUP3482 Typical Operating Characteristics (See Figure1, C1 =10µF, C2=22µF × 2, L=10µH, TA=+25°C) DS3482 Ver1.3 Feb. 2011 5 EUP3482 Typical Operating Characteristics (continued) (See Figure1, C1 =10µF, C2=22µF × 2, L=10µH, TA=+25°C) DS3482 Ver1.3 Feb. 2011 6 EUP3482 Typical Operating Characteristics (continued) (See Figure1, C1 =10µF, C2=22µF × 2, L=10µH, TA=+25°C) DS3482 Ver1.3 Feb. 2011 7 EUP3482 Functional Description Inductor The EUP3482 regulates input voltages from 4.5V to 30V down to an output voltage as low as 0.923V, and supplies up to 2A of load current. The EUP3482 uses current-mode control to regulate the output voltage. The output voltage is measured at FB through a resistive voltage divider and amplified through the internal transconductance error amplifier. The voltage at the COMP pin is compared to the switch current (measured internally) to control the output voltage. The converter uses internal N-Channel MOSFET switches to step-down the input voltage to the regulated output voltage. Since the high side MOSFET requires a gate voltage greater than the input voltage, a boost capacitor connected between SW and BS is needed to drive the high side gate. The boost capacitor is charged from the internal 5V rail when SW is low. When the FB pin voltage exceeds 15% of the nominal regulation value of 0.923V, the over voltage comparator is tripped and forcing the high-side switch off. The inductor is required to supply constant current to the load while being driven by the switched input voltage. A larger value inductor will result in less ripple current that will in turn result in lower output ripple voltage. However, the larger value inductor will have a larger physical size, higher series resistance, and/or lower saturation current. A good rule for determining inductance is to allow the peak-to-peak ripple current to be approximately 30% of the maximum switch current limit. Also, make sure that the peak inductor current is below the maximum switch current limit. The inductance value can be calculated by:  V  V OUT ∗  1 − OUT    f ∗ ∆I V S L  IN  Where VOUT is the output voltage, VIN is the input voltage, fS is the switching frequency, and ∆IL is the peak-to-peak inductor ripple current. Choose an inductor that will not saturate under the maximum inductor peak current, calculated by: L= Application Information  V  V OUT OUT   I =I + ∗ 1− LP LOAD 2 ∗ f ∗ L   V S IN   Where ILOAD is the load current. The choice of which style inductor to use mainly depends on the price vs. size requirements and any EMI constraints. Optional Schottky Diode During the transition between the high-side switch and low-side switch, the body diode of the low-side power MOSFET conducts the inductor current. The forward voltage of this body diode may be high and cause efficiency loss. An optional small 1A Schottky diode B130 in parallel with low-side switch is recommended to improve overall efficiency when input voltage is higher. Input Capacitor The input current to the step-down converter is discontinuous, therefore a capacitor is required to supply the AC current while maintaining the DC input voltage. Use low ESR capacitors for the best performance. Ceramic capacitors are preferred, but tantalum or low-ESR electrolytic capacitors will also suffice. Choose X5R or X7R dielectrics when using ceramic capacitors. Since the input capacitor (C1) absorbs the input switching current, it requires an adequate ripple current rating. The RMS current in the input capacitor can be estimated by: V  V  OUT ∗  1 − OUT  I =I ∗ C1 LOAD   V V IN IN   Setting the Output Voltage The output voltage is set using a resistive voltage divider connected from the output voltage to FB. The voltage divider divides the output voltage down to the feedback voltage by the ratio: R2 VFB = VOUT R1 + R2 Thus the output voltage is: R1 + R 2 VOUT = 0.923 ∗ R2 R2 can be as high as 100kΩ, but a typical value is 10kΩ. Using the typical value for R2, R1 is determined by: ( ) R1 = 10 .83 ∗ VOUT − 0.923 (kΩ) For example, for a 3.3V output voltage, R2 is 10kΩ and R1 is 26.1kΩ. Table1 lists recommended resistance values of R1 and R2 for standard output voltages. Table 1. VOUT 1.8V 2.5V 3.3V 5V 12V DS3482 Ver1.3 Feb. 2011 R1 9.53kΩ 17.4kΩ 26.1kΩ 44.2kΩ 120kΩ R2 10kΩ 10kΩ 10kΩ 10kΩ 10kΩ 8 EUP3482 The characteristics of the output capacitor also affect the stability of the regulation system. The EUP3482 can be optimized for a wide range of capacitance and ESR values. The worst-case condition occurs at VIN = 2VOUT, where IC1 = ILOAD/2. For simplification, use an input capacitor with a RMS current rating greater than half of the maximum load current. The input capacitor can be electrolytic, tantalum or ceramic. When using electrolytic or tantalum capacitors, a small, high quality ceramic capacitor, i.e. 0.1µF, should be placed as close to the IC as possible. When using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at input. The input voltage ripple for low ESR capacitors can be estimated by: I  V  V ∆V = LOAD ∗ OUT ∗  1 − OUT  IN C1 ∗ f V IN  V IN  S Where C1 is the input capacitance value. Compensation Components EUP3482 employs current mode control for easy compensation and fast transient response. The system stability and transient response are controlled through the COMP pin. COMP is the output of the internal transconductance error amplifier. A series capacitorresistor combination sets a pole-zero combination to govern the characteristics of the control system. The DC gain of the voltage feedback loop is given by: V A VDC = R LOAD ∗ G CS ∗ A EA ∗ FB VOUT For simplification, choose the input capacitor whose RMS current rating greater than half of the maximum load current. Where VFB is the feedback voltage (0.923V), AVEA is the error amplifier voltage gain, GCS is the current sense transconductance and RLOAD is the load resistor value. Output Capacitor The output capacitor (C2) is required to maintain the DC output voltage. Ceramic, tantalum, or low ESR electrolytic capacitors are recommended. Low ESR capacitors are preferred to keep the output voltage ripple low. The output voltage ripple can be estimated by:  V  V ∆V = OUT ∗  1 − OUT  OUT f S ∗ L  VIN   ∗R  ESR  + The system has two poles of importance. One is due to the compensation capacitor (C3) and the output resistor of the error amplifier, and the other is due to the output capacitor and the load resistor. These poles are located at: G EA f P1 = 2π ∗ C3 ∗ A VEA 1 f P2 = 2π ∗ C2 ∗ R LOAD   8 ∗ f ∗ C2  S  1 Where C2 is the output capacitance value and RESR is the equivalent series resistance (ESR) value of the output capacitor. When using ceramic capacitors, the impedance at the switching frequency is dominated by the capacitance which is the main cause for the output voltage ripple. For simplification, the output voltage ripple can be estimated by: ∆VOUT =  V VOUT ∗  1 − OUT 2  VIN 8 ∗ fS ∗ L ∗ C 2  Where GEA is the error amplifier transconductance. The system has one zero of importance, due to the compensation capacitor (C3) and the compensation resistor (R3). This zero is located at: 2π ∗ C3 ∗ R3 The system may have another zero of importance, if the output capacitor has a large capacitance and/or a high ESR value. The zero, due to the ESR and capacitance of the output capacitor, is located at:     When using tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For simplification, the output ripple can be approximated to: ∆VOUT = VOUT  V ∗  1 − OUT f S ∗ L  VIN f ESR Ver1.3 Feb. 2011 = 1 2 π ∗ C2 ∗ R ESR In this case, a third pole set by the compensation capacitor (C4) and the compensation resistor (R3) is used to compensate the effect of the ESR zero on the loop gain. This pole is located at:  ∗R  ESR  f DS3482 1 f Z1 = 9 P3 = 1 2 π ∗ C4 ∗ R3 EUP3482 3. Determine if the second compensation capacitor (C4) is required. It is required if the ESR zero of the output capacitor is located at less than half of the switching frequency, or the following relationship is valid: f 1 < S 2π ∗ C2 ∗ R 2 ESR If this is the case, then add the second compensation capacitor (C4) to set the pole fP3 at the location of the ESR zero. Determine C4 by the equation: The goal of compensation design is to shape the converter transfer function to get a desired loop gain. The system crossover frequency where the feedback loop has the unity gain is important. Lower crossover frequencies result in slower line and load transient responses, while higher crossover frequencies could cause the system instability. A good standard is to set the crossover frequency below one-tenth of the switching frequency. To optimize the compensation components, the following procedure can be used: 1. Choose the compensation resistor (R3) to set the desired crossover frequency. Determine R3 by the following equation: R3 = < C4 = 2π ∗ C2 ∗ f C C2 ∗ R ESR R3 V ∗ OUT G EA ∗ G CS VFB To simplify design efforts using the EUP3482，the typical design for common application are listed in Table2. 2 π ∗ C 2 ∗ 0 .1 ∗ f S External Bootstrap Diode It is recommended that an external bootstrap diode be added when the system has a 5V fixed input or the power supply generates a 5V output. This helps improve the efficiency of the regulator. G EA ∗ G CS V ∗ OUT VFB Where fC is the desired crossover frequency, which is typically below one tenth of the switching frequency. 2. Choose the compensation capacitor (C3) to achieve the desired phase margin. For applications with typical inductor values, setting the compensation zero (fZ1) below one-forth of the crossover frequency provides sufficient phase margin. Determine C3 by the following equation: C3 > 4 2π ∗ R 3 ∗ f Figure 4. Add Optional External Bootstrap Diode to Enhance C Where R3 is the compensation resistor. This diode is also recommended for high duty cycle operation ( when V OUT V IN >65% ) and high output voltage (VOUT >12V) applications. Table2. External Components for Typical Designs Vin(V) Vout(V) L1(µH) C2(µF) R1(KΩ) R2(KΩ) R3(KΩ) C3(nF) C4(pF) 5 1.0 3.3 22*2 0.845 10 2.2 3.3 open 5 1.2 4.7 22*2 3.0 10 2.2 3.3 open 5 3.3 10 22*2 26.1 10 2.2 3.3 open 12 1.0 3.3 22*2 0.845 10 2.2 10 open 12 1.2 4.7 22*2 3.0 10 2.2 10 open 12 3.3 10 22*2 26.1 10 2.2 3.3 open 12 5.0 10 22*2 44.2 10 2.2 3.3 open 24 3.3 10 22*2 26.1 10 2.2 3.3 open 24 5.0 10 22*2 44.2 10 2.2 3.3 open DS3482 Ver1.3 Feb. 2011 10 EUP3482 Packaging Information SOP-8 MILLIMETERS INCHES SYMBOLS MIN. MAX. MIN. MAX. A 1.35 1.75 0.053 0.069 A1 0.10 0.25 0.004 0.010 D E 4.90 5.80 E1 Ver1.3 6.20 0.228 3.90 0.244 0.153 L 0.40 1.27 0.016 0.050 b 0.31 0.51 0.012 0.020 e DS3482 0.193 Feb. 2011 1.27 0.050 11