6N137S1(TB)-V

8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER 6N137 Features: • High speed 10Mbit/s • Guaranteed performance from -40 to 85℃ • Logic gate output • High isolation voltage between input and output (Viso=5000 V rms ) • Pb free and RoHS compliant. • UL approved (No. 214129) • VDE approved (No. 132249) • SEMKO approved • NEMKO approved • DEMKO approved • FIMKO approved • CSA approved (No. 2037145) Description The 6N137 consists of an infrared emitting diode optically coupled to a high speed integrated photo detector logic gate with a strobable output. It is packaged in a 8-pin DIP package and available in wide-lead spacing and SMD options. Schematic 1 8 2 7 3 6 4 5 Applications • Ground loop elimination • LSTTL to TTL, LSTTL or 5 volt CMOS • Line receiver, data transmission • Data multiplexing • Switching power supplies • Pulse transformer replacement • Computer peripheral interface A 0.1μF bypass capacitor must be connected between pins 8 and 5 *3 Input Enable Output H H L L H H Pin Configuration 1, No Connection 2, Anode 3, Cathode 4. No Connection 5, Gnd 6, Vout H L H 7, VE L L H 8, VCC H NC L L NC H Truth Table (Positive Logic) Everlight Electronics Co., Ltd. Document No：DPC-000020 Rev. 2 1 http://www.everlight.com February 23, 2009 8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER 6N137 Absolute Maximum Ratings (Ta=25°C) Parameter Symbol Rating Unit Forward current IF 50 mA Enable input voltage Not exceed VCC by more than 500mV VE 5.5 V Reverse voltage VR 5 V Power dissipation PD 100 mW Power dissipation PC 85 mW Output current IO 50 mA Output voltage VO 7.0 V Supply voltage VCC 7.0 V PO 100 mW Isolation voltage *1 VISO 5000 V rms Operating temperature TOPR -40 ~ +85 °C Storage temperature TSTG -55 ~ +125 °C Soldering temperature *2 TSOL 260 °C Input Output Output Power Dissipation Notes *1 AC for 1 minute, R.H.= 40 ~ 60% R.H. In this test, pins 1 & 2 are shorted together, and pins 3 & 4 are shorted together. *2 For 10 seconds. Everlight Electronics Co., Ltd. Document No：DPC-000020 Rev. 2 2 http://www.everlight.com February 23, 2009 8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER 6N137 Electrical Characteristics (Ta=-40 to 85°C unless specified otherwise) Input Parameter Symbol Min. Typ.* Max. Unit Forward voltage VF - 1.4 1.8 V IF = 10mA Reverse voltage VR 5.0 - - V IR = 10μA ΔVF/ΔTA - -1.8 - mV/°C IF =10mA CIN - 60 - pF Symbol Min. Typ.* Max. Unit High level supply current ICCH - 7 10 mA IF=10mA, VE=0.5V, VCC=5.5V Low level supply current ICCL - 9 13 mA IF=0mA, VE=0.5V, VCC=5.5V High level enable current IEH - - 0.6 -1.6 mA VE=0.5V, VCC=5.5V Low level enable current IEL - - 0.8 -1.6 mA VE=2.0V, VCC=5.5V High level enable voltage VEH 2.0 - - V IF=10mA, VCC=5.5V Low level enable voltage VEL - - 0.8 V IF=10mA, VCC=5.5V Temperature coefficient of forward voltage Input capacitance Condition VF=0, f=1MHz Output Parameter Condition Transfer Characteristics (Ta=-40 to 85°C unless specified otherwise) Parameter Symbol Min. Typ.* Max. Unit HIGH Level Output Current IOH - 2.1 100 uA VCC=5.5V, VO=5.5V, IF=250μA, VE=2.0V LOW Level Output Current VOL - 0.35 0.6 V VCC = 5.5V, IF=5mA, VE=2.0V,ICL=13mA Input Threshold Current IFT - 2.5 5 mA VCC= 5.5V, VO=0.6V, VE =2.0V,IOL=13mA Everlight Electronics Co., Ltd. Document No：DPC-000020 Rev. 2 3 Condition http://www.everlight.com February 23, 2009 8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER 6N137 Switching Characteristics (Ta=-40 to 85°C, VCC=5V, IF=7.5mA unless specified otherwise) Parameter Symbol Min. Typ.* Max. Unit TPHL - 35 75 ns CL = 15pF, RL=350Ω, TA=25°C TPLH - 40 75 ns CL = 15pF, RL=350Ω, TA=25°C |Tphl – Tplh| - 5 35 ns CL = 15pF, RL=350Ω Output rise time (Fig.12) tr - 40 - ns CL = 15pF, RL=350Ω Output fall time (Fig.12) tf - 10 - ns CL = 15pF, RL=350Ω Propagation delay time to output High level (Fig.12) Propagation delay time to output Low level (Fig.12) Pulse width distortion Condition Switching Characteristics (Ta=-40 to 85°C, VCC=5V, IF=7.5mA unless specified otherwise) Enable Propagation Delay Time to Output High Level (Fig.13) tELH - Enable Propagation Delay Time to Output Low Level (Fig.13) tEHL - Common Mode Transient Immunity at Logic High *4 15 15 - - ns ns IF = 7.5mA , VEH=3.5V, CL = 15pF, RL=350Ω IF = 7.5mA , VEH=3.5V, CL = 15pF, RL=350Ω IF = 0mA , VCM=50Vp-p, CMH 5000 - - V/µS VOH=2.0V, RL=350Ω, TA=25°C Common Mode Transient Immunity at Logic Low *5 IF = 7.5mA , CML 5000 - - V/µS VCM=50Vp-p, VOL=0.8V, RL=350Ω, TA=25°C Everlight Electronics Co., Ltd. Document No：DPC-000020 Rev. 2 4 http://www.everlight.com February 23, 2009 8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER 6N137 Typical Performance Curves Everlight Electronics Co., Ltd. Document No：DPC-000020 Rev. 2 5 http://www.everlight.com February 23, 2009 8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER Everlight Electronics Co., Ltd. Document No：DPC-000020 Rev. 2 6 6N137 http://www.everlight.com February 23, 2009 8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER 6N137 IF=7.5mA IF=3.75mA Input (IF) Ω tPHL tPLH Output (Vo) 1.5V 90% Output (Vo) Ω 10% tr tf Fig. 12 Test circuit and waveforms for tPHL, tPLH, tr, and tf Ω 3.0V Input (VE) 1.5V tEHL tELH Output (Vo) 1.5V Fig. 13 Test circuit and waveform for tEHLand tELH Everlight Electronics Co., Ltd. Document No：DPC-000020 Rev. 2 7 http://www.everlight.com February 23, 2009 8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER 6N137 Ω Peak VCM 0V 5V Vo CMH Switching Pos. (A), IF=0 VO(Min) VO(Max) Switching Pos. (B), IF=7.5mA VCM CML 0.5V Fig. 14 Test circuit Common mode Transient Immunity Notes: *3 The VCC supply must be bypassed by a 0.1μF capacitor or larger. This can be either a ceramic or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package VCC and GND pins *4 CMH– The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the HIGH state (i.e., VOUT > 2.0V). *5 CML– The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the LOW output state (i.e., VOUT < 0.8V). Everlight Electronics Co., Ltd. Document No：DPC-000020 Rev. 2 8 http://www.everlight.com February 23, 2009 8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER 6N137 Order Information Part Number 6N137Y(Z)-V Note Y Z V = Lead form option (S, S1, M or none) = Tape and reel option (TA, TB or none). = VDE (optional) Option Description Packing quantity None Standard DIP-8 45 units per tube M Wide lead bend (0.4 inch spacing) 45 units per tube S (TA) Surface mount lead form + TA tape & reel option 1000 units per reel S (TB) Surface mount lead form + TB tape & reel option 1000 units per reel S1 (TA) Surface mount lead form (low profile) + TA tape & reel option 1000 units per reel S1 (TB) Surface mount lead form (low profile) + TB tape & reel option 1000 units per reel Everlight Electronics Co., Ltd. Document No：DPC-000020 Rev. 2 9 http://www.everlight.com February 23, 2009 8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER 6N137 Package Drawing (Dimensions in mm) Standard DIP Type Option M Type Everlight Electronics Co., Ltd. Document No：DPC-000020 Rev. 2 10 http://www.everlight.com February 23, 2009 8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER 6N137 Option S Type Option S1 Type Everlight Electronics Co., Ltd. Document No：DPC-000020 Rev. 2 11 http://www.everlight.com February 23, 2009 8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER 6N137 Recommended pad layout for surface mount leadform Device Marking EL 6N137 YWWV Notes 6N137 Y WW V denotes Device Number denotes 1 digit Year code denotes 2 digit Week code denotes VDE (optional) Everlight Electronics Co., Ltd. Document No：DPC-000020 Rev. 2 12 http://www.everlight.com February 23, 2009 8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER 6N137 Tape & Reel Packing Specifications Option TA Option TB Direction of feed from reel Direction of feed from reel Tape dimensions Dimension No. A B Do D1 E F Dimension(mm) 10.4±0.1 10.0±0.1 1.5±0.1 1.5±0.1 1.75±0.1 7.5±0.1 Dimension No. Po P1 P2 t W K Dimension(mm) 4.0±0.1 12.0±0.1 2.0±0.1 0.4±0.1 16.0+0.3/ -0.1 4.5±0.1 Everlight Electronics Co., Ltd. Document No：DPC-000020 Rev. 2 13 http://www.everlight.com February 23, 2009 8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER 6N137 Solder Reflow Temperature Profile 260 °C (peak,10 Sec Max) >255 °C ( 30s Max ) 217° 1-3 °C/Sec 200° 60 – 140 Sec 150° 70 – 170 Sec 1-3 °C/Sec TIME (S) Everlight Electronics Co., Ltd. Document No：DPC-000020 Rev. 2 14 http://www.everlight.com February 23, 2009 8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER 6N137 DISCLAIMER 1. Above specification may be changed without notice. EVERLIGHT will reserve authority on material change for above specification. 2. When using this product, please observe the absolute maximum ratings and the instructions for using outlined in these specification sheets. EVERLIGHT assumes no responsibility for any damage resulting from use of the product which does not comply with the absolute maximum ratings and the instructions included in these specification sheets. 3. These specification sheets include materials protected under copyright of EVERLIGHT corporation. Please don’t reproduce or cause anyone to reproduce them without EVERLIGHT’s consent. Everlight Electronics Co., Ltd. Document No：DPC-000020 Rev. 2 15 http://www.everlight.com February 23, 2009